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Dual Buses for Industrial 110

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Dual Buses for Industrial 110 ... L r 7 L v 1 ..r 11. .. M. M `S. r , .. L. T: , r 1iu 4....L ` ../ .. r r , ...... .. sr L L ,_ i i . r r , t 1 r L. V . .. v $ . )1, ` k....L.0' .... 3 - L .0 r, .. r r 4C... --../ v S..or " L. L/ 1/4...,v J ....,0J v v r -,i` v - (,i y II -./ 10 ls . ..r .. -' v r 7 (...4 J .r á., L/ u J ..i v r ' C, t J J - s V_ M r 1/4..J '...1 J J J ,J it r ` . _+' ` i _ ! - 7y Dual buses for industrial 110 Anthony Winter of Arcom Control Systems outlines some of the cost -saving options provided by the use of VN1E/STE mixed -bus architectures It seems that the vast majority of com- a standard hus*. The bus in question is latching circuity to allow very low-cost plementary bus developments over the IEEE -1000 STEhus: a single-Eurocard (STEhus) processors to he used for adding past few years have been aimed at in- scheme which is closely matched to the intelli¢ence to an I/O subsystem. Both these creasing or optimizing overall system needs of the industrial control designer. Its approaches are embodied in Arcom's VME- throughput. Typical examples are buses to limitation' of an 8 -hit data path is. in fact. a bus hoard line. The easiest way to under- provide fast local memory accessing or benefit for industrial I/O applications, be- stand the concept is to consider a CPU hoard message passing between semi-independent cause it makes interfacing both simple and which has dual -bus interfaces. intelligent subsystems. This is good news for cheap and there is little or no performance the designer of. say. CAE workstations penalty for the majority of tasks. because ONE T\\'O BUSES whose foremost concern is handling as many most I/O chips are designed for 8 -bit buses waft microinstructions per second as possible. With more than 50 suppliers now in the The VSCO20 CPU board illustrated is a hut what about the more down-to-earth STEhus market. there are hundreds of mod- conventional double -height VMEhus 68020 engineer developing a medium -complexity ules to choose from and. moreover. the processor module with an expansion con- industrial control system? This type of pro- members of the S'I Ebus industry have co- nector to accept a single Eurocard contain- ject needs a reasonable amount of comput- operated to adopt a further informal 'signal - ing the STEhus interface: the 68020's mem- ing power and. perhaps because of this. the conditioning' standard which has resulted in ory is linked to the \ MEhus. STEhus and engineer initially opts for a bus like \'ME. a very wide range of complementary. single- 68020. The interface to STEhus memory and But when it comes to implementing the I/O Eurocard. real -world interface functions I/O space appear as windows in the CPU's scheme, which might run into hundreds of with screw terminals for easy connection to memory map. All the system designer needs channels, cost reduction becomes the major plant. to do to access the STEhus is write into this driving force. Unfortunately. this need is The concept of integrating the VME and portion of the memory map - in the same generally incompatible with the interfacing STE buses was designed into STE from the manner as if defining the width of \'MEhus requirements of the \'MEbus scheme and start. It can be achieved by either adding an memory access, for instance - and the also, it has to be said, with the apparent interface to a \'ME processor hoard and command is transferred. The memory map high -profit business objectives of the major- porting the processor's memory to both the opposte illustrates this. ity of VIM Ebus hoard manufacturers. VDIE and STE buses, or by building \'ME I/O With two bus interfaces available. the This makes industrial I/O an area ripe for hoards with dual -bus interfaces and some designer is free to partition the system for exploitation by multiple -bus architectures. optimum cost-effectiveness. choosing \'CIE 'See. for esanrhk. 'STE hus as an i/o bus in 1:VE :r:arms' which allow significant reductions in costs. modules for computation and memory. but he Tim Ellsmore. Elri t r-uniis& I1'ircles World. February. It is now possible to achieve this result using 1987. pages I 13 -fi. selecting STEhus modules for the industrial May 1989 ELECTRONICS & WIRELESS WORLD 517 The VSCO20 board with dual VME and STEBUS BASICS STEbus interfaces. The STEbus interface is a daughter board, connected to the outer STEbus is now approved as a full world For many designers, one of the key design rows of the P2 connector. The board standard by the American IEEE. The 1987 choices influencing bus selection is proces- contains a 68020, a socket for a 68881 standard, IEEE 1000, brings major benefits sor type. STEbus gives virtually unlimited floating-point unit. 1Mbyte of ram, four to the systems -building community, offering - freedom in this respect Arcom alone offers a powerful, fast and above all no less than 12 choices of CPU embracing 32 -pin eprom sockets and two serial I/O designers cost-effective means of implementing sys- nine different processor families: Z80A, channels. It costs £1250 in its 12MHz form tems for applications such as control and 64180, Z280, 80188, 8052, 6809, 68008, instrumentation systems. 8088 and 68020. The bus was designed by a group of engineers independently of commercial in- Information on STEbus ís available freely terest, and now has a major following, with via an independent manufacturers' and us- dozens of suppliers and hundreds of users. ers' group - STEMUG. This organisation I/O. This approach to system design changes STEbus' main features are provides a number of helpful services in- the economics drastically. For example, a an 8 -bit bus embracing the Eurocard stan- cluding a document which describes the bus typical VMEhus I/O hoard, say a digital I/O dard and designed for low cost in considerable detail for prospective users. function, costs around £500. Implementing independence of processor manufactur- Free copies may be obtained from Arcom on request (Units 8-10. Clifton Road. Cambridge the equivalent function via STEbus - which ers, giving the widest choice of processor on any 8 -bit bus CB1 4WH). requires a simpler bus interface - works out provision for future requirements through - at around £250. The larger the system. the asynchronous, non -multiplexed data In the UK. the bus has over the last 3-4 greater the savings. VSCO20 also provides a transfers at over 5Mbyte/s years, literally changed the face of the UK's upgrade path for STEhus users: powerful a full 1Mbyte addressing range board -level computer market sweeping some simple software changes allow an up to 4Kbyte I/O space aside STD and dozens of proprietary single- existing STEbus system's processing power a positionindependent, non -daisy - Eurocard bus standards to become the to he multiplied around tenfold (this figure chained bus dominant 8 -bit board -level standard. Its is taken from benchmarks of an 8N11 -1z 68008 multiprocessor capability main application area is in small -to -medium STEhus CPU against the l6?ll Iz version of high-speed burst transfer mode size data acquisition and control systems, as IEEE has this 6801_0 hoard), whilst retaining all the eight attention -request lines and its standardisation -1000 vectored or non -vectored interrupts resulted in widespread user acceptance and basic programs and OS -9 operating system interrupt -acknowledge cycle a fast-growing following of manufacturers. environment. read -modify -write cycle The result is a UK STEbus market currently This facility to migrate the design either fully buffered signals and terminated running at some f7M pa and growing at up or down in processing power is an backplane for data integrity around 50% pa. additional and powerful capability. When a design cycle starts, unless you possess some similar detailed experience or have under- taken extensive feasibility studies, it is usual- 4 Gigabytes Expansion showing ly not clear how much processing power you FFFF FFFF the STE bus need. The result can be a 32 -hit VMEbus interface system performing a control task that is well Arcom VME within reach of a Z80 running on STEbus (at A16 /1:116 slave address say one -quarter of the cost), or an STEhus Repeat 4 16 /032 7F00 system designer resorting to techniques of lower Control 2G byte such as rewriting sections of code in assemb- Memory 7E40 ler or adding another CPU. offloading a 1/o computing task to get the system functional. 7E80 in man- 7E40 An STEhus system configured this 7EFF FFFF ner has nothing left in reserve to cope with Not used 7E80 0000 any future system expansions. The VMEbus Serial i/o has a high price for the 7E 2800 XX designer to pay very Reserved system, whilst the STEbus designer's costs A32/016 7E 20XXXX Eprom and development time have mounted out of space 7E 00 proportion - and with the possibility of a redesign. 424/016 The dual VME/STEbus concept changes this situation. Provided that you choose a 7D00 68K -family processor running under the A32/032 space OS -9 operating system. you can start with an A24 /032 STEbus CPU and upgrade the computer power at a later date. or start on VME with 000F FFFF 7C 00 1 Mbyte STEbus I/O and downgrade to. say. a 68008 Hex address onboard dram High character hex address for the target -system versions.
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