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Monolithic Heteroepitaxial Integration of III-V Semiconductor Lasers on Si Substrates

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Monolithic Heteroepitaxial Integration of III-V Semiconductor Lasers on Si Substrates Monolithic Heteroepitaxial Integration of III-V Semiconductor Lasers on Si Substrates by Michael Edward Groenert B.S. with Highest Honors in Physics College of William and Mary, 1996 Submitted to the Department of Materials Science and Engineering in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy in Electronic Materials at the Massachusetts Institute of Technology September 2002 © 2002 Massachusetts Institute of Technology All rights reserved. Signature of Author: ______________________________________________________ Department of Materials Science and Engineering Aug. 9, 2002 Certified by: _____________________________________________________________ Eugene A. Fitzgerald Professor of Materials Science and Engineering Thesis Supervisor Accepted by: ____________________________________________________________ Harry L. Tuller Professor of Ceramics and Electronic Materials Chair, Departmental Committee on Graduate Students Monolithic Heteroepitaxial Integration of III-V Semiconductor Lasers on Si Substrates by Michael Edward Groenert Submitted to the Department of Materials Science and Engineering on August 9, 2002 in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy in Electronic Materials ABSTRACT Monolithic optoelectronic integration on silicon-based integrated circuits has to date been limited to date by the large material differences between silicon (Si) and the direct-bandgap GaAs compounds from which optoelectronic components are fabricated. Graded Ge/GeSi buffer layers grown on standard Si substrates have been shown to produce near-lattice matched virtual substrates for GaAs integration on Si. This study investigated the crystal growth conditions and device fabrication techniques necessary for successful GaAs-based laser integration on Ge/GeSi buffer layers on Si substrates. The nucleation conditions for GaAs on Ge/GeSi/Si substrates have been comprehensively examined. High-temperature ( ≥ 700 ºC) initiation with properly chosen V/III gas flow ratio yields high-quality, stacking fault-free GaAs films on Ge/GeSi/Si substrates, but also encourages the vapor-phase transport of Ge from the substrate into the active regions of integrated GaAs devices. A new two-step GaAs nucleation process was developed that enabled the first demonstration of high-quality Ge- free GaAs light-emitting diodes on Ge/GeSi/Si substrates. The large thermal expansion mismatch between Si, Ge, and GaAs introduces additional strain to integrated device layers on Ge/GeSi/Si substrates grown at high temperatures. This study conclusively demonstrated the link between thermal mismatch strain and increased misfit dislocation formation in InxGa(1-x)As/GaAs quantum well structures integrated on Ge/GeSi/Si substrates. The thermal mismatch strain was successfully countered by the introduction of compressive InGaAs graded buffer layers above the Ge/GeSi/Si substrate surface, and strain-free GaAs layers at growth temperatures suitable for laser integration have been demonstrated. The integration of edge-emitting heterostructure lasers on Ge/GeSi/Si substrates introduces additional waveguide design issues addressed by this study. Low-index Al0.6Ga0.4As cladding layers, along with a graded-index separate confinement heterostructure, were introduced to reduce photon losses. Interfacial roughness transmitted from the Ge/GeSi/Si substrate was reduced with a pre-growth chemical- mechanical polishing step, and smooth mirror facets on integrated devices were fabricated by cleaving thinned lasers parallel to the substrate offcut direction. Continuously operating edge-emitting GaAs/AlGaAs quantum well lasers on Ge/GeSi/Si substrates were demonstrated at room temperature with an operating wavelength of 858 nm. Series resistance heating in early devices was reduced by the introduction of a top-contact geometry and optimized cladding layer structure, and improved laser diodes had a differential quantum efficiency of 40%, a threshold current density of 269 A/cm2, and a characteristic temperature of 129 K. Identical devices fabricated on GaAs substrates had similar performance characteristics. Lasers on Ge/GeSi/Si substrates fell below threshold after 4 hours of continuous operation−a dramatic improvement over early measured lifetimes of less than 20 minutes. Electroluminescence images of operating lasers taken before and after failure showed that dark line defects were present in the laser active regions after failure. Room-temperature 60 Å In0.17Ga0.83As strained quantum well lasers have also been demonstrated on Ge/GeSi/Si with an operating wavelength of 897 nm; these lasers had shorter lifetimes ( < 15 min) under continuous operation due to misfit dislocations in the strained quantum well active region. While challenges remain for monolithic III/V optoelectronic integration on Si, it is clear that the demonstration of a successfully integrated GaAs-based laser on a Ge/GeSi/Si substrate represents a significant milestone on the path to the final goal of truly integrated high-speed optoelectronic devices and Si integrated circuits. Thesis Supervisor: Eugene A. Fitzgerald Title: Professor of Materials Science and Engineering 3 Table of Contents Acknowledgements..................................................................................................................... 10 Chapter 1. Introduction ............................................................................................................ 13 1.1. Barriers to Epitaxial III-V/Si integration................................................................................... 17 1.1.1. Differences in Lattice Constant ............................................................................................ 17 1.1.2. Differences in Thermal Expansion Behavior........................................................................ 25 1.1.3. Differences in Crystal Structure ........................................................................................... 27 1.2. Strategies for III-V/Si Integration.............................................................................................. 29 1.2.1. Dislocation Control Strategies for Monolithic Integration ................................................... 30 1.3. Relaxed GexSi(1-x) Graded Buffers for III-V/Si Integration ....................................................... 33 1.4. GaAs Integration on Ge/GexSi(1-x) Buffers on Si ....................................................................... 35 1.5. Goals and Scope of this Thesis..................................................................................................38 Chapter 2. Growth and Characterization of III-V films on Ge/GeSi/Si substrates.............. 40 2.1. Introduction ............................................................................................................................... 41 2.2. Metal-Organic Chemical Vapor Deposition.............................................................................. 41 2.3. Thomas Swan MOCVD Research Reactor................................................................................ 45 2.4. Material Characterization .......................................................................................................... 47 2.4.1. Surface Morphology............................................................................................................. 47 2.4.2. Device Structure ................................................................................................................... 48 2.4.3. Crystallography and Strain ................................................................................................... 49 2.4.4. Dislocation Characterization ................................................................................................ 49 2.4.5. Optical Characterization ....................................................................................................... 50 Chapter 3. Optimizing Epitaxy for GaAs/Ge/Si Integration .................................................. 52 3.1. Introduction ............................................................................................................................... 53 3.2. Background: GaAs Nucleation on Ge/GeSi/Si......................................................................... 53 3.2.1. Ge Substrate Surface ............................................................................................................53 3.2.2. GaAs Film Alignment on a Ge Substrate Surface ................................................................ 54 3.2.3. Controlling Anti-phase Boundary Formation at the GaAs/Ge Interface............................... 55 3.3. Low-Temperature Nucleation Experiments .............................................................................. 58 3.4. High Temperature Nucleation Experiments. ............................................................................. 61 3.5. Optimizing GaAs Nucleation to Control GaAs/Ge Interdiffusion and Autodoping.................. 64 3.6. Experiments to Control Autodoping in GaAs/Ge Growth......................................................... 66 3.6.1. Characterizing GaAs/Ge Device Structures with Autodoping Contamination..................... 66 3.6.2. Reducing Autodoping in GaAs/Ge Device Structures......................................................... 72 3.6.3. Characterizing Autodoping-free GaAs/Ge Device Structures .............................................. 79 3.7. Conclusions ..............................................................................................................................
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