Solid State Phenomena Vols. 156-158 (2010) pp 61-68 Online available since 2009/Oct/28 at www.scientific.net © (2010) Trans Tech Publications, Switzerland doi:10.4028/www.scientific.net/SSP.156-158.61 Strained Silicon Devices M. Reiche 1a , O. Moutanabbir 1b, J. Hoentschel 2c , U. Gösele 1d, S. Flachowsky 2e and M. Horstmann 2f 1 Max Planck Institute of Microstructure Physics, Weinberg 2, D – 06120 Halle, Germany 2 GLOBALFOUNDRIES Fab 1, Wilschdorfer Landstraße 101, D – 01109 Dresden, Germany a
[email protected], b
[email protected], c
[email protected], d
[email protected], e stefan.flachowsky@ globalfoundries.com, f
[email protected] Keywords: strained silicon, mobility enhancement, process-induced strain, global strain, SSOI. Abstract. Strained silicon channels are one of the most important Technology Boosters for further Si CMOS developments. The mobility enhancement obtained by applying appropriate strain provides higher carrier velocity in MOS channels, resulting in higher current drive under a fixed supply voltage and gate oxide thickness. The physical mechanism of mobility enhancement, methods of strain generation and their application for advanced VLSI devices is reviewed. Introduction The ordinary device scaling was the most important principle of performance enhancement in Si CMOS for more than 30 years. However, starting with 90 nm technologies the performance enhancements of CMOS started to diminish through standard device scaling such as shrinking the gate length and thinning the gate oxide due to several physical limitations in miniaturization of MOSFETs. For example, thinning the gate oxide requires a reduction of the supply voltage and an increase of the gate tunneling current occurs.