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Digital Logic Design

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Digital Logic Design Digital Logic Design Chapter 3 Gate-Level Minimization Nasser M. Sabah Outline of Chapter 3 2 Introduction The Map Method Four-Variable Map Five-Variable Map Product of Sums Simplification NAND & NOR Implementation Other Two-Level Implementations Exclusive-OR Function Introduction 3 Gate-level minimization refers to the design task of finding an optimal gate-level implementation of Boolean functions describing a digital circuit. The Map Method 4 The complexity of the digital logic gates The complexity of the algebraic expression Logic minimization Algebraic approaches: lack specific rules The Karnaugh map A simple straight forward procedure A pictorial form of a truth table A diagram made up of squares Each square represents one minterm of the function that is to be minimized. Review of Boolean Function 5 Boolean function Sum of minterms Sum of products (or product of sum) in the simplest form A minimum number of terms A minimum number of literals The simplified expression may not be unique Two-Variable Map 6 A two-variable map Four minterms x' = row 0; x = row 1 y' = column 0; y = column 1 A truth table in square diagram Figure 3.1 Two-variable Map xy m3 xym 1 m 2 m 3 xyxy'' xy Representation of functions in the map Three-Variable Map 7 A three-variable map Eight minterms The Gray code sequence Any two adjacent squares in the map differ by only on variable. Primed in one square and unprimed in the other. e.g., m5 and m7 can be simplified. m57 m xy'(') z xyz xz y y xz Three-variable Map Three-Variable Map 8 m0 and m2 (m4 and m6) are adjacent m0+ m2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z' m4+ m6 = xy'z' + xyz' = xz' (y'+y) = xz' Example 3.1 9 Example 3.1: simplify the Boolean functions: F( x , y , z ) (2, 3, 4, 5) m2345 m m m xyz'''''' xyz xyz xyz xyzz' ( ') xyz '( ' z ) xyxy ' ' 11 F(,,) x y z (2,3,4,5) x ' y xy ' F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy' Example 3.2 10 Example 3.2: simplify the Boolean functions: F( x , y , z ) (3, 4, 6, 7) F( x , y , z ) (3, 4, 6, 7) yz xz ' F(x, y, z) = Σ(3, 4, 6, 7) = yz + xz' Example 3.3 11 Example 3.3: simplify the Boolean functions: F( x , y , z ) (0, 2, 4, 5, 6) F( x , y , z ) (0, 2, 4, 5, 6) z ' xy ' F(x, y, z) = Σ(0, 2, 4, 5, 6) = z' +xy' Example 3.4 12 Example 3.4: Let the Boolean function F A''' C A B AB C BC a) Express it in sum of minterms. b) Find the minimal sum of products expression. FABCCAB( , , ) (1, 2, 3, 5, 7) ' A'C + A'B + AB'C + BC = C + A'B Four-Variable Map 13 The map 16 minterms Combinations of 16 adjacent squares Four-variable Map Example 3.5 14 Example 3.5: simplify the Boolean functions: F( x , y , z ) (0,1, 2, 4, 5, 6, 8, 9,12,13,14) F y'''' w z xz Example 3.6 15 Example 3-6: simplify the Boolean functions: F ABC''''''''''' BCD ABCD ABC ABC + BCD + ABCD + ABC = BD + BC +ACD Prime Implicants 16 Prime Implicant (PI): a product term obtained by combining the maximum possible number of adjacent squares (combining all possible maximum numbers of squares). Essential Prime Implicant (EPI): a minterm in a square is covered by only one prime implicant. Prime Implicants 17 Consider FABCD( , , , ) (0, 2, 3, 5, 7, 8, 9,10,11,13,15) The simplified expression may not be unique CD CD F BD AB 00 01 11 10 AB F BD BD'' 00 1 1 1 1 1 1 B ''D CD 01 1 1 1 1 CD AD 11 1 1 1 1 AB ' 10 1 1 1 1 1 1 1 1 CD CD F BD AB AB F BD BD'' 1 1 1 1 1 1 B ''D B 'C 1 1 1 1 B 'C AB ' 1 1 1 1 AD 1 1 1 1 1 1 1 1 Essential Prime Implicants 18 FABCD( , , , ) (0, 2, 3, 5, 7, 8, 9,10,11,13,15) m0 The partial map shows two essential m5 prime implicants (EPI), m0 & m5. Each formed by collapsing four cells into a term having only two literals. One term is essential because there is only one way to include mintem m0 within four adjacent squares (B'D'). Also, there is only one way to include mintem m5 within four adjacent squares (BD). The three mintem that were omitted from the partial map (m3, m9 & m11) must be considered next. Prime Implicants 19 FABCD( , , , ) (0, 2, 3, 5, 7, 8, 9,10,11,13,15) Minterm m3 can be covered with either prirme implicant CD or prime implicant B'C. Minterm m9 can be covered with either AD or AB'. Minterm m11 is covered with any one of the four prime implicants. The simplified expression is obtained from the logical sum of the two essential prime implicants and any two prime implicants that cover mintems m3, m9 & m11. Five-Variable Map 20 Map for more than four variables becomes complicated Five-variable map: two four-variable map (one on the top of the other). Five-variable Map # of Adjacent Squares and # of Literals 21 Table 3.1 shows the relationship between the number of adjacent squares and the number of literals in the term. Example 3.7 22 Example 3.7: Simplify the Boolean function FABCDE( , , , , ) (0, 2, 4, 6, 9,13, 21, 23, 25, 29, 31) F A'''' B E BD E ACE Product of Sums Simplification 23 Approach #1: Simplified F' in the form of sum of products. Apply DeMorgan's theorem F = (F')' . F': sum of products → F: product of sums. Approach #2: duality Combinations of maxterms (it was minterms). FMMABCDABCD''01 ( )( ) ()()A B C DD' A BC FABCDABCD' MM01 ( )( ') (')'FFAB ( CDABCDABCDABCD )( ')''''''' ABCDDABC' ' '( ' ) ' ' ' FA' BC Example 3.8 24 Simplify the following Boolean function into: (a) sum-of-products form, and (b) product-of-sums form. FABCD( , , , ) (0,1, 2, 5, 8, 9,10) Sum of products form( SOP ) Combine the squares with1' s FBDBCACD'''''' Product of sums form() POS Combine the squares withs0' F'' AB CD BD Apply DeMorgan'; s theorem FA ( ' BCDBD ')( ' ')( ' ) Map for Example 3.8, F(A, B, C, D)= S(0, 1, 2, 5, 8, 9, 10) = B'D'+B'C'+A'C'D Example 3.8 (cont.) 25 Gate implementation of the function of Example 3.8 Sum-of products form Product-of sums form Gate Implementation of the Function of Example 3.8 Sum-of-Minterm Procedure 26 Consider the function defined in Table 3.2. Sum-of-minterm: F( x , y , z ) (1,3,4,6) . Combine the 1’s: F(,,) x y z x z xz Product-of-maxterm: F( x , y , z ) (0,2,5,7) . Combine the 0’s: F'( x , y , z ) xz x z 0 . Taking the complement of F F( x , y , z ) ( x z )( x z ) Don’t-Care Conditions 27 The value of a function is not specified for certain combinations of variables. BCD; 1010-1111: don't care. The don't-care conditions can be utilized in logic minimization. Can be implemented as 0 or 1. Example 3.9 28 Simplify the Boolean function F( w , x , y , z ) (1,3, 7,11,15) which has the don't-care conditions d( w , x , y , z ) (0, 2, 5) Solution: F yz w'' x F( w , x , y , z ) (0,1, 2, 3, 7,11,15) OR F yz w' z F( w , x , y , z ) (1, 3, 5, 7,11,15) Either expression is acceptable. NAND and NOR Implementation 29 NAND gate is a universal gate Can implement any digital system Logic Operations with NAND Gates NAND Gate 30 NAND gate: Invert-OR = NAND Two Graphic Symbols for NAND Gate Two-level Implementation 31 Two-level logic NAND-NAND = sum of products Example: F AB CD Implement with NAND gates ony l F AB CD AB CD ()() AB CD AB CD ()()AB CD ()()AB CD Example 3.10 32 Implement the following Boolean function with NAND gates only: F( x , y , z ) (1,2,3,4,5,7) F(,,) x y z xy x y z xy x y z ()()'xy x y z xy x y z ()()'xy x y z Procedure with Two Levels NAND 33 The procedure Simplified in the form of sum of products; A NAND gate for each product term; the inputs to each NAND gate are the literals of the term (the first level); A single NAND gate for the second sum term (the second level); A term with a single literal requires an inverter in the first level. Multilevel NAND Circuits 34 Boolean function implementation AND-OR logic → NAND-NAND logic AND: NAND + inverter NAND: inverter + OR A() CD B BC ' NAND Implementation 35 (AB''' A B )( C D ) NOR Implementation 36 NOR function is the dual of NAND function. The NOR gate is also universal. Logic Operation with NOR Gates Two Graphic Symbols for a NOR Gate 37 Two Graphic Symbols for NOR Gate Example: FABCD( )( )E FABCD( )( )E (ABC )( D )E ()()'ACDB E Example 38 Example: F( AB' A ' B )( C D ' ) with NOR gates F( AB''' A B )( C D ) (AB' A'' B )( C D ) ()(AB''' A B C D ) ()()ABABCD') ('' Other Two-Level Implementations 39 Wired logic A wire connection between the outputs of two gates.
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