SDCC Compiler User Guide

Total Page:16

File Type:pdf, Size:1020Kb

SDCC Compiler User Guide SDCC Compiler User Guide SDCC 3.7.1 $Date:: 2018-02-28 #$ $Revision: 10247 $ Contents 1 Introduction 6 1.1 About SDCC.............................................6 1.2 SDCC Suite Licenses.........................................7 1.3 Documentation............................................8 1.4 Typographic conventions.......................................8 1.5 Compatibility with previous versions.................................8 1.6 System Requirements......................................... 10 1.7 Other Resources............................................ 10 2 Installing SDCC 11 2.1 Configure Options........................................... 11 2.2 Install paths.............................................. 13 2.3 Search Paths.............................................. 14 2.4 Building SDCC............................................ 16 2.4.1 Building SDCC on Linux.................................. 16 2.4.2 Building SDCC on Mac OS X................................ 17 2.4.3 Cross compiling SDCC on Linux for Windows....................... 17 2.4.4 Building SDCC using Cygwin and Mingw32........................ 17 2.4.5 Building SDCC Using Microsoft Visual C++ 2010 (MSVC)................ 18 2.4.6 Windows Install Using a ZIP Package............................ 19 2.4.7 Windows Install Using the Setup Program.......................... 19 2.4.8 VPATH feature........................................ 19 2.5 Building the Documentation..................................... 20 2.6 Reading the Documentation..................................... 20 2.7 Testing the SDCC Compiler..................................... 20 2.8 Install Trouble-shooting........................................ 21 2.8.1 If SDCC does not build correctly............................... 21 2.8.2 What the ”./configure” does................................. 21 2.8.3 What the ”make” does.................................... 21 2.8.4 What the ”make install” command does............................ 21 2.9 Components of SDCC........................................ 22 2.9.1 sdcc - The Compiler..................................... 23 2.9.2 sdcpp - The C-Preprocessor................................. 23 2.9.3 sdas, sdld - The Assemblers and Linkage Editors...................... 23 2.9.4 s51, sz80, shc08, sstm8 - The Simulators.......................... 23 2.9.5 sdcdb - Source Level Debugger............................... 23 3 Using SDCC 24 3.1 Standard-Compliance......................................... 24 3.1.1 ISO C90 and ANSI C89................................... 24 3.1.2 ISO C95........................................... 25 3.1.3 ISO C99........................................... 25 3.1.4 ISO C11........................................... 25 3.1.5 Embedded C......................................... 25 3.2 Compiling............................................... 25 1 CONTENTS CONTENTS 3.2.1 Single Source File Projects.................................. 25 3.2.2 Postprocessing the Intel Hex file............................... 26 3.2.3 Projects with Multiple Source Files............................. 26 3.2.4 Projects with Additional Libraries.............................. 27 3.2.5 Using sdar to Create and Manage Libraries......................... 27 3.2.6 Using sdcclib to Create and Manage Libraries (deprecated)1 ................ 27 3.3 Command Line Options........................................ 29 3.3.1 Processor Selection Options................................. 29 3.3.2 Preprocessor Options..................................... 29 3.3.3 Optimization Options..................................... 30 3.3.4 Other Options......................................... 31 3.3.5 Linker Options........................................ 33 3.3.6 MCS51 Options....................................... 34 3.3.7 DS390 / DS400 Options................................... 35 3.3.8 Options common to all z80-related ports (z80, z180, r2k, r3ka, gbz80)........... 35 3.3.9 Z80 Options (apply to z80, z180, r2k and r3ka port)..................... 35 3.3.10 GBZ80 Options........................................ 36 3.3.11 Intermediate Dump Options................................. 36 3.3.12 Redirecting output on Windows Shells............................ 36 3.4 Environment variables........................................ 36 3.5 SDCC Language Extensions..................................... 36 3.5.1 MCS51/DS390 intrinsic named address spaces....................... 37 3.5.1.1 __data / __near.................................. 37 3.5.1.2 __xdata / __far................................... 37 3.5.1.3 __idata....................................... 37 3.5.1.4 __pdata...................................... 37 3.5.1.5 __code....................................... 38 3.5.1.6 __bit........................................ 38 3.5.1.7 __sfr / __sfr16 / __sfr32 / __sbit......................... 38 3.5.1.8 Pointers to MCS51/DS390 intrinsic named address spaces............ 39 3.5.1.9 Notes on MCS51 memory layout......................... 39 3.5.2 Z80/Z180 intrinsic named address spaces.......................... 40 3.5.2.1 __sfr (in/out to 8-bit addresses).......................... 40 3.5.2.2 __banked __sfr (in/out to 16-bit addresses).................... 40 3.5.2.3 __sfr (in0/out0 to 8 bit addresses on Z180/HD64180).............. 41 3.5.3 HC08/S08 intrinsic named address spaces.......................... 41 3.5.3.1 __data....................................... 41 3.5.3.2 __xdata...................................... 41 3.5.4 Non-intrinsic named address spaces............................. 41 3.5.5 Absolute Addressing..................................... 42 3.5.6 Preserved register specification................................ 43 3.5.7 Binary constants....................................... 43 3.5.8 Returning void........................................ 43 3.5.9 Omitting promotion on arguments of vararg function.................... 43 3.6 Parameters and Local Variables.................................... 43 3.7 Overlaying.............................................. 44 3.8 Interrupt Service Routines...................................... 44 3.8.1 General Information..................................... 44 3.8.1.1 Common interrupt pitfall: variable not declared volatile ............. 45 3.8.1.2 Common interrupt pitfall: non-atomic access ................... 45 3.8.1.3 Common interrupt pitfall: stack overflow ..................... 45 3.8.1.4 Common interrupt pitfall: use of non-reentrant functions ............ 45 3.8.2 MCS51/DS390 Interrupt Service Routines.......................... 45 3.8.3 HC08 Interrupt Service Routines............................... 46 1With SDCC version 3.2.0 the sdcclib utility is deprecated. Sdar utility should be used to create sdcc object file archives. Sdcclib utility will become obsolete in one of next sdcc releases and will be removed from sdcc packages. 2 CONTENTS CONTENTS 3.8.4 Z80 and Z180 Interrupt Service Routines.......................... 46 3.8.5 Rabbit 2000, 3000, 3000A and 4000 Interrupt Service Routines.............. 46 3.8.6 GBZ80 and TLCS-90 Interrupt Service Routines...................... 47 3.8.7 STM8 Interrupt Service Routines.............................. 47 3.9 Enabling and Disabling Interrupts.................................. 47 3.9.1 Critical Functions and Critical Statements.......................... 47 3.9.2 Enabling and Disabling Interrupts directly.......................... 47 3.9.3 Semaphore locking (mcs51/ds390).............................. 48 3.10 Functions using private register banks (mcs51/ds390)........................ 48 3.11 Inline Assembler Code........................................ 49 3.11.1 Inline Assembler Code Formats............................... 49 3.11.1.1 Old __asm ... __endasm; Format......................... 49 3.11.1.2 New __asm__ (”inline_assembler_code”) Format................ 49 3.11.2 A Step by Step Introduction................................. 49 3.11.3 Naked Functions....................................... 51 3.11.4 Use of Labels within Inline Assembler............................ 52 3.12 Interfacing with Assembler Code................................... 53 3.12.1 Global Registers used for Parameter Passing (8051)..................... 53 3.12.2 Registers usage (8051).................................... 53 3.12.3 Assembler Routine (non-reentrant) (8051).......................... 53 3.12.4 Assembler Routine (reentrant) (8051)............................ 54 3.12.5 Small-C calling convention.................................. 55 3.13 Support routines for integer multiplicative operators......................... 55 3.14 Floating Point Support........................................ 55 3.15 Library Routines........................................... 56 3.15.1 Compiler support routines (_gptrget, _mulint etc.)..................... 56 3.15.2 Stdclib functions (puts, printf, strcat etc.).......................... 56 3.15.2.1 <stdio.h>...................................... 56 3.15.2.2 <malloc.h>..................................... 57 3.15.3 Math functions (sinf, powf, sqrtf etc.)............................ 57 3.15.3.1 <math.h>...................................... 57 3.15.4 Other libraries........................................ 58 3.16 Memory Models............................................ 58 3.16.1 MCS51 Memory Models................................... 58 3.16.1.1 Small, Medium, Large and Huge......................... 58 3.16.1.2 External Stack................................... 58 3.16.2 DS390 Memory Model.................................... 58 3.16.3
Recommended publications
  • MEK6800D2 Manual 2Ed 1977.Pdf
    MOTOROLA Semiconductor Products Inc. MEK6800D2 MANUAL Circuit diagrams external to Motorola products are included as a means of illustrating typical Microprocessor applications; consequently, complete information sufficient for construction purposes is not necessarily given. The information in this manual has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, such information does not convey to the purchaser of the semiconductor devices described any license under the patent rights of Motorola Inc. or others. Motorola reserves the right to change specifications without notice. EXORciser, JBUG and MINlbug are trademarks of Motorola Inc. Second Edition © MOTOROLA INC., 1977 First Edition © 1976 "All Rights Reserved" Printed in U.S.A. TABLE OF CONTENTS CHAPTER 1: Introduction 1-1 General Description and Capability . 1-1 1-2 Preparation for Use . 1-4 1-2.1 Construction Hints ..................................................... 1-5 1-3 Start-up Procedure . 1-6 1-4 Operating Procedures . 1-6 1-4.1 Memory Examine and Change ............................................ 1-7 1-4.2 Escape (Abort) ........................................................ 1-7 1-4.3 Register Display ....................................................... 1-7 1-4.4 Go to User Program .................................................... 1-9 1-4.5 Punch from Memory to Tape ............................................. 1-9 1-4.6 Load from Tape to Memory .............................................
    [Show full text]
  • Freescale.Com
    MC9S08QE32 MC9S08QE16 Reference Manual Related Documentation: HCS08 Microcontrollers • MC9S08QE32 (Data Sheet) Contains pin assignments and diagrams, all electrical specifications, and mechanical drawing outlines. Find the most current versions of all documents at: http://www.freescale.com MC9S08QE32RM Rev. 3 9/2011 freescale.com MC9S08QE32 Features Features – ACMPx — Two analog comparators with selectable interrupt • 8-Bit HCS08 Central Processor Unit (CPU) on rising, falling, or either edge of comparator output; – Up to 50.33 MHz HCS08 CPU at 3.6V to 2.4V, 40 MHz CPU compare option to fixed internal bandgap reference voltage; at 2.4 V to 2.1 V and 20 MHz CPU at 2.1 V to 1.8 V across outputs can be optionally routed to TPM module; operation in temperature range of –40 °C to 85 °C stop3 – HC08 instruction set with added BGND instruction – SCIx — Two serial communications interface modules with – Support for up to 32 interrupt/reset sources optional 13-bit break; full duplex non-return to zero (NRZ); •On-Chip Memory LIN master extended break generation; LIN slave extended – Flash read/program/erase over full operating voltage and break detection; wake up on active edge temperature – SPI — One serial peripheral interface; full-duplex or – Random-access memory (RAM) single-wire bidirectional; double-buffered transmit and – Security circuitry to prevent unauthorized access to RAM and receive; master or slave mode; MSB-first or LSB-first shifting flash contents – IIC — One IIC; up to 100 kbps with maximum bus loading; • Power-Saving Modes multi-master
    [Show full text]
  • An Introduction to Openvg™ FTF-AUT-F0465
    An Introduction to OpenVG™ FTF-AUT-F0465 Oliver Tian | Auto FAE M A Y . 2 0 1 4 TM External Use Agenda • Trend of Graphics in Vehicle • Roadmap of Cluster • Introduction of Rainbow/Vybrid • OpenVG Scenario • Development Ecosystem • Conclusion TM External Use 1 Trend of Graphics in Vehicle TM External Use 2 The Connected Vehicle Infotainment + Communication + Security • Consumer electronics trends are dictating features in the car • Always connected, applications driven, advanced graphics • Infotainment systems becoming battleground for Auto differentiation • As more connected systems get introduced into the vehicle, the need for security is critical − Increasing external communication features (Bluetooth, TPMS, Ethernet, Wi-Fi, etc). − Future interface for vehicle-to-vehicle and vehicle-to-infrastructure. TM External Use 3 Mobility for Everyone Affordable Solutions for Emerging Markets • 100M vehicles annually forecasted before 2020, on top of motorcycle & e-bike growth • 80% of quantity growth after 2015 happening in emerging markets • Safety and emissions reduction are key for a sustainable development Source: IHS Automotive, February 2014 TM External Use 4 More, More, More for Less, Less, Less More performance, more embedded memory, more safety for less cost, less power and less development effort More • Electronic complexity • ECUs per car (50+) • MCUs per car (100+) • In-car Wi-Fi ® (7.2Mbps and 3.7Bpcs by 2017) iSuppli Less Reuse • Other markets have less critical applications • Some automotive specific challenges TM External Use 5 Today’s Car • Complex computerized control − Millions of lines of code, from multiple vendors − Dozens of distinct ECUs, from multiple vendors • Shared internal networking (e.g., CAN, FlexRay) − Increasing external communications features .
    [Show full text]
  • Beyond Bits Motor Control Edition
    BeyondBitsIssue 8 MOTOR CONTROL EDITION Motor Control Introducing Motor Control Motor control and motor drive solutions With a rich history of innovation in motor control, Freescale is dedicated to continue our commitment to understand and solve the current roadblocks developers face with a comprehensive portfolio of solutions. The latest edition of Beyond Bits captures the attention of both novice and advanced motor control developers looking to: • Reduce development time by jump starting their effort with reference designs, application notes and a global support team • Increase power efficiency by using the most advanced control techniques available through differentiated hardware platforms and peripherals, motor control libraries, and unique tools to optimize these systems • Decrease system costs via a best-in-class portfolio of high-performance, low-power MCUs capable of very flexible, innovative control implementations • Comply with safety and energy mandates via complimentary libraries and advanced algorithms Beyond Bits provides a brief glimpse into the breadth and scope of the Freescale motor control portfolio, much of it unique and built over decades of research and development. We discuss the advantages of different motor types and the methods of control, followed by a portfolio overview and a helpful selection guide. Next, we provide application examples and techniques we’ve implemented using our solutions, and we close with our software and development tools offerings. Solutions such as reference designs, application notes, software, tools and MCU families are listed at the end of each article to help you get started right away on your next design. Freescale continues to partner with innovators to make motors quieter, more efficient, smaller and to reduce mechanical vibration, and hopefully we can help you make them even smarter.
    [Show full text]
  • Freescale Embedded Solutions Based on ARM Technology Guide
    Embedded Solutions Based on ARM Technology Kinetis MCUs MAC5xxx MCUs i.MX applications processors QorIQ communications processors Vybrid controller solutions freescale.com/ARM ii Freescale Embedded Solutions Based on ARM Technology Table of Contents ARM Solutions Portfolio 2 i.MX Applications Processors 18 i.MX 6 series applications processors 20 Freescale Embedded Solutions Chart 4 i.MX53 applications processors 22 i.MX28 applications processors 23 Kinetis MCUs 6 Kinetis K series MCUs 7 i.MX and QorIQ Kinetis L series MCUs 9 Processor Comparison 24 Kinetis E series MCUs 11 Kinetis V series MCUs 12 Kinetis M series MCUs 13 QorIQ Communications Kinetis W series MCUs 14 Processors 25 Kinetis EA series MCUs 15 QorIQ LS1 family 26 QorIQ LS2 family 29 MAC5xxx MCUs 16 MAC57D5xx MCUs 17 Vybrid Controller Solutions 31 Vybrid VF3xx family 33 Vybrid VF5xx family 34 Vybrid VF6xx family 35 Design Resources 36 Freescale Enablement Solutions 37 Freescale Connect Partner Enablement Solutions 51 freescale.com/ARM 1 Scalable. Innovative. Leading. Your Number One Choice for ARM Solutions Freescale is the leader in embedded control, offering the market’s broadest and best-enabled portfolio of solutions based on ARM® technology. Our end-to-end portfolio of high-performance, power-efficient MCUs and digital networking processors help realize the potential of the Internet of Things, reflecting our unique ability to deliver scalable, systems- focused processing and connectivity. Our large ARM-powered portfolio includes enablement (software and tool) bundles scalable MCU and MPU families from small from Freescale and the extensive ARM ultra-low-power Kinetis MCUs to i.MX ecosystem.
    [Show full text]
  • CS-424/580A Microcontrollers and Robotics
    CS-424/580A Microcontrollers & Robotics CS-424/580A • Professor Richard R. Eckert – EB-N6, 777-4365 Microcontrollers and – Office hours: W 10-11:30 A.M., R 1-2:30 P.M. – Email: [email protected] Robotics – Web Page: www.cs.binghamton.edu/~reckert/ • Link to CS-424/580A – Class listserv • [email protected] • Active after first week of classes • TA: Chao Huang – Email: [email protected] – Office hours: TBA • Robotics Course Content – LEGO Mindstorms RCX • Microcontrollers – Programming with NQC – Architectures, instruction sets, and programming • Motor/sensor control • Microchip Technology’s PIC microcontrollers • Sound – PIC18F452 • Multitasking – Memory interface • Timers – Control of alphanumeric LCD displays • IR communication, data logging – Digital and analog I/O ports – Behavior architectures – A/D, D/A conversion, sensors – Robot navigation – Motor control, PWM – Robot vision control – Timers – Programming with Lejos Java – Interrupts – BIObot, interface with Microsoft .NET – Serial I/O – Robot communications • USARTs – Robot competition Lab The Microcontroller • Most important part of course • Common component in modern electronic systems • Every Friday, 1:10-4:10 P.M., LNG-210 • Computer on a single chip – We will meet this Friday • Students work in teams of three – Microprocessor-based device (the “core”) – Completely self contained with memory and I/O on • One report per team for lab experiments chip • 1st half of course: Microcontroller experiments • Primary role: – QuikFlash & QuikProto boards – Provide
    [Show full text]
  • SG187, Automotive, Q12014, Rev 54
    Freescale Semiconductor, Inc. Quarter 1, 2014 Selector Guide SG187 Q12014 Rev 54 Automotive Analog and Mixed-Signal Products Power Management Products Sensor Products Access and Remote Control Products S08 8-Bit Microcontroller Products S12 and S12X 16-Bit Microcontroller Products S12 MagniV Mixed-signal MCUs 56F8xxx Digital Signal Controller Products Qorivva MPC56xx and MPC55xx 32-Bit Products Image Cognition Processors FREESCALE SEMICONDUCTOR ANALOG AND MIXED-SIGNAL PRODUCTS The product categories range from Power Actuation and Communication Transceivers to Benefits — Freescale Semiconductor SMARTMOS technology brings a wide range of Signal Conditioning and Embedded MCU + Power. Power Actuation covers a broad range benefits to today’s designs, including component reductions, power flexibility, durability, of load control and drivers, including motor control. efficiency, precision, high-performance analog, and robustness. SMARTMOS™ — Freescale Semiconductor SMARTMOS technology allows designers to Packaging — Freescale devices may be offered in EPP and RoHS compliant packages. interface high-precision components with the harsh automotive environment. Cost-Effective — Ideally suited for rugged automotive applications, SMARTMOS solutions For additional information, visit: offer a cost-effective blend of analog, digital, and robust power silicon that enables integrated, mixed-signal, power control ICs. Documentation, Tool, and Product Libraries www.freescale.com Functionality — SMARTMOS solutions implement traditional analog functions with
    [Show full text]
  • SDCC Compiler User Guide
    SDCC Compiler User Guide SDCC 4.1.11 $Date:: 2021-09-17 #$ $Revision: 12682 $ Contents 1 Introduction 7 1.1 About SDCC.............................................7 1.2 SDCC Suite Licenses.........................................8 1.3 Documentation............................................9 1.4 Typographic conventions.......................................9 1.5 Compatibility with previous versions.................................9 1.6 System Requirements......................................... 11 1.7 Other Resources............................................ 12 2 Installing SDCC 13 2.1 Configure Options........................................... 13 2.2 Install paths.............................................. 15 2.3 Search Paths.............................................. 16 2.4 Building SDCC............................................ 18 2.4.1 Building SDCC on Linux.................................. 18 2.4.2 Building SDCC on Mac OS X................................ 19 2.4.3 Cross compiling SDCC on Linux for Windows....................... 19 2.4.4 Building SDCC using Cygwin and Mingw32........................ 19 2.4.5 Building SDCC Using Microsoft Visual C++ 2010 (MSVC)................ 20 2.4.6 Windows Install Using a ZIP Package............................ 21 2.4.7 Windows Install Using the Setup Program.......................... 21 2.4.8 VPATH feature........................................ 21 2.5 Building the Documentation..................................... 22 2.6 Reading the Documentation....................................
    [Show full text]
  • Microprocessor
    MICROPROCESSOR www.MPRonline.com THE REPORTINSIDER’S GUIDE TO MICROPROCESSOR HARDWARE FREESCALE’S FIRST FLEXIS MCUS New 8- and 32-Bit Microcontrollers Offer Pin Compatibility By Tom R. Halfhill {6/26/07-01} Years ago, some crazy hot-rod mechanics crammed V8 engines into their classic Volkswa- gen Beetles. This hardware hack wasn’t easy. The huge V8 transformed a cute Bug into a kludgy monstrosity. Freescale Semiconductor wants to bring a similar upgrade to embedded systems, only without the kludge quotient. At this capabilities of 8-bit MCUs—because of their limited pro- week’s Freescale Technology Forum in Orlando, Florida, cessing power, memory addressing, and I/O—there’s a grow- Freescale is unveiling the first microcontroller family with ing migration toward 32-bit MCUs. And the trend is to skip pin-compatible 8- and 32-bit devices. These new Flexis- 16-bit MCUs altogether. If 32 bits is the logical endpoint, family MCUs for consumer and industrial applications will developers don’t want to port their 8-bit designs more than allow developers to pull an 8-bit chip out of a socket, replace once. Economics also plays a role: in modern fabrication it with a 32-bit part, update the firmware, reboot, and con- processes, 32-bit MCUs can be as inexpensive to manufac- tinue running the system as before—except with much more ture as 8-bit MCUs. The 8-bitters are usually fabricated in horsepower. Freescale estimates that a 32-bit Flexis MCU can older, larger processes and are too pad-limited to benefit deliver eight to ten times more throughput, depending on the from further shrinkage.
    [Show full text]
  • HCS12 Reference Manual
    S12CPUV2 Reference Manual HCS12 Microcontrollers S12CPUV2 Rev. 4.0 03/2006 freescale.com S12CPUV2 Reference Manual To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com The following revision history table summarizes changes contained in this document. Revision History Revision Date Summary of Changes Number 3.0 April, 2002 Incorporated information covering HCS12 Family of 16-bit MCUs throughout the book. 4.0 March, 2006 Reformatted to Freescale publication standards. Corrected mistake in ANDCC/TAP descriptions (Instruction Glossary). Corrected mistake in MEM description (Instruction Glossary). Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. © Freescale Semiconductor, Inc., 2005. All rights reserved. S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 3 S12CPUV2 Reference Manual, Rev. 4.0 4 Freescale Semiconductor Reference Manual — S12CPUV2 List of Sections Table of Contents . .7 Section 1. Introduction . .15 Section 2. Overview . .21 Section 3. Addressing Modes . .29 Section 4. Instruction Queue . .47 Section 5. Instruction Set Overview . .55 Section 6. Instruction Glossary . .87 Section 7. Exception Processing. .311 Section 8. Instruction Queue . .323 Section 9. Fuzzy Logic Support. .337 Appendix A. Instruction Reference . .375 Appendix B. M68HC11 to CPU12 Upgrade Path. .403 Appendix C. High-Level Language Support . .425 Index . .433 S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 5 S12CPUV2 Reference Manual, Rev. 4.0 6 Freescale Semiconductor Reference Manual — S12CPUV2 Table of Contents Section 1. Introduction 1.1 Introduction .
    [Show full text]
  • Freescale Powerpoint Template
    TM October 2013 Freescale - A Global Leader in Five Core Product Four Primary Groups Markets Microcontrollers Automotive Automotive MCU Networking Digital Networking >50 Year Legacy Industrial >5,500 Engineers Analog & Sensors >6,000 Patent Families RF Consumer TM 2 Microcontroller Markets Market Trends … Market Dynamics • Internet of Things (IoT) WSTS – Revenue 6MMA $700M − Security & connectivity $500M • Software as building blocks to get to market faster • Low power $100M • Human Machine Interface (HMI) 4 BIT$ 8 BIT $ 16 BIT$ 32 BIT$ • Miniaturization: smaller form factor • 32-bit architectures over 40% of total MCU • 8-bit down 23% in 2 yrs; $5.3B ’10 to $4.1B ’12 • 32-bit has become the key market growth driver with ARM architecture leading TM TM 3 3 INTERNET OF THINGS Different Services, Different Technologies Different Meanings for Everyone And the Word Miniaturization & advances “SMART” in packaging technologies Advances in flash Is Everywhere! New class of powerful but low-cost & low-power MCUs Cloud-based services Our Vision Be the leader in the broad-based and connected MCU market supporting the Internet of Things (IoT) TM 4 Freescale has the industry’s broadest range of solutions built on ARM® technology for industrial, consumer, automotive and networking applications. Sensing and/or Connectivity Layers of Embedded Connectivity Remote Cloud-based Smart Devices Nodes Processing Nodes Nodes Processing Lots of Software in All Nodes Kinetis Vybrid Controller i.MX Applications QorIQ Processors Built on Layerscape Microcontrollers
    [Show full text]
  • 68HC11 Programmer's Reference Manual
    68HC11 Programmer's Reference Manual Phillip Musumeci [email protected] November 1999 Version 1.7 Credits Engineer proofreading: Dr. Barbara La Scala; • Cross Assembler for 68HC11: Motorola; • University of Wollongong F1 system: Pete Dunster; and • Many different public domain software tools: many helpful users. • References 1. Gene H. Miller, \Microcomputer Engineering", Prentice Hall, Englewood Cliffs, NJ 07632, 1993. ISBN 0-13-584475-4. 2. Motorola, \HC11 | M68HC11 Reference Manual", Part number M68HC11RM/AD. 3. Frederick F. Driscoll, Robert F. Coughlin, Robert S. Villanucci, \Data acquisition and process control with the M68HC11 micro-controller", Merrill/Macmillan Inter- national, 1994. ISBN 002330555X 4. Joseph L. Jones and Anita M. Flynn, \Mobile Robots: Inspiration to Implementa- tion", A.K. Peters, Wellesley, Massachusetts, 1993. ISBN 1-56881-011-3. 5. P. Dunster, \F1 System Reference Manual", held in file F1V11DOC.PS in the archive ftp://mirriwinni.cse.rmit.edu.au/pub/UoW/f1v11doc.zip 6. P. Musumeci, \Introduction to Microprocessor Systems", lecture notes and data packs are available from http://mirriwinni.cse.rmit.edu.au/~phillip/intro2up Notes The latest release of this manual (PDF) is available from • http://mirriwinni.cse.rmit.edu.au/~phillip/intro2up. This document was prepared using the teTeX distribution of LATEX1, dvips, and • xdvi. The diagrams were processed using the graphicx and pdftex packages of LATEX, and the ps2pdf utility from ghostscript. The language aware editor xemacs was used to prepare input text before checking with ispell. A (Free)BSD computing environment has been employed. Feedback Please email reports of errors in this document or suggestions for its improvement to • [email protected].
    [Show full text]