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Freescale.Com MC9S08QE32 MC9S08QE16 Reference Manual Related Documentation: HCS08 Microcontrollers • MC9S08QE32 (Data Sheet) Contains pin assignments and diagrams, all electrical specifications, and mechanical drawing outlines. Find the most current versions of all documents at: http://www.freescale.com MC9S08QE32RM Rev. 3 9/2011 freescale.com MC9S08QE32 Features Features – ACMPx — Two analog comparators with selectable interrupt • 8-Bit HCS08 Central Processor Unit (CPU) on rising, falling, or either edge of comparator output; – Up to 50.33 MHz HCS08 CPU at 3.6V to 2.4V, 40 MHz CPU compare option to fixed internal bandgap reference voltage; at 2.4 V to 2.1 V and 20 MHz CPU at 2.1 V to 1.8 V across outputs can be optionally routed to TPM module; operation in temperature range of –40 °C to 85 °C stop3 – HC08 instruction set with added BGND instruction – SCIx — Two serial communications interface modules with – Support for up to 32 interrupt/reset sources optional 13-bit break; full duplex non-return to zero (NRZ); •On-Chip Memory LIN master extended break generation; LIN slave extended – Flash read/program/erase over full operating voltage and break detection; wake up on active edge temperature – SPI — One serial peripheral interface; full-duplex or – Random-access memory (RAM) single-wire bidirectional; double-buffered transmit and – Security circuitry to prevent unauthorized access to RAM and receive; master or slave mode; MSB-first or LSB-first shifting flash contents – IIC — One IIC; up to 100 kbps with maximum bus loading; • Power-Saving Modes multi-master operation; programmable slave address; – Two very low power stop modes interrupt driven byte-by-byte data transfer; supports broadcast – Reduced power wait mode mode and 10-bit addressing – Peripheral clock enable register can disable clocks to unused – TPMx — One 6-channel (TPM3) and two 3-channel (TPM1 modules, thereby reducing currents; allows clocks to remain and TPM2); selectable input capture, output compare, or enabled to specific peripherals in stop3 mode buffered edge- or center-aligned PWM on each channel – Very low power external oscillator that can be used in run, – RTC — (Real-time counter) 8-bit modulus counter with wait, and stop modes to provide accurate clock source to real binary or decimal based prescaler; external clock source for time counter precise time base, time-of-day, calendar or task scheduling –6 s typical wakeup time from stop3 mode functions; free running on-chip low power oscillator (1 kHz) • Clock Source Options for cyclic wakeup without external components; runs in all – Oscillator (XOSCVLP) — Loop-control Pierce oscillator; MCU modes crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or • Input/Output 1 MHz to 16 MHz – 40 GPIOs, including 1 output-only pin and 1 input-only pin – Internal clock source (ICS) — Internal clock source module – 16 KBI interrupts with selectable polarity containing a frequency-locked-loop (FLL) controlled by – Hysteresis and configurable pullup device on all input pins; internal or external reference; precision trimming of internal configurable slew rate and drive strength on all output pins reference allows 0.2% resolution and 2% deviation over • Package Options temperature and voltage; supports CPU frequencies from – 48-pin QFN, 44-pin LQFP, 32-pin LQFP/QFN, 28-pin SOIC 4 kHz to 50.33 MHz • System Protection – Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source or bus clock – Low-voltage warning with interrupt. – Low-voltage detection with reset or interrupt; selectable trip points – Illegal opcode detection with reset – Illegal address detection with reset – Flash block protection • Development Support – Single-wire background debug interface – Breakpoint capability to allow single breakpoint setting during in-circuit debugging (plus three breakpoints in on-chip debug module) – On-chip in-circuit emulator (ICE) debug module containing three comparators and nine trigger modes; eight deep FIFO for storing change-of-flow addresses and event-only data; debug module supports both tag and force breakpoints • Peripherals – ADC — 10-channel, 12-bit resolution; 2.5 s conversion time; automatic compare function; 1.7 mV/C temperature sensor; internal bandgap reference channel; operation in stop3; fully functional from 3.6 V to 1.8 V MC9S08QE32 Series MCU Reference Manual Covers: MC9S08QE32 MC9S08QE16 MC9S08QE32 Rev. 3 9/2011 Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com The following revision history table summarizes changes contained in this document. Revision Revision Number Date Description of Changes 1 7/2/2008 Initial public release. Changed VDDAD to VDDA, VSSAD to VSSA. Updated Figure 4-2 and Figure 4-3. Updated Section 13.1.5, “RTC Clock Gating.” In Chapter 11, “Internal Clock Source (S08ICSV3),” added a note in Section 11.1.5.7, “Stop (STOP) ” updated Figure 11-2 to reflect ICSERCLK is gated off when STOP is high or when ERCLKEN is low. 2 5/5/2009 In Chapter 10, “Analog-to-Digital Converter (S08ADC12V1),” changed VDDA supply references to VDDA; fixed ADCRH:L description for compare operation, including an updates of Section 10.4.5, “Automatic Compare Function” description and ADCRH:L register descriptions (Section 10.3.3, “Data Result High Register (ADCRH) and Section 10.3.4, “Data Result Low Register (ADCRL).”) Reworded Chapter 16, “Timer/Pulse-Width Modulator (S08TPMV3).” 3 4/15/2009 Added 32-pin QFN package information. This product incorporates SuperFlash technology licensed from SST. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. Freescale Semiconductor, Inc., 2008-2011. All rights reserved. MC9S08QE32 Series MCU Reference Manual, Rev. 3 6 Freescale Semiconductor List of Chapters Chapter 1 Device Overview . .19 Chapter 2 Pins and Connections . .23 Chapter 3 Modes of Operation . .35 Chapter 4 Memory . .47 Chapter 5 Resets, Interrupts, and General System Control . .69 Chapter 6 Parallel Input/Output Control . .89 Chapter 7 Keyboard Interrupt (S08KBIV2) . .105 Chapter 8 Central Processor Unit (S08CPUV4) . .113 Chapter 9 Analog Comparator 3V (ACMPVLPV1). .133 Chapter 10 Analog-to-Digital Converter (S08ADC12V1) . .139 Chapter 11 Internal Clock Source (S08ICSV3) . .167 Chapter 12 Inter-Integrated Circuit (S08IICV2) . .181 Chapter 13 Real-Time Counter (S08RTCV1) . .199 Chapter 14 Serial Communications Interface (S08SCIV4). .209 Chapter 15 Serial Peripheral Interface (S08SPIV3). .229 Chapter 16 Timer/Pulse-Width Modulator (S08TPMV3) . .245 Chapter 17 Development Support . .269 Chapter 18 Debug Module (S08DBGV3) (64K) . .281 MC9S08QE32 Series MCU Reference Manual, Rev. 3 Freescale Semiconductor 7 Contents Section Number Title Page Chapter 1 Device Overview 1.1 Devices in the MC9S08QE32 Series ..............................................................................................19 1.2 MCU Block Diagram ......................................................................................................................20 1.3 System Clock Distribution ..............................................................................................................21 Chapter 2 Pins and Connections 2.1 Device Pin Assignment ...................................................................................................................23 2.2 Recommended System Connections ...............................................................................................28 2.2.1 Power ................................................................................................................................29 2.2.2 Oscillator ...........................................................................................................................29 2.2.3 RESET Pin ........................................................................................................................29 2.2.4 Background / Mode Select (BKGD/MS) ..........................................................................30 2.2.5 General-Purpose I/O (GPIO) and Peripheral Ports ...........................................................31 Chapter 3 Modes of Operation 3.1 Introduction .....................................................................................................................................35 3.2 Features ...........................................................................................................................................35 3.3 Run Mode ........................................................................................................................................35 3.3.1 Low Power Run Mode (LPRun) .......................................................................................35 3.4 Active Background Mode ...............................................................................................................36 3.5 Wait Mode .......................................................................................................................................37 3.5.1 Low-Power Wait Mode (LPWait) .....................................................................................38 3.6 Stop Modes ......................................................................................................................................38 3.6.1 Stop2 Mode .......................................................................................................................39
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