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Test and Characterization Methodologies for Advanced Technology Nodes Darayus Adil Patel

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Test and Characterization Methodologies for Advanced Technology Nodes Darayus Adil Patel Test and characterization methodologies for advanced technology nodes Darayus Adil Patel To cite this version: Darayus Adil Patel. Test and characterization methodologies for advanced technology nodes. Elec- tronics. Université Montpellier, 2016. English. NNT : 2016MONTT285. tel-01808874 HAL Id: tel-01808874 https://tel.archives-ouvertes.fr/tel-01808874 Submitted on 6 Jun 2018 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Délivré par Université de Montpellier Préparée au sein de l’école doctorale I2S Et de l’unité de recherche LIRMM Spécialité : SYAM Présentée par DARAYUS ADIL PATEL TEST AND CHARACTERIZATION METHODOLOGIES FOR ADVANCED TECHNOLOGY NODES Soutenue le 5 Juillet 2016 devant le jury composé de M. Daniel CHILLET Professeur, Université de Président du Jury / Rennes Rapporteur M. Salvador MIR Directeur de Recherche Rapporteur CNRS, TIMA Mme. Sylvie NAUDET Team Leader, Examinateur STMicroelectronics M. Alberto BOSIO MCF HDR, Université de Examinateur Montpellier M. Patrick GIRARD Directeur de Recherche Directeur de Thèse CNRS, LIRMM M. Arnaud VIRAZEL MCF HDR, Université de co-Directeur de Montpellier Thèse Mme. Béatrice PRADARELLI PAST, Université de Membre Invitée Montpellier TEST AND CHARACTERIZATION METHODOLOGIES FOR ADVANCED TECHNOLOGY NODES Presented by Darayus Adil Patel STMicroelectronics Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier Université de Montpellier This dissertation is submitted for the degree of Doctor of Philosophy July 2016 Dedicated to my Beloved Parents and The Digital Test Team at ST Crolles ABSTRACT The introduction of nanometer technologies, has allowed the semiconductor industry to create nanoscale devices in combination with gigascale complexity. However, new technologies bring with them new challenges. In the era of large systems embedded in a single System-On-Chip and fabricated in continuously shrinking technologies, it is important to test and ensure fault-free operation of the whole system. The cost involved in semiconductor test has been steadily growing and testing techniques for integrated circuits are today facing many exciting and complex challenges. Although important advances have been made, existing test solutions are still unable to exhaustively cover all types of defects in advanced technology nodes. Consequently, innovative solutions are required to cope with new failure mechanisms under the constraints of higher density and complexity, cost and time to market pressure, product quality level and usage of low cost test equipment. The work of this thesis is focused on the development of silicon test and characterization methodologies that aid in the accurate detection and resolution of issues that may arise due to variability, manufacturing defects, wear-out or interference. A wide spectrum of these challenges has been addressed from a test perspective to ensure that the availability of effective test solutions does not become a bottleneck in the path towards further scaling. Additionally the advances and innovations introduced in the myriad domains of electronic design, reliability management, manufacturing process improvements etc. that call for the development of advanced, modular and agile test methodologies have been effectively covered within the scope of this work. This manuscript presents the significant contributions made for enabling resolution of state of the art industrial test challenges via the design and implementation of novel test strategies (targeting the 28nm FDSOI technology node) for: · Detection & diagnosis of timing faults in standard cells. · Analysis of Setup and Hold margins within silicon. · Verification & reliability analysis of innovative test structures. · Analysis of on-chip self heating. · Enabling characterization and performance evaluation of high speed digital IPs. i ii ACKNOWLEDGEMENTS “If I have seen further than others, it is by standing upon the shoulders of giants. ” Issac Newton First and foremost, I would begin by thanking my Lord, the Almighty, for holding my hand and showing the path ahead throughout the course of my thesis. Only due to His countless gifts of sense, intellect, patience, health, family and many more, could I complete this task. Thank you for the strength you have given me and all the wonderful people around me who made the past three years truly meaningful. During my time at STMicroelectronics, I was extremely fortunate to have had the opportunity to learn and grow under the tutelage of my super amazing ‘Maman’, Dr. Sylvie Naudet during the development of this work. I would like to gratefully and sincerely thank Sylvie for her care, understanding, patience and most importantly friendship during the course of my thesis from inception to completion. Despite her busy schedule, Maman always kept a watchful eye over me and provided me with her invaluable guidance whenever needed. To synthesize, I consider myself truly privileged to have had this opportunity to grow my intellectual prowess, sharpen my critical thinking and understand the subtle nuances of the game of life under her umbrella. I am very grateful to my Professors Patrick Girard, Arnaud Virazel & Alberto Bosio for their guidance, support and regular feedback throughout the course of my thesis. Also for their thought-provoking ideas and helpful criticism in improving the quality of this manuscript and other publications. Working at LIRMM under their supervision, helped me to understand and better appreciate the academic essence of any project. I am thankful for their time, efforts and constant interaction all along. Their invaluable advises helped keeping my research well directed while maintaining my autonomy. Perhaps I owe my largest quantum of gratitude to the truly awesome team that I was lucky to be part of at ST Crolles. Thank you Daniel Noblet for being the huge pillar of strength that you have been for me all throughout and the ginormous force of positivity that you are. Thank you Fabien for being a great Mentor and friend. While learning from you I have always been inspired by your attitude, zeal and enthusiasm iii towards any given task. Thank you Damien Croain & Daniel Caspar for always being there to shine light upon any technical darkness that befell me. Your mere presence gave me the confidence that the solution to any problem could be mined out of your mountains of know ledge. Merci beacoup my ‘Queen’ Fran çoise for your camaraderie and royal influence. Many thanks to David Meyer & David Bonciani for being the great friends that you are to me. I shall always greatly appreciate and fondly remember all your support and help. Thank you Julien Berger for always being accommodating and helpful. Thank you Robert ‘Bob’ Seilles for teaching me among many things that there is a great deal more to life than just work. Thank you Loïc for always being Good. Being part of such a wonderful team greatly accelerated my learning curve and made life a joyful journey. A special word of thanks goes to Deepak Kumar Arora & Kapil Juneja at ST Noida. It was an enriching experience working with them as I benefited from their clarity of thought and lucidity in explanation. Despite their hectic workloads they were always available to have discussions and help me solve my doubts. I would also like to acknowledge all the other people with whom I had the pleasure and privilege of collaborating with. They are Abhishek Jain, Rajesh Kumar Immadi, Sujatha Balaraman, Philippe Brahic, Sylvain Clerc, Fady Abouzeid, Franck Gardik, Jeff Nowakowski, Guy Bossan, Shahabuddin Qureshi, Fabrice Carite, Manoubi Bourabei, Gilles Lievre, Dennis Roche, Vincent Huard and Robin Wilson. I would also like to express my gratitude to two of my most cherished friends Giulio & Giulio with whom I shared the path during these last three years. Words are not enough to describe them, they are really extraordinary. Thank you for the great support in the moments when I needed help, for all the great time that we have spent together and most of all for your friendship. Also a big thank you to Anu Asokan, Imran Wali, Aymen Touati, Alejandro Nocua & Amit Karel at LIRMM for their warm friendships and companionship. And at last, but certainly not the least, thanks to my parents who have never lost their faith in me and have always supported me in every decision I took, no matter how far away from home it has taken me. Their constant support and strength has aided and encouraged me throughout this endeavor. I shall forever remain indebted for your love and sacrifice. Darayus Adil Patel iv TABLE OF CONTENTS ABSTRACT ..................................................................................................................... I ACKNOWLEDGEMENTS ......................................................................................... III TABLE OF CONTENTS ............................................................................................... V LIST OF FIGURES ..................................................................................................... IX LIST OF TABLES
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