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The 32-Bit PA-RISC Run-Time Architecture Document, V. 1.0 for HP
Processor-103
The 32-Bit PA-RISC Run- Time Architecture Document
Design of the RISC-V Instruction Set Architecture
A Lisp Oriented Architecture by John W.F
Brief History of Microprogramming
POWER4 System Microarchitecture
The RISC-V Instruction Set Manual Volume I: User-Level ISA Document Version 2.2
Enhancing the RISC-V Instruction Set Architecture
Data and Control Dependence Handling
Overview Programming Model Cache and Bus Interface Unit Operation
Coding Assembler for Performance
Design of the RISC-V Instruction Set Architecture by Andrew Shell
Core Dispatch and SMT Enablement in Z13 Processor
The RISC-V Instruction Set Manual Volume I: Unprivileged ISA Document Version 20180801-Draft
IBM Z Systems Hardware - 2016 Technical Overview
IBM Research Report Performance and Security Lessons Learned from Virtualizing the Alpha Processor
Performance Analysis and Tuning – Part I
Top View
Register Reassociation in PA-RISC Compilers, by Vatsa Santhanam
IBM Presentations: Blue Pearl Basic Template
The RISC-V Instruction Set Manual Volume I: Unprivileged ISA Document Version 20190608-Base-Ratified
MAINFRAME EFFICIENCY at HIGH UTILIZATION Bob Rogers Overview
System Z Hardware Peeled: Z/OS Hardware from the Inside Out
IBM Z Systems Processor Optimization Primer V2
IBM Zseries Mainframes
How Do You Do What You Do When You're a Z13
System Z Hardware Peeled: Z/OS Hardware from the Inside Out
Coupling Technology Overview and Planning What's the Right Stuff For
The Microarchitecture of the IBM Eserver Z900 Processor
Lecture 7: Pipelining
United States Patent (19) 11 Patent Number: 5,790,844 Webb Et Al
Architectural Techniques for Improving the Power Consumption of Noc-Based Cmps: a Case Study of Cache and Network Layer
SHARE2011 LSPR and Z196 Performance Brief
Processors — a Cautionary Note
18-741 Advanced Computer Architecture Lecture 1: Intro and Basics
IBM Z/Architecture CPU Features a Historical Perspective
INFORMATION to USERS While the Most Advanced Technology Has
Design and Microarchitecture of the IBM System Z10 Microprocessor
RM0245 ST200 Run-Time Architecture
Exploiting Modern Microarchitectures: Meltdown, Spectre, and Other Attacks
Practical Systems for Overcoming Processor Imperfections
The What and Why of System Z Millicode