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Power Modeling of Embedded Memories

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Power Modeling of Embedded Memories Carl von Ossietzky Universit¨atOldenburg Fachbereich Informatik Dissertation Power Modeling of Embedded Memories Eike Schmidt March 25, 2003 zur Erlangung des Grades eines Doktors der Ingenieurswissenschaften Gutachter/Supervisor: Professor Dr. Wolfgang Nebel Zweitgutachter/Reviewer: Professor Dr. Norbert Wehn Tag der Disputation: 10. Februar 2003 Synopsys and the Synopsys product names described herein are trademarks of Synospys, Inc. c 2002,2003 by Eike Schmidt To my family Abstract After Moore’s Law the number of transistors on an integrated circuit doubles every 18 months. New circuits are furthermore clocked with increasing frequencies. This development not only leads to an increase of the available functionality, but also to a rise of the electrical power consumption of these systems. The power consumption of integrated circuits is problematic in two respects: on one hand the power must be fed into the system, on the other hand the heat produced on the chip must be dissipated. An increased power consumption consequently leads to reduced battery lifetimes and increased energy costs. Today already 80% of the office related power consumption in the USA stems from computers. The heat development of integrated circuits reduces their reliability and lifetime. The required cooling measures (ceramic packages, heat fins, fans, etc.) furthermore increase the system cost. For the development of low power systems it is necessary to estimate and consider the power consumption already in the early stages of design. For such estimates models of the system blocks are required. This thesis describes a methodology for the generation of models of the power consumption of embedded memories. Memories have a special importance among the system blocks as it is forecast that more than 90% of the area of newly developed systems will be occupied by memory within ten years. In addition to the requirements on models, like accuracy, speed and mathematically closed form the presented approach specifically adresses the requirements on the modeling procedure. These are mainly the protection of intellectual property and low modeling costs. As a key point of the approach a method for the generation of nonlinear (signomial) models from empirical data is presented. This regression based method allows the generation of piecewise model functions, which can be used for optimisation through geometric programs. The presented models reduce the prediction error by up to 95% compared to existing approaches. v Abstract vi Zusammenfassung Nach Moore’s Law verdoppelt sich die Zahl der auf einem Computerchip integrierbaren Transistoren alle 18 Monate. Neue Schaltungen werden dar¨uber hinaus mit immer gr¨oßeren Geschwindigkeiten betrieben. Diese Entwicklung f¨uhrt nicht nur zu der gew¨unschten Zunahme an verf¨ugbarer Funktionalit¨at,sondern auch zum Anstieg der elektrischen Leistungsaufnahme dieser Systeme. Die Leistungsaufnahme Integrierter Schaltungen ist aus zwei Blickwinkeln problematisch: Zum einen muss die Leistung dem System zugef¨uhrt, zum andere die entstehende W¨armeabgef¨uhrt werden. Eine erh¨ohte Leistungsaufnahme f¨uhrt daher zu sinkenden Batterie- und Akkubetriebszeiten und erh¨ohten Energiekosten. Schon jetzt entfallen 80% der in den USA in B¨uroumgebungen verbrauchten Energie auf Computersysteme. Die W¨armeentwicklung von Integrierten Schaltungen reduziert ihre Verl¨assigkeit und Lebensdauer. Die notwendigen K¨uhlungsmaßnahmen (Keramikgeh¨ause,K¨uhlk¨orper, L¨ufter, etc.) erh¨ohen zudem die Systemkosten. Zur Entwicklung von verlustleistungsarmen Systemen ist es notwendig, die Leistungsaufnahme bereits fr¨uhim Entwurf abzusch¨atzen und in Entwurfsentscheidungen einzubeziehen. F¨ur solche Absch¨atzungen sind Modelle der Strukturbl¨ocke notwendig. Diese Arbeit beschreibt eine Methodik f¨ur die Erstellung von Modellen der Leistungsaufnahme von eingebetteten Speichern. Speichern kommt unter den Strukturbl¨ocken eine besondere Bedeutung zu, da sie in 10 Jahren voraussichtlich ¨uber 90% der Fl¨ache neuentwickelter Schaltungen einnehmen werden. Neben den Anforderungen an die Modelle, wie Genauigkeit, Geschwindigkeit und mathematischer Geschlossenheit ber¨ucksichtigt der vorgestellte Ansatz insbesondere Anforderungen an den Modellierungsprozess selbst. Dies sind haupts¨achlich der Schutz intellektuellen Eigentums, sowie die Gew¨ahrleistung niedriger Model- lierungskosten. Als Kernpunkt der Methodik wird ein Verfahren zur Generierung nichtlinearer (signomialer) Modelle aus empirischen Daten vorgestellt. Das regressionsbasierte Verfahren erlaubt die Erzeugung st¨uckweiser Modellfunktionen, welche ¨uber geometrische Programme optimierbar sind. Die vorgestellten Modelle reduzieren den Vorhersagefehler um bis zu 95% verglichen mit bisherigen Ans¨atzen. vii Zusammenfassung viii Acknowledgements First of all I would like to thank my supervisor Prof. Dr. Wolfgang Nebel for his trust and support. He created the fruitful scientific environment that I was glad to share. I would also like to thank Prof. Dr. Norbert Wehn for taking the time to review this document. Let me express my gratitude to my colleagues at the OFFIS, the University and Chip Vision Design Systems.. Special thanks to Dr. Gerd von C¨olln, Dr. Lars Kruse, Ansgar Stammermann and Domenik Helms for many discussions and insightful comments. And all the other people that shared their opinions and advice, like project partners and the people at the Philips Natlab: thank you. On a personal note I would like to say thank you to my family for the unwavering support and the vivid interest during all these years. A special thank you to Nicole for giving me the space, the support and the love to finish this work with many extra hours. I could not have done this without you. My apologies to the friends that I neglected too long. Last but not least my gratitude goes to my employer, the Kuratorium OFFIS e.V., for giving me the opportunity to participate in the EU projects PEOPLE and POET in which the foundations of the presented work were conceived. ix Acknowledgements x Contents Abstract v Zusammenfassung vii Acknowledgements ix 1 Introduction 1 1.1 Power Consumption . 1 1.2 Memories . 2 1.3 IC Design . 2 1.4 Design Automation . 3 1.5 Models . 3 1.6 Scope and Main Contributions . 4 1.7 Chapter Overview . 4 2 Power Consumption in Memory Circuits 5 2.1 Sources of power dissipation . 5 2.2 Classification of memories . 6 2.3 Block architecture . 7 2.3.1 Address Logic . 8 2.3.2 Read/Write Circuitry . 9 2.3.3 Auxiliary Circuitry . 9 2.4 Types of Memories . 9 2.4.1 Static RAM . 9 2.4.2 Dynamic RAM . 9 2.4.3 ROM . 10 2.4.4 Caches . 11 2.4.5 Register Files . 12 2.4.6 Trends in Memory Development . 12 2.5 Off-chip versus Embedded Memory . 13 2.5.1 Off-chip Memories . 13 2.5.2 Embedded Memory . 14 2.6 Memory Optimization . 14 3 Modeling 19 3.1 Introduction . 19 3.2 Statistical Basics . 20 3.2.1 Random Variables . 20 3.2.2 Experimental Designs . 20 3.2.3 Regression . 21 3.2.4 Interval Estimation . 22 3.2.5 Significance test . 22 3.2.6 Interpolation . 23 3.2.7 Error measures . 24 xi Contents 3.2.8 Cross Validation . 25 3.3 Requirements . 25 3.3.1 Requirements on the models . 25 3.3.2 Requirements on the Modeling Process . 26 3.3.3 Specific Requirements of Memory Power Modeling . 26 4 Related Work 29 4.1 Conceptual Modeling . 29 4.2 Empirical Modeling . 33 4.2.1 Interpolation Techniques . 33 4.2.2 Regression Techniques . 33 4.3 Eclectic Modeling . 34 4.4 Discussion . 35 4.5 Empirical methods . 35 5 Embedded Memory Modeling Methodology 37 5.1 Data Abstraction . 37 5.2 Data Acquisition . 38 5.2.1 Experimental Design . 38 5.2.2 Characterization . 39 5.3 Identification and Fitting . 40 5.3.1 Signomial Models . 41 5.3.2 Variable transformations . 42 5.3.3 Variable Selection . 45 5.3.4 Model Generation Algorithm . 45 5.3.5 Convergence and performance . 47 5.3.6 Relation to other work . 47 5.4 Validation . 48 5.4.1 Mathematical Measures for Quality of Fit . 48 5.4.2 Visual Inspection . 49 5.4.3 Criteria of Acceptance . 50 5.5 Iteration . 50 5.5.1 Piecewise Modeling . 51 5.6 Optimization . 56 5.7 Rounding . 58 5.8 Summary . ..
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