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Process Variations and Probabilistic Integrated Circuit Design Manfred Dietrich • Joachim Haase Editors Process Variations and Probabilistic Integrated Circuit Design 123 Editors Manfred Dietrich Joachim Haase Design Automation Division EAS Design Automation Division EAS Fraunhofer-Institut Integrierte Schaltungen Fraunhofer-Institut Integrierte Schaltungen Zeunerstr. 38, 01069 Dresden Zeunerstr. 38, 01069 Dresden Germany Germany [email protected] [email protected] ISBN 978-1-4419-6620-9 e-ISBN 978-1-4419-6621-6 DOI 10.1007/978-1-4419-6621-6 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011940313 © Springer Science+Business Media, LLC 2012 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com) Preface Continued advances in semiconductor technology play a fundamental role in fueling every aspect of innovation in those industries in which electronics is used. In particular, one cannot fail to appreciate the benefits these advances offer in either reducing the dimensions into which an electronic system can be built or increasing the sheer complexity and overall functionality of the individual circuits. In general, industry tends more to take advantage of the opportunity of offering additional features and capability within a given space that reducing the overall size. Whereas the manufacturing industry has matched the advances in the semicon- ductor industry so that failure rates during fabrication at each stage have been maintained at the same rate per element, the number of elements has increased astronomically. As a result, unless measures are not taken, the overall failure rates during production will increase dramatically. There are certain factors that will compound this trend, for example the fact that semiconductor technology yields may be a function of factors other than simple manufacturing ability and may become unacceptable as functional density increases. It is thus essential to investigate which parameters of the various manufacturing processes are the most sensitive in the production failure equation, and to explore how their influence can be reduced. If one focuses on the integrated circuit itself, one might consider either address- ing the parameters associated with the silicon processing, the disciplines involved in the design activity flow, or better still, both! In fact they are combined in a new design approach referred to as statistical analysis. This is heralded by many as the next-generation EDA technology and is currently oriented specifically at addressing timing analysis and power sign-off. Research into this field commenced about five years ago and saw significant activity during the period since that start, although there are indications of reduced interest of late. This decline in activity may be partly due to the fact that the results of the work have been slow to find application. Perhaps the key direction identified during this period has been the need to develop and optimize statistical models for integrated circuit library components, and it is in this v vi Preface area that effort will probably concentrate in the near future. This book will present some results from research into this area and demonstrate how the manufacturing parameter variations impact the design flow. On the one hand, it is the objective of this book to provide designers with a qualitative understanding of how process variations influence circuit behavior and to indicate the most dominant parameters. On the other hand, from a practical point of view, it must also acknowledge that designers need appropriate tools and strategies to evaluate process variants and extract the modeling parameters. It is true that certain modeling methods have been employed over the years and constitute the framework under which submicron integrated circuits have been developed to date. These have concentrated on evaluating a myriad of electrical model parameters and their variation. This has led to an accurate determination of the inter-dependence of these parameters under given conditions and does provide the circuit developer with certain design information. For example, the designer can determine whether the leakage current of a given cell or circuit is greater than a key threshold specification, and similar determinations of power and delay can be made. In fact, this modeling approach can include many parameters of low order effect yet can be defined in such a way that many may be easily monitored and optimized in the fabrication technology. However, this specific case and corner analysis cannot assess such key factors as yield and is too pessimistic and still too inaccurate to describe all variation effects, particularly those than involve parameters with non-linear models and non- Gaussian distributions. It is only from an appreciation of these current problems that one can understand that the benefits of advanced technologies can only be realized using an alternative approach such an advanced statistical design. It is an initial insight into these new methods that the editors wish to present in these pages. It is not the objective to look at the ultimate potential that will be achieved using these methods, rather to present information on the research already complete. The start-point is the presentation of key mathematical and physical fundamentals, an essential basis for an appreciation of the subsequent chapters. It is also important that the reader understand the main causes of parameter variations during production and to appreciate that appropriate statistical methods must be accommodated in the design flow. This discussion leads into an overview of the current statistical methods and methodologies which are presented from the designer’s perspective. Thus the text leans towards the forms of analysis and their use rather than a derivation of the underlying algorithms. This discussion is supported by some examples in which the methods are used to improve circuit designs Above all, through presenting the subject of process variation in the present form, the editors wish to stimulate further discussion and recapture the earlier interest and momentum in academic research. Without such activity, the strides made to date towards developing methods to estimate such factors as yield and quality at the design stage will be lost, and realizing the potential advantages of future technology nodes may escape our grasp. To engender this interest in such a broad field, the core of the book will limit its scope to: Preface vii • exploring the impact of production variations from various points of view, including manufacturing, EDA methods and circuit design techniques • explaining the impact through simple reproducible examples. Within this framework, the editors aim to present material that emphasizes the problems that arise because of intrinsic parameter variations, illustrates the differ- ences between the various methods used to address the variations, and indicates the direction in which one must set course to find general solutions. The core material for the book came from many sources – from consultation with many experts in the semiconductor and EDA industries, from research centers, and from university staff. It is only from such a wide canvas that the book could genuinely represent the broad spectrum of views that surround this subject. The heart of the book is thus that of these contributors, experts in the field who have embodied their frustrations and practical experience in each page. Certain chapters of the book use results obtained during two German re- search projects which received funding from the German Federal Ministry of Education and Research (BMBF). These projects are entitled ”Sigma 65: Tech- nologiebasierte Modellierung und Analyseverfahren unter Bercksichtigung von Streuungen im 65nm-Knoten” (Technology based modeling and analyzing meth- ods considering variations within 65nm technology) and ”ENERGIE: Technolo- gien fr energieeffiziente Computing-Plattformen”(Technologies for energy-efficient computing platforms; the subproject is part of the the Leading-Edge Cluster CoolSilicon) 1. Both projects address technology nodes beyond 65nm. All contributors would like to thank the Springer Publishing Company for giving them the opportunity to write this book and have it published. Special thanks go to our Editor, Charles Glaser, for his understanding, encouragement, and support during the conception and composition of this book. We also thank very much Elizabeth Dougherty and Pasupathy Rathika for their assistance, efforts and patience during the preparation of the print version. Last but not least, we cannot close without thanking also the management and our colleagues at the Fraunhofer-Gesellschaft (Design Automation