POWERVR GPU IP Core1 Family

POWERVR GPU IP core1 family

By Yu zihao, Tang siyuan

1. IP core: IP 核核核（（（Intelligence （ Property ）））是指用于产品应用专用集成电路）是指用于产品应用专用集成电路(ASIC) 或者可编辑逻辑器件 (FPGA) 的逻辑块或数据块的逻辑块。。。或数据块。 GPU

• Graphic Processing Unit

• T & L (Transform and Lighting1)

• Use float point number FLOPS

• Two-dimensional segmental storage2

1. lighting: 光照光照光照 2. 包括一个区段号包括一个区段号（（（（从中读取图像从中读取图像从中读取图像））））和二维地址和二维地址和二维地址（（（（图像中的图像中的 X、、、Y坐标坐标坐标）坐标））） Background

• Designed by Imagination Technology Co. • Originally introduced to compete in desktop PC market • Low-power • TBDR1 [VS IMR2]

1. TBDR: tile-based deferred rendering, 基于划分的延迟渲染 2. IR: Immediate Mode Rendering, 即时模式渲染 TA ( Tile Accelerator ) • storing the scene data • dividing the screen into tiles • distributing the 3D data among the screen tiles ISP ( Image Synthesis Processor ) • performing HSR 1 • determining which pixels are visible or not TSP ( Texture and Shading Processor ) • shading and texturing pixels 1. HSR: Hidden Surface Removal, 隐面消除

Tiling • Reduced external memory bandwidth requirement • Great cache efficiency and parallel processing of localized data • The data for each tile is stored in board memory and contains all the polygons which affect this tile

Storing parameters • Create a “display list” for each tile on the screen • The display lists contain all relevant scene data, including triangles, texture handles, multi-texturing arguments, render states, etc Vertex stripping • A primitive type requiring less memory than triangle lists • Using strips, n triangles are defined by n+2 vertices Tile Buffer • Contains pointers to the triangles present in the tile • Consists in a linked list of pointers pointing to strip data in local memory • The same strip can cross a tile boundary; in this case a pointer to the strip data will be added to the display list of both tiles. Visible Pixel Determination • Hidden Surface Removal is performed on a tile per tile basis • Only the triangles affecting a tile will be processed • Calculating the triangle equation and projecting a ray at each position in the triangle return accurate depth information for all pixels. • This depth information is then compared with the values in the tile’s depth buffer to determine whether these pixels are visible or not. ISP Output and Texture Grouping • Each pixel has a “tag” attached to it whose role is to identify the polygon properties that should be used to texture this pixel • Indeed dealing with whole polygons sharing the same texture properties greatly improves cache memory efficiency • Re-ordering this data into whole polygons • All pixels of the same texture handle are grouped together to maximize cache effectiveness • This module also acts as an input FIFO to the TSP Shading and Texturing • The output spans from the Texture Grouping module tell the TSP what are the lighting and texturing parameters, and what pixels they affect in the tile • All shading and texturing takes place with 32 bits of colour precision • Independent of the frame buffer colour depth

POWERVR SGX(series 5) 4.Sending1.Data2.Coarse3.Tile Processing distributing grain to frame scheduling buffer （（帧缓存（线程块调度帧缓存线程块调度）） USSE(Universal Scalable Shader Engine)

•Multi-threaded multimedia processing combine graphics,video,image processing capacities physics model

•Programmable and highly flexible

•Advanced microkernel rapid text switching and multi-API support Advantage • Optimal hardware load balance

• Maximum latency tolerance minimum stalling, no pixel shading of non-visible pixels, on- chip support for multiple render targets (MRT)

• Efficient gate use Single software programming model and compiler

• Additional hardware engines accelerators and coprocessors System Level Cache

• A range of pre-verified system level cache configurations (32, 64 and 128KB)

• Further reduce the bandwidth usage and maximize latency tolerance through access profile optimized caching

Applications

Mainly in Embedded system such as: •Smart phones,Apple A4

•Game consoles

•Navigation devices • http://en.wikipedia.org/wiki/PowerVR#Technology

• http://www.imgtec.com/powervr/sgx_series5.asp

• Filename : POWERVR MBX.Technology Overview.mht Version : 1.5f (POWERVR SDK 2.05.25.0295) Issue Date : 06 May 2009 Author : POWERVR

• http://bbs.gfan.com/thread-1706612-1-1.html