Wide-Range Operation of High Step-Up DC-DC Converters with Multimode Rectiﬁers

electronics

Article Wide-Range Operation of High Step-Up DC-DC Converters with Multimode Rectiﬁers

Andrii Chub 1 , Dmitri Vinnikov 1,2,* , Oleksandr Korkh 1, Tanel Jalakas 1 and Galina Demidova 2

1 Power Electronics Group, Department of Electrical Power Engineering and Mechatronics, Tallinn University of Technology, Ehitajate tee 5, 19086 Tallinn, Estonia; [email protected] (A.C.); [email protected] (O.K.); [email protected] (T.J.) 2 Faculty of Control System and Robotics, ITMO University, 197101 St. Petersburg, Russia; [email protected] * Correspondence: [email protected]; Tel.: +372-620-3705

Abstract: This paper discusses the essence and application specifics of the multimode rectifiers in high step-up DC-DC converters. It presents an overview of existing multimode rectifiers. Their use enables operation in the wide input voltage range needed in highly demanding applications. Owing to the rectifier mode changes, the converter duty cycle can be restricted to a range with a favorable efficiency. It is shown that the performance of such converters depends on the front-end inverter type. The study considers current- and impedance-source front-end topologies, as they are the most relevant in high step-up applications. It is explained why the full- and half-bridge implementations provide essentially different performances. Unlike the half-bridge, the full-bridge implementation shows step changes in efficiency during the rectifier mode changes, which could compromise the long-term reliability of the converter. The theoretical predictions are corroborated by experimental examples to compare performance with different boost front-end inverters.

Citation: Chub, A.; Vinnikov, D.; Keywords: DC-DC converters; high step-up converters; wide input range; multimode rectifier Korkh, O.; Jalakas, T.; Demidova, G. Wide-Range Operation of High Step-Up DC-DC Converters with Multimode Rectifiers. Electronics 2021, 10, 914. https://doi.org/10.3390/ 1. Introduction electronics10080914 Power electronics is a critical technology for the ongoing energy transition through electrification [1]. As a result, distributed energy generation systems have been proliferating Academic Editors: Bor-Ren Lin and in residential applications. New and existing applications impose new requirements on Nikolay Hinov converter designs to improve flexibility and performance over the existing solutions. Among the modern applications of power electronics, residential dc microgrids provide Received: 27 December 2020 significant improvements in energy efficiency in residential settings. On the other hand, Accepted: 8 April 2021 they require the integration of low-voltage energy sources and battery energy storage into Published: 12 April 2021 a dc bus operating at a considerably higher dc voltage. Therefore, residential dc microgrids require new power electronic solutions to interface with low-voltage energy sources and Publisher’s Note: MDPI stays neutral battery energy storage [2]. with regard to jurisdictional claims in Today, high step-up DC-DC converters with a wide voltage gain range are demanded published maps and institutional affil- in different applications, especially in photovoltaic (PV) module-level power electronics iations. (MLPE) [3,4], or in applications with configurable output voltages [5]. Such converters are usually comprised of three stages, according to Figure1:

- A boost (step-up) front-end inverter (BFEI) is fed with the input voltage VIN. BFEI supplies pulsed high-frequency voltage V to the transformer primary winding. Copyright: © 2021 by the authors. TX,pr Licensee MDPI, Basel, Switzerland. This voltage could be asymmetrical, but it is volt-second balanced to avoid transformer This article is an open access article saturation. Considering that the peak-to-peak swing of the voltage applied to the distributed under the terms and transformer equals VTX,pr(pk-pk), the dc-ac voltage gain of the BFEI (GFE) could be conditions of the Creative Commons deﬁned as the ratio between this peak-to-peak voltage swing and the input dc voltage, Attribution (CC BY) license (https:// as shown in Figure1. creativecommons.org/licenses/by/ - A step-up isolation transformer is used as the most efﬁcient and low-cost technique 4.0/). for the voltage step-up, while galvanic isolation is an additional measure for safety

Electronics 2021, 10, 914. https://doi.org/10.3390/electronics10080914 https://www.mdpi.com/journal/electronics Electronics 2021, 10, x FOR PEER REVIEW 2 of 21

- A step-up isolation transformer is used as the most efficient and low-cost technique for the voltage step-up, while galvanic isolation is an additional measure for safety and common mode current rejection. Its turns ratio could be defined as the ac-ac voltage gain GTX equal to the ratio between the secondary winding voltage VTX,sec and Electronics 2021, 10, 914 2 of 20 the primary winding voltage VTX,pr in the idealized case of the lossless system. - A rectifier receives a high-frequency stepped-up voltage of the secondary winding VTX,sec and converts it into the stable ripple-free output voltage VOUT. The most straightforwardand common mode way to current define rejection.the ac-dc voltage Its turns gain ratio of the could rectifier be defined (GR) is to as consider the ac-ac thevoltage ratio between gain GTX theequal output to the voltage ratio V betweenOUT and the peak-to-peak secondary winding swing of voltage the second-VTX,sec aryand winding the primary voltage winding VTX,sec(pk-pk) voltage. VTX,pr in the idealized case of the lossless system. - TheA rectifieroverall dc receives voltage a high-frequencygain of the converter stepped-up is a product voltage of the of the voltage secondary gains of winding these stages,V asTX,sec explainedand converts in Figure it into 1. However, the stable a ripple-freehigh dc voltage output gain voltage does VnotOUT guarantee. The most a wide inputstraightforward voltage range. way An to extended define the dc ac-dc gain range voltage could gain be of achieved the rectifier by reconfiguring (GR) is to con- one orsider more theof the ratio three between stages, the which output results voltage in a VstepOUT changeand the in peak-to-peakthe voltage gain swing or a ofgain the range secondaryshift in the windingcorresponding voltage stage(s).VTX,sec(pk-pk) .

FigureFigure 1. 1. A Ageneralized generalized representation representation of a of wide a wide inpu inputt voltage voltage range range galvanically galvanically isolated isolated high high step-upstep-up DC-DC DC-DC converter. converter.

ForThe example, overall dcthe voltage gain range gain of of the the BFEI converter could is be a productadditionally of the adjusted voltage by gains the ofrecon- these figurationstages, as of explained its topology in Figure from 1a. full-bridge However, ainto high a dchalf-bridge voltage gain [6] or does a single-switch not guarantee in- a verterwide input[7] with voltage a twice range. lower An dc-ac extended gain dcGFE gain. Similarly, range could the equivalent be achieved turns by reconfiguring ratio of the isolationone or more transformer of the three can stages,be changed which by results the commutation in a step change of an inauxiliary the voltage secondary gain or wind- a gain ingrange [8] shiftto achieve in the correspondinga step change in stage(s). the GTX gain. Reconfigurations in both of these two stagesFor could example, also be the combined gain range using of the a simple BFEI could control be additionally[9] or a sophisticated adjusted byhardware the reconfig- in- tegrationurationof [10] its to topology extend fromthe dc a full-bridgevoltage gain into range a half-bridge further. As [6 ]for or the a single-switch challenges, the inverter recon- [7] figurationwith a twice of the lower inverter dc-ac can gain compromiseGFE. Similarly, the reliability the equivalent of the turnsconverter, ratio as of the thermal isolation stresstransformer of the switching can be changed semiconductor by the commutation components of changes an auxiliary significantly secondary after winding a reconfig- [8] to uration.achieve Reconfiguration a step change in capability the GTX gain. at the Reconfigurations transformer stage in bothwould of theserequire two the stages increased could usealso of beeither combined magnetic using core a simplematerial control or winding [9] or copper, a sophisticated which would hardware impose integration limitations [10 ] to extend the dc voltage gain range further. As for the challenges, the reconfiguration of of converter cost and volumetric characteristics. the inverter can compromise the reliability of the converter, as the thermal stress of the This study focuses on adjusting the ac-dc voltage gain GR of the rectifier stage as a switching semiconductor components changes significantly after a reconfiguration. Re- new technique that has been increasingly used in recent years. This gain could be adjusted configuration capability at the transformer stage would require the increased use of either either smoothly or stepwise by applying an ac boost [11,12] or multimode rectifiers magnetic core material or winding copper, which would impose limitations of converter (MMRs) [13,14] correspondingly. In general, the step changes in the gain GR of an MMR cost and volumetric characteristics. could also be smoothed by employing a special switching sequence for a short time [15]. This study focuses on adjusting the ac-dc voltage gain G of the rectifier stage as The concept of MMRs has recently attracted attention due to its Rdesign and control sim- a new technique that has been increasingly used in recent years. This gain could be plicity. Moreover, the application of MMR along with topology morphing control helps adjusted either smoothly or stepwise by applying an ac boost [11,12] or multimode rectifiers to achieve a balanced cost–performance tradeoff by allowing the inverter switches to be (MMRs) [13,14] correspondingly. In general, the step changes in the gain GR of an MMR operatedcould also within be smoothed the optimal by employing conditions a specialin a wide switching range sequenceof input voltages for a short and time operating [15]. The powers.concept This of MMRs could hasunlock recently the true attracted potential attention of even due the to itssimplest design BFEI and control topologies simplicity. [16], whichMoreover, is essential the application for cost-sensitive of MMR alongapplicatio withns topology such as morphingPV MLPE controlsystems. helps On the to achieve other hand,a balanced the application cost–performance of MMR to tradeoff high step-up by allowing DC-DC the converters inverter switchesin a wide toinput be operatedvoltage rangewithin could the optimalresult in conditionsefficiency steps in a wideat the rangerectifier of mode input transitions voltages and [13,14]. operating powers. ThisThe could main unlock idea of the this true paper potential is to give of even a short the insight simplest into BFEI the topologiesessence and [16 application], which is specificsessential of for MMR cost-sensitive in high step-up applications DC-DC such conv aserters PV MLPE with a systems. wide input On voltage the other range. hand, The the application of MMR to high step-up DC-DC converters in a wide input voltage range could result in efficiency steps at the rectifier mode transitions [13,14]. The main idea of this paper is to give a short insight into the essence and application

speciﬁcs of MMR in high step-up DC-DC converters with a wide input voltage range. The existing literature suggest full-bridge implementation, as this is used the most but in applications with a low dc voltage gain. This assumption could result in a DC-DC converter design with a poor performance, as will be demonstrated below. Therefore, this Electronics 2021, 10, 914 3 of 20

paper focuses on the issue of the efficiency step change occurring at the operating mode change in an MMR. This will demonstrate that the efficiency behaves differently at the step change in the gain GR depending on the BFEI used. Some BFEI topologies cause a step change in the converter efficiency, while others avoid this issue. Therefore, this paper provides some tips on the selection of BFEI to synthesize high step-up DC-DC converters with a wide input voltage range. It is organized as follows. The second section describes known MMR topologies and selects one of them for further study. The implementation possibilities of high step-up DC-DC converters with MMR are discussed in the third section. The fourth section provides an analysis of power losses and an experimental verification of the theoretical operating principles described in the third section and justifies the difference between the BFEIs based on the full-bridge and half-bridge topologies. The conclusions are drawn in the fifth section.

2. State-of-the-Art Multimode Rectifiers This section provides a short survey of multimode rectifiers. During the last decade, a wide variety of MMRs was proposed and validated in different applications, which clearly demonstrates the overall potential of the MMR technology. The typical applications of the MMRs today range from the sub-kW high-performance PV microconverters to multi-kW fault-tolerant power electronic transformers and energy routers. In PV microconverters, the implementation of MMRs allows keeping the control variable of the switching stage in a most favorable range, which helps to flatten the power conversion efficiency over the wide range of operating voltages and powers of the converter [16]. In fault-tolerant systems, the application of MMR along with the special control patterns of the switching stage helps us to achieve a certain level of tolerance to semiconductor failures, which might considerably improve the availability of a converter in mission-critical applications [17]. Figure2 shows the power circuit topologies of state-of-the-art MMRs. It can be seen that the majority of MMRs are realized as passive diode rectifiers, where the mode selection is implemented by turning on or off the mode change switch SR. Alternatively, the mode selection of an MMR could be realized by changing the static PWM pattern, as in the semiactive variable-structure rectifier shown in Figure2d [ 18]. However, this approach with two high-frequency switching transistors at the high-voltage side requires more complex design and control. In both described cases, the BFEI performs input voltage regulation as the main control action. At the same time, an MMR additionally adjusts the dc voltage gain range of the converter by the step change of the rectifier topology either from a full-bridge rectifier (FBR) to a voltage doubler rectifier (VDR) (Figure2a,b), as in [ 5,19–21], or from a VDR to a voltage-quadrupler rectifier (VQR) (Figure2c–e), as in [ 14,16,18]. Such two-mode rectifiers are characterized by the 1:2 range of the ac-dc gain GR. The MMR topology recently proposed in [13] (Figure2f) enables all these three modes—i.e., FBR, VDR, and VQR—thus allowing a remarkable ac-dc voltage gain range of 1:4. Figure2g shows another approach to a three-mode MMR, which is realized by combining a VQR with a symmetrical voltage sixfolder rectifier (VSR). Even though it provides high values for the ac-dc gain GR, which reduces the transformer turns ratio in high step-up applications, this MMR features the ac-dc voltage gain range of only 1:1.5, which renders it unsuitable for wide gain range applications. Electronics 2021, 10, x FOR PEER REVIEW 4 of 21

mentioning that the topology proposed in [18] (Figure 2d) can be distinguished from the

Electronics 2021, 10, 914 other MMR topologies, as it provides a low component count at the expense of applying4 of 20a static PWM to the two semiconductor switches. This MMR is not suitable for low-cost high step-up applications, as it requires costly driving circuits and high-resolution PWM.

D3 D1 D1 D3 D1 D3 C C1 1 C1 D1 C3 C2 S1 C 2 V V VTX,sec VOUT VTX,sec VOUT VTX,sec OUT TX,sec VOUT C1 SR SR

S2 D2 SR D4 D2 D4 C2 C2 D2 C4 C3 D4 D2

(a) (b) (c) (d)

SR1 D1 C D D1 C1 SR1 D4 C1 V 1 2 C2 VTX,sec D2 C2 TX,sec D1 D2 D3 D3 D4 VTX,sec VOUT C3 VOUT C3 C2 C3 D3 SR D5 SR2 VOUT C5 C4 D5 D5 D6 D7 D4 D6 D7 C4 C6 C7 SR2 D8

(e) (f) (g)

Figure 2. State-of-the-art multi-mode rectifiers: passive full-bridge/Greinacher voltage doubler rectifier [5](a), passive Figure 2. State-of-the-art multi-mode rectifiers: passive full-bridge/Greinacher voltage doubler rectifier [5] (a), passive full- bridge/symmetricalfull-bridge/symmetrical voltage voltage doubler doubler rectifier rectifier [20,21] [(20b),,21 passive](b), passive symmetrical symmetrical voltage voltagedoubler/voltage doubler/voltage quadrupler quadrupler rectifier [14]rectifier (c), semiactive [14](c), semiactive voltage doubler/voltage voltage doubler/voltage quadrupler quadrupler rectifier [18] rectifier (d), passive [18](d), voltage-doubler/voltage passive voltage-doubler/voltage quadrupler quadru- rec- tifierpler rectifierbased on based two cascaded on two cascaded Greinacher Greinacher voltagevoltage doubler doubler cells [16] cells (e), [16 passive](e), passive full-bridge/voltage full-bridge/voltage doubler/voltage doubler/voltage quad- ruplerquadrupler rectifier rectifier [13] (f [),13 and](f), 3-mode and 3-mode reconfigurable reconfigurable voltage voltage multiplier multiplier rectifier rectifier [22] (g [22). ](g).

TableTable 11. summarizes Main properties the of main the state-of-the-art properties of theMMRs. existing MMR topologies, including the complexity and number of components. It shows that an MMR provides the ac-dc gain GR MMR Voltage Gain GR 1 GR Number of Components 2 in multiples of 0.5, which is the ratio between the output voltage VOUT and the peak-to-peak Topology Range R 0.5swing of1 the secondary 2 winding2.5 voltage3 VTX,sec. Some ofC the topologiesD S can achieveS GR Figure 2a [5,19] Y= 3, but theY range N ac-dc voltage N gain NG R is still 1:2 1:2 or less 2 for most 4 of them. 1 It is worth- Figure 2b [20,21] Ymentioning Y that the N topology N proposed N in [18] 1:2 (Figure 2d) 2 can be 4 distinguished 13 from - the Figure 2c [14] Nother MMR Y topologies, Y as it Nprovides a N low component 1:2 count 4 at the 4 expense 13 of applying - a Figure 2d [18] Nstatic PWM Y to the two Y semiconductor N switches. N 1:2 This MMR 3 is not suitable 2 for - low-cost 2 high Figure 2e [16] Nstep-up applications, Y Y as it requires N costly N driving 1:2 circuits 4and high-resolution 4 1 PWM. - Figure 2f [13] Y Y Y N N 1:4 4 7 2 - Table 1. Main properties of the state-of-the-art MMRs. Figure 2g [22] N N Y Y Y 1:1.5 6 8 2 - 1 Y = Yes, N = No; 2 C = capacitor, D = diode, SR = static1 mode change switch, S = semiconductor switch (PWM modulation2 MMR Voltage Gain GR Number of Components pattern is static in each mode). GR Range Topology 0.5 1 2 2.5 3 CDSR S

Figure2a [5,19] Y YAll other N topologies N utilize N a mode change 1:2 switch(es) 2 SR that 4is controlled 1 statically. - Figure2b [20,21] Y Y N N N 1:2 2 4 13 - The implementation of SR depends on its operating conditions. In most cases, SR requires Figure2c [14] N Y Y N N 1:2 4 4 13 - a one- or two-quadrant operation capability with a unipolar voltage blocking capability, Figure2d [18] N Y Y N N 1:2 3 2 - 2 Figure2e [16] Nwhich Y could Y be implemented N Nusing a single 1:2 MOSFET. At 4 the same 4 time, the 1 topologies - Figure2f [13] Yshown Y in Figure Y 2b,c Nrequire a N mode change 1:4 switch with 4four-quadrant 7 operation, 2 which - Figure2g [22] Ncould N increase Y the cost Y of their Y implementation. 1:1.5 6 8 2 - 1 2 Y = Yes, N = No; C = capacitor, D =Based diode, onSR =the static comparison mode change in switch, TableS =1, semiconductor the three-mode switch reconfigurable (PWM modulation rectifier pattern is topology static in each mode). [13] shown in Figure 2f stands out, as its range of the ac-dc gain GR equals 1:4, while it uses fewer components than the other MMR with the three operating modes proposed in [22]. ItAll features other topologiesthe best performance/complexi utilize a mode changety switch(es)tradeoff and,SR therefore,that is controlled was selected statically. for furtherThe implementation use in this study. of S TheR depends selected on MMR its operating compares conditions. favorably to In the most existing cases, techniquesSR requires fora one- voltage or two-quadrant gain range extension. operation For capability example, with a 1:4 a adjustment unipolar voltage of the blockingvoltage regulation capability, which could be implemented using a single MOSFET. At the same time, the topologies shown in Figure2b,c require a mode change switch with four-quadrant operation, which could increase the cost of their implementation. Based on the comparison in Table1, the three-mode reconﬁgurable rectiﬁer topology [13] shown in Figure2f stands out, as its range of the ac-dc gain GR equals 1:4, while Electronics 2021, 10, 914 5 of 20

it uses fewer components than the other MMR with the three operating modes proposed Electronics 2021, 10, x FOR PEER REVIEWin [22 ]. It features the best performance/complexity tradeoff and, therefore, was selected5 of 21 for further use in this study. The selected MMR compares favorably to the existing techniques for voltage gain range extension. For example, a 1:4 adjustment of the voltage regulation range was not demonstrated by any known concept of the reconfigurable BFEI. range was not demonstrated by any known concept of the reconfigurable BFEI. Only a 1:2 Only a 1:2 gain range adjustment was demonstrated in [6,7] by means of the BFEI control. gain range adjustment was demonstrated in [6,7] by means of the BFEI control. On the On the other hand, a transformer with three output-side winding can reproduce a 1:4 other hand, a transformer with three output-side winding can reproduce a 1:4 gain change gain change range with two steps by extending the concept [8] with a multi-tap secondary range with two steps by extending the concept [8] with a multi-tap secondary winding. winding. Assuming that MMR [13] and technique [8] are modified to provide exactly the Assuming that MMR [13] and technique [8] are modified to provide exactly the same be- same behavior of GTX × GR, the following conclusions can be drawn regardless of the haviorBFEI implementation: of GTX × GR, the following conclusions can be drawn regardless of the BFEI implementation: - The MMR should provide three values of GTX × GR—namely, nMMR/2, nMMR, and - The MMR should provide three values of GTX × GR—namely, nMMR/2, nMMR, and 2 × 2 × nMMR, where nMMR corresponds to the baseline turns ratio for the MMR. nMMR, where nMMR corresponds to the baseline turns ratio for the MMR. - The multi-tap transformer provides three turns ratio values: nTX1, nTX2, and nTX3, - The multi-tap transformer provides three turns ratio values: nTX1, nTX2, and nTX3, which which relate to nTX3 = 2 × nTX2 = 4 × nTX1 to reproduce the behavior of GTX × GR of relatethe MMR. to nTX3 = 2 × nTX2 = 4 × nTX1 to reproduce the behavior of GTX × GR of the MMR. - The assumption above yields the following relation: nMMR = 2 × nTX1. - The assumption above yields the following relation: nMMR = 2 × nTX1. -- ConsideringConsidering that that the the technique technique [8] [ 8is] based is based on the on full-bridge the full-bridge diode diode rectifier, rectifier, the wire the cross-sectionwire cross-section of multi-tap of multi-tap secondary secondary winding winding should should be rated be ratedfor the for maximum the maximum outputoutput current. current. The MMR The MMR winding winding should should be wound be wound with wire with rated wire for rated a twice for ahigher twice currenthigher currentbut twice but fewer twice turns. fewer turns. -- TechniqueTechnique [8] [8 ]would would require require four four switches switches instead instead of the of two the used two usedin the in MMR, the MMR, mak- ingmaking it not it attractive not attractive for low-power for low-power high highstep-up step-up applications, applications, where where the cost the costof im- of plementationimplementation is of is great of great importance. importance. ConsideringConsidering allall thethe aspects aspects mentioned mentioned above, above, idealized idealized transformer transformer designs designs for MMR for MMRand multi-tap and multi-tap techniques techniques would would require requir thee same the same copper copper cross-section cross-section area. area. However, How- ever,in practice in practice the multi-tap the multi-tap transformer transformer design design suffers suffers from from the copperthe copper cross-section cross-section area areaincrease increase caused caused by the by connection the connection terminals term toinals the to winding the winding taps. Despite taps. Despite having having a similar a similarcopper copper cross-section cross-section area, a area, higher a higher number nu ofmber turns of turns of the of multi-tap the multi-tap winding winding requires re- quiresmore windingmore winding layers, layers, which iswhich a significant is a significant drawback drawback due to the due much-increased to the much-increased parasitic parasiticproximity proximity and skin and effects, skin increasing effects, increasing the winding the losseswinding considerably losses considerably [23,24]. The [23,24]. final Theconsideration final consideration in favor of in the favor MMR of approachthe MMR isapproach that the VDRis that mode, the VDR where mode, the transformer where the transformerwinding experiences winding theexperiences highest current the highest stress, curre is usednt stress, in the is range used wherein the therange input where current the inputis limited, current and is thus limited, the converter and thus operatesthe converter at the operates power levels at the below power the levels rated maximum.below the ratedAs a result,maximum. the MMR As a transformer result, the designMMR transf couldormer have a design copper could cross-section have a areacopper much cross- less sectionthan that area of much technique less than [8]. that of technique [8]. TheThe mode mode selection selection in in the the MMR MMR [13] [13 is] isrealized realized by byturning turning on onand and off offthe themode mode se- lectionselection switches switches SR1S andR1 and SR2.S InR2 .the In theFBR FBR mode mode (Figure (Figure 3a),3 a),this this MMR MMR utilizes utilizes only only half half of theof thecircuit, circuit, while while the theother other half half is bypassed is bypassed by diode by diode D7. DThe7. Thepositive positive and negative and negative half- waveshalf-waves of the of secondary the secondary winding winding voltage voltage VTX,sec areVTX,sec rectifiedare rectified by the diode by the pairs diode D1– pairsD3 andD1 –DD2–3 Dand4, correspondingly.D2–D4, correspondingly. The VDR mode The VDR is activated mode when is activated the switch when SR1 the is turned switch onSR (Figure1 is turned 3b). Diodeson (Figure D1 and3b). D Diodes3 rectifyD the1 and transformerD3 rectify curr theent transformer in this mode. current The diode in this D mode.7 bypasses The half diode of theD7 bypassesrectifier circuit half ofsimilarly the rectifier with circuitthe FBR similarly mode. The with VQR the FBRmode mode. is activated The VQR when mode both is activated when both switches S and S are turned on (Figure3c). switches SR1 and SR2 are turned onR1 (FigureR2 3c).

SR1 D S D S D V C1 D2 1 V C1 D2 R1 1 V C1 R1 1 TX,sec TX,sec TX,sec D3 D4 D3 D4 D3 D4

C2 C2 C C3 D SR2 C3 SR2 C3 2 5 VOUT D5 VOUT D5 SR2 VOUT

D6 D7 C4 D6 D7 C4 D6 D7 C4

(a) (b) (c)

FigureFigure 3. 3. EquivalentEquivalent circuits circuits of of the the 3-mode 3-mode reconfigurable reconﬁgurable rectifier: rectiﬁer: FBR FBR mode mode ( (aa),), VDR VDR mode mode ( (b),), and and VQR VQR mode mode ( (c).

The given MMR provides the widest range of gain GR and requires only two active switches:

Electronics 2021, 10, 914 6 of 20

The given MMR provides the widest range of gain GR and requires only two active switches:  0.5, SR1 = OFF, SR2 = OFF, VOUT  GR = = 1, SR1 = ON, SR2 = OFF, , (1) VTX,sec(pk−pk)  2, SR1 = ON, SR2 = ON,

where VTX,sec(pk-pk) is the peak-to-peak value of the secondary winding voltage VTX,sec. It is worth mentioning that there is a forbidden state when the switch SR1 is turned off and the switch SR2 is turned on. This MMR can operate with either symmetrical or asymmetrical secondary winding voltage VTX,sec. From (1), it follows that the given MMR provides a fourfold increase in the converter gain if the FBR mode is changed to the VQR mode.

3. Implementation Possibilities of High Step-Up DC-DC Converters with MMR This section provides a discussion on two possible implementations of high step-up DC-DC converters with MMRs. As was mentioned above, some implementations suffer from efficiency steps at the MMR mode transition. This behavior of the efficiency is not observed in DC-DC converters with a low dc voltage gain (high input voltage), which are typically realized based on the voltage-source LLC or other resonant topology using variable frequency control. Their efficiency curves intersect without a step [6,22], which is not the case in high step-up DC-DC converters with pulse-width modulation. On the other hand, both voltage- and current-source DC-DC converter topologies demonstrate a step of efficiency at the mode transition of an MMR in high step-up applications [10,13]. As the current- and impedance-source DC-DC converters are the most popular BFEI types in high step-up applications [25], this study is focused on them.

3.1. Case Study DC-DC Converter Topologies Utilizing MMR For high step-up galvanically isolated DC-DC converters, the current- and impedance- source BFEIs are usually selected as they combine the input voltage regulation capability in a wide range with inherent voltage boost functionality and continuous input current. There are two opportunities for the implementation of the BFEI based on the full-bridge or a switching stage with a reduced number of switches such as half-bridge or single- switch. Figure4 shows two exemplary topologies of the current- and impedance-source BFEI: the full-bridge quasi-Z-source inverter (FBqZSI, Figure4a) and the boost half-bridge inverter (BHBI, Figure4b). The current- and impedance-source inverters short circuit the input inductor or the impedance-source network to perform an input voltage step-up. These time intervals are highlighted with a blue color in Figure4. For both converters, the shoot-through duty cycle depends on the input voltage as a linear function, which is advantageous for the control system design.

3.2. MMR Implementation with Full-Bridge Front-End Inverter The operation of the front-end FBqZSI with the selected three-mode rectiﬁer is pre- sented in Figure5 for the ideal case. The minimum value of the duty cycle D can be zero—i.e., when the FBqZSI stage implements only active states and achieves a maximum efﬁciency. Considering the output voltage swing, the FBqZSI provides the following dc-ac voltage gain: VTX,pr(pk−pk) 2 GFE(qZSI) = = , (2) VIN 1 − 2 · D

where VTX,pr(pk-pk) is the peak-to-peak value of the voltage VTX,pr. Electronics 2021, 10, 914 7 of 20 ElectronicsElectronics 2021 2021, ,10 10, ,x x FOR FOR PEER PEER REVIEW REVIEW 78 ofof 2121

= 0, as the absence of the shoot-through states significantly decreases the rms currents of C S1,S4 qZS2 SR1 D S S1 S3 C1 D2 1 qZS the switches due to theV TX,sechigh current of the switches during the shoot-throughT⋅D/2 states [26]. LqZS1 LqZS2 TX S2,S3 Moreover, the switching losses are minimumD3 atD D4 = 0, as the shoot-through states result VTX,pr C C2 SqZS in high switching currents of the3 mainD5 SR2 switches as wellVOUT as reverse recovery losses in the VIN CqZS1 1:n V synchronous switch SqZS [27,28]. The switching losses of the FBEITX,pr semiconductorsVpk are dom- S S D6 D7 C4 2 4 V inant when D ≠ 0; thus, the efficiency step is inevitable between theVpk-pk efficiencypk curves, as

suggested in Figure 5b. It is worth mentioning that the MMR would operate at a nearly constant output current when(a) the converter operates at the same input power across a wide input voltage range. As a result, the conduction losses in the rectifier will depend on CD SR1 S1 C1 D2 D1 the number of diodesVTX,sec employed in each MMR mode. Hence,S1 it could be predicted that the LIN TX VQR mode will feature higher losses inD3 theD 4output-sideT⋅D diodes, resulting in a lower peak S2 CB C C3 S 2 C efficiencyV TX,prat D = 0 than that ofD5 theR2 VDR mode withVOUT fewer diodes employed. As a result, IN V VIN 1:n TX,pr S2 their smooth intersections during MMR mode transitions are not feasible. The steps of the D6 D7 C4 V efficiency value caused by the MMR operating mode transitions pk-pkcould result in additional

thermal cycling, thus compromising the converter reliability. Moreover, parasitic oscillations occur during zero voltage(b) intervals when the shoot-through states are implemented, resulting in the voltage having a symmetrical shape [13]. Hence, the full-bridge BFEI im- FigureFigure 4. 4. CaseCase study study high high step-up step-up converter converter topologies topologies based based on on two two BFEI BFEI types: types: ( (aa)) full-bridge full-bridge quasi-Z-source quasi-Z-source inverter inverter withwith symmetrical symmetrical output output voltage, plementation ( b) boost half-bridgewith MMRs withwith is asymmetricalnotasymmetrical advisable outputoutput in high voltage voltage step-up and and DC-DC idealized idealized converters sketches sketches describing describ- with a wide ingthe the operation operation of eachof each BFEI. BFEI.input voltage range, which is typically used in applications where high reliability is of great importance. 3.2. MMR Implementation with Full-Bridge Front-End Inverter G Efficiency D The operation of the front-end FBqZSIST with the selected three-mode rectifier is pre- FBR G(V ) sented in Figure 5 for the ideal case. The minimum value of the duty cycle D can be zero— min VDR i.e., when the FBqZSI stage implements only active states and achieves a maximum effi- Dmax VQR ciency. Considering the output voltageD trswing, the FBqZSI provides the following dc-ac FBR↔VDR G(Vth1) voltage gain: transition G(Vth2) VDR↔VQR G(Vmax) D VIN VTX,(pk-pk) pr 2 VIN ==0 transition 0 GFE() qZSI , (2) Dtr Dmax Vmin Vth1 Vth2 Vmax Vmin Vth1 Vth2 −⋅Vmax VDIN 12 (a) (b) (c) where VTX,pr(pk-pk) is the peak-to-peak value of the voltage VTX,pr. Figure 5.5. IdealizedIdealized sketchsketch ofof thetheTransitions operatingoperating principleprinciple between of thethe highhirectifiergh step-upstep-up modes DC-DCDC-DC appear converter when with the front-endshoot-through FBqZSI: duty (a) dcdc cycle voltage gain curves and thedrops transitions down between to D = them,0 and ( bfurther)) predictedpredicted regulation efficiencyefficiency using curvescurves a shapesgivenshapes rectifier andand thethe transitions transitionsmode is not betweenbetween possible them,them, andand ((cc)) thethe linearlinear dependenciesdependencieswhen regulating ofof thethe dutydu fromty cyclecycle a lower onon thethe voltage inputinput voltage.voltage. to a high er, as shown in Figure 5c. When regulating voltage in the other direction, the transition happens when the gain GFE is increased two- 3.3. MMRTransitions Implementation between with the rectifierHalf-Bridge modes Front-End appear Inverter when the shoot-through duty cycle fold at D = Dtr, which corresponds to the converter gain in the next operating mode of the MMRdropsConsidering at down D = 0. to DuringD the= 0 andpossiblethe mode further implementations transition, regulation the using duty of a thecycle given BFEI Drectifier has with to bea mode reduced changed is not number in possible a step. of when regulating from a lower voltage to a higher, as shown in Figure5c. When regulating Consideringswitches, the the BHBI linear was dependence selected as of itthe showed duty cycle a good D on overall the input performance voltage V INin, itprevious is easy tovoltagestudies implement [19,29–31]. in the its other step The change direction, bridge us ingBFEI the a transitionfeed-forwardcounterpar happensts arecontrol, more when as complicated the the step gain sizeG and, FEis easyis thus, increased to morepre- D D dictcostly.twofold theoretically The at dc-ac= [16]. trgain, which Theof the correspondsmain BHBI drawback is defined to the of converterbythe the full-bridge duty gain cycle inswitching theD of next the stage operatingswitch is Srelated2: mode to of the MMR at D = 0. During the mode transition, the duty cycle D has to be changed in a a considerable change in efficiency when thVe converter changes1 the operating mode of the step. Considering the linear dependence== ofTX the,(pk-pk) pr duty cycle D on the input voltage VIN, it is MMR [13], as shown in Figure 5b.G FEAs() BHB a result, the FBqZSI-based. converter (Figure 4a) can(3) easy to implement its step change using a feed-forwardVD1 control,− as the step size is easy to switch between its three gain curves, as shown inIN Figure 5a. predict theoretically [16]. The main drawback of the full-bridge switching stage is related In the ideal case, the values of the gain at the transition points are related in multiples to a considerableIn the case of change BHBI, inthe efficiency duty cycle when of the the main converter switch changes S2 has to the be operating constrained mode both of of two: G(Vth1) = 2 × G(Vth2) = 4 × G(Vmax). The maximum dc voltage gain G is achieved at fromthe MMR the top [13 ],and as shownbottom. in Figure Figure 65 b.provides As a result, an idealized the FBqZSI-based explanation converter of BHBI (Figure operation4a) the minimum input voltage Vmin, which corresponds to the maximum duty cycle D = Dmax. withcan switch the three-mode between itsrectifie threer. gain The curves,minimum as shownduty cycle in Figure Dmin and5a. the maximum duty cycle The maximum input voltage Vmax corresponds to D = 0 in the FBR mode of the MMR. Due Dmax Inare the defined ideal case,by the the converter values of design. the gain To at achieve the transition an acceptable points areefficiency related in in the multiples whole toinput this, voltagethe duty range, cycle stepthe switch always duty happens cycle betweenrange is typicallyD = 0 (the restricted maximum between efficiency 0.3 points) and 0.7 of two: G(Vth1) = 2 × G(Vth2) = 4 × G(Vmax). The maximum dc voltage gain G is achieved at anddue D to = thermal Dtr (providing limitations the same [19,29]. dc voltage gain after the step). Therefore, both threshold the minimum input voltage Vmin, which corresponds to the maximum duty cycle D = Dmax. voltages Vth1 and Vth2 are defined by the transformer turns ratio as follows: Vth1 =th V1 OUT/(4nth)2 The maximumThe MMR inputmode voltagetransitionsVmax couldcorresponds be performed to D at= 0threshold in the FBR voltages mode ( ofV the and MMR. V ) andwhereDue V toth2 the = this, V efficiencyOUT the/(2 dutyn). curves cycle steprelated always to differ happensent MMR between modesD =intersect. 0 (the maximum These intersections efficiency Typically, the efficiency curve of a high step-up DC-DC converter with a BFEI reaches points)are feasible and asD the= D efficiencytr (providing curves the of same conv dcerters voltage with gain a reduced after the nu step).mber of Therefore, switches bothtyp- theically maximum resemble efficiency a parabolic value shape, at the as maximum was demonstrated input voltage, in [32]. which This couldbehavior be translatedis dictated toby D the = 0 intrinsicin each mode mechanism of the MMR.of losses In Figurein these 5b, converters. the maximum This efficiencysymmetry is results achieved from at theD

Electronics 2021, 10, 914 8 of 20

threshold voltages Vth1 and Vth2 are defined by the transformer turns ratio as follows: Vth1 = VOUT/(4n) and Vth2 = VOUT/(2n). Typically, the efficiency curve of a high step-up DC-DC converter with a BFEI reaches the maximum efficiency value at the maximum input voltage, which could be translated to D = 0 in each mode of the MMR. In Figure5b, the maximum efficiency is achieved at D = 0, as the absence of the shoot-through states significantly decreases the rms currents of the switches due to the high current of the switches during the shoot-through states [26]. Moreover, the switching losses are minimum at D = 0, as the shoot-through states result in high switching currents of the main switches as well as reverse recovery losses in the synchronous switch SqZS [27,28]. The switching losses of the FBEI semiconductors are dominant when D 6= 0; thus, the efficiency step is inevitable between the efficiency curves, as suggested in Figure5b. It is worth mentioning that the MMR would operate at a nearly constant output current when the converter operates at the same input power across a wide input voltage range. As a result, the conduction losses in the rectifier will depend on the number of diodes employed in each MMR mode. Hence, it could be predicted that the VQR mode will feature higher losses in the output-side diodes, resulting in a lower peak efficiency at D = 0 than that of the VDR mode with fewer diodes employed. As a result, their smooth intersections during MMR mode transitions are not feasible. The steps of the efficiency value caused by the MMR operating mode transitions could result in additional thermal cycling, thus compromising the converter reliability. Moreover, Electronics 2021, 10, x FOR PEER REVIEW 9 of 21 parasitic oscillations occur during zero voltage intervals when the shoot-through states are implemented, resulting in the voltage having a symmetrical shape [13]. Hence, the full-bridge BFEI implementation with MMRs is not advisable in high step-up DC-DC thermalconverters overloading with a wide of inputone of voltage the switches range, when which the is typically duty cycle used is either in applications too low or where too high.high reliabilityWhen the isduty of great cycle importance. D is too close to one, the switch S1 suffers from very short current pulses with high amplitude and rms values, causing both high conduction and 3.3. MMR Implementation with Half-Bridge Front-End Inverter switching losses. A similar issue could be observed for the switch S2 if the duty cycle D is too closeConsidering to zero. Typically, the possible the maximum implementations efficiency of could the BFEI be ac withhieved a reducedat duty cycles number close of toswitches, the middle the of BHBI the duty was cycle selected regula astion it showed range [32], a good which overall corresponds performance to D = in 0.5 previous for the BHBIstudies [29]. [19 Therefore,,29–31]. The the bridge efficiency BFEI curves counterparts can intersect are more with complicatedeach other, as and, shown thus, in more Fig- urecostly. 6b. As The for dc-ac the losses gain of in the the BHBI MMR, is they defined gene byrally the depend duty cycle on theD of number the switch of diodesS2: used in a particular MMR mode and the output current. The efficiency intersections define the VTX,pr(pk−pk) 1 points of optimal transitionG between =the MMR modes.= They occur. at points where either (3) FE(BHB) V 1 − D of the switches starts to suffer from a high rmsIN current, and its duty cycle must be in-

creasedIn theor decreased case of BHBI, to return the duty its value cycle ofinto the the main favorable switch rangeS2 has from to be D constrainedmin to Dmax. bothThe thresholdfrom the topvoltages and bottom. could depend Figure6 on provides the operating an idealized power explanation and are defined of BHBI empirically. operation Theirwith thedependence three-mode on rectifier.the input The power minimum could be duty approximated cycle Dmin and and the used maximum for the implemen- duty cycle tationDmax areof adefined feed-forward by the control converter facilitating design. To smooth achieve transitions an acceptable between efficiency the MMR in the operat- whole inginput modes voltage [14]. range, The value the switch of the dutyduty cyclecycle rangestep could is typically also vary restricted in a range between constrained 0.3 and by 0.7 Dduemin and to thermal Dmax if limitationsthese limits[ are19,29 selected]. to be 0.3 to 0.7 or wider.

G Efficiency D FBR G(Vmin) Dmax VDR VQR

G(Vth1) FBR↔VDR transition G(Vth2) Dmin VDR↔VQR G(Vmax) D VIN VIN 0 transition 0 Dmin Dmax VminVth1 Vth2 Vmax VminVth1 Vth2 Vmax

(a) (b) (c)

FigureFigure 6. 6. IdealizedIdealized sketch sketch of of the the operating operating principle principle of of the the high high step-up step-up DC-DC DC-DC converte converterr with with front-end front-end BHBI: BHBI: ( (aa)) dc dc voltagevoltage gain curves and transitionstransitions betweenbetween them, them, ( b(b) predicted) predicted efﬁciency efficiency curves curves shapes shap andes and transitions transitions between between them, them, and and(c) the (c) linearthe linear dependencies dependencies of the of dutythe duty cycle cycle on the on inputthe input voltage. voltage.

3.4. Comparison of Two Converter Implementations The considered implementation of wide-range DC-DC converters can be compared in several ways—first, the number of components. Considering that the input capacitor in BHBI is optional and should not be counted in the total bill of materials, both converters feature: - seven diodes in the output-side rectifier; - four capacitors in the output-side rectifier; - two semiconductor switches controlled statically in the output-side rectifier; - two-winding isolation transformer with the same turns ratio; - two capacitors in the BFEI operating at different voltage stress. The differences between the two converter topologies lie in BFEI implementation: - FBqZSI requires five switches, while the BHBI needs only two switches but rated for twice higher blocking voltage than those of the FBqZSI; - FBqZSI requires two inductors (they could be coupled with flux summation) that operate at double the switching frequency, while BHBI needs only one inductor of higher inductance than that of the FBqZSI to handle higher ripple resulting from operation at the switching frequency. The comparison between the two implementations is given in Table 2.

Electronics 2021, 10, 914 9 of 20

The MMR mode transitions could be performed at threshold voltages (Vth1 and Vth2) where the efficiency curves related to different MMR modes intersect. These intersections are feasible as the efficiency curves of converters with a reduced number of switches typically resemble a parabolic shape, as was demonstrated in [32]. This behavior is dictated by the intrinsic mechanism of losses in these converters. This symmetry results from the thermal overloading of one of the switches when the duty cycle is either too low or too high. When the duty cycle D is too close to one, the switch S1 suffers from very short current pulses with high amplitude and rms values, causing both high conduction and switching losses. A similar issue could be observed for the switch S2 if the duty cycle D is too close to zero. Typically, the maximum efficiency could be achieved at duty cycles close to the middle of the duty cycle regulation range [32], which corresponds to D = 0.5 for the BHBI [29]. Therefore, the efficiency curves can intersect with each other, as shown in Figure6b. As for the losses in the MMR, they generally depend on the number of diodes used in a particular MMR mode and the output current. The efficiency intersections define the points of optimal transition between the MMR modes. They occur at points where either of the switches starts to suffer from a high rms current, and its duty cycle must be increased or decreased to return its value into the favorable range from Dmin to Dmax. The threshold voltages could depend on the operating power and are defined empirically. Their dependence on the input power could be approximated and used for the implementation of a feed-forward control facilitating smooth transitions between the MMR operating modes [14]. The value of the duty cycle step could also vary in a range constrained by Dmin and Dmax if these limits are selected to be 0.3 to 0.7 or wider.

3.4. Comparison of Two Converter Implementations The considered implementation of wide-range DC-DC converters can be compared in several ways—first, the number of components. Considering that the input capacitor in BHBI is optional and should not be counted in the total bill of materials, both converters feature: - seven diodes in the output-side rectifier; - four capacitors in the output-side rectifier; - two semiconductor switches controlled statically in the output-side rectifier; - two-winding isolation transformer with the same turns ratio; - two capacitors in the BFEI operating at different voltage stress. The differences between the two converter topologies lie in BFEI implementation: - FBqZSI requires five switches, while the BHBI needs only two switches but rated for twice higher blocking voltage than those of the FBqZSI; - FBqZSI requires two inductors (they could be coupled with flux summation) that operate at double the switching frequency, while BHBI needs only one inductor of higher inductance than that of the FBqZSI to handle higher ripple resulting from operation at the switching frequency. The comparison between the two implementations is given in Table2.

Table 2. Comparison of the two implementations of the converter with the MMR.

Switches Diodes Capacitors Inductors BFEI Dmin Dmax Efﬁciency Steps BFEI MMR MMR BFEI MMR BFEI FBqZSI 5 2 0 0.3 Yes 2 (static) 7 2 4 BHBI 2 1 0.3 0.7 No Electronics 2021, 10, 914 10 of 20

The regulation ranges could be compared using values of Dmin and Dmax. Using (2) and considering Dmin = 0 and Dmax = 0.3, the FBqZSI range could be found as a ratio between the maximum and minimum gain GFE as follows:

2 GFE(qZSI) 1 − 2 · D 1 max = 1−2·Dmax = min = = 2 2.5. (4) GFE(qZSI)min 1 − 2 · Dmax 0.4 1−2·Dmin From (4), it follows that the FBqZSI is capable of regulating the input voltage in 1:2.5 range, which corresponds to a converter dc voltage gain GR of 1:10 considering the 1:4 gain range of the MMR. At the same time, the duty cycle will be bounded to the recommended range. However, considering the losses in the converter, the realistic range of the converter range would be narrower. In a similar way, the range for BHBI could be calculated using (3) and considering Dmin = 0.3 and Dmax = 0.7:

1 G ( ) 1 − D 0.7 FE BHB max = 1−Dmax = min = ≈ 1 2.33. (5) GFE(BHB)min 1 − Dmax 0.3 1−Dmin From (5), it follows that the 1:2.33 range is feasible with the recommended duty cycle range of 0.3 to 0.7. It is worth mentioning that the BHBI efficiency is less sensitive to the duty cycle due to the twice wider range available. This means that a well-optimized design with a proper PCB layout can stretch the given duty cycle range to 0.25 ... 0.75, which will immediately result in extending the input voltage regulation range of the BHBI to 1:3. It is worth mentioning the main difference between the essence of control variables. FBqZSI switches are controlled with the gating signals with a duration of 0.5 or higher, depending on the duty cycle value. As a result, Dmin = 0 is just a case when no shoot- through action is implemented in the switching sequence—i.e., the FBqZSI provides the lowest possible gain and the highest possible efficiency at the full power, while the main switches S1 ... S4 operate with a duty cycle of 0.5. On the other hand, at D > 0 the inverter switches experience high current stress during the shoot-through states, which equals double the average input current. The theoretical maximum duty cycle equals 0.5, but in practice it is typically limited to Dmax = 0.3 to avoid excessive losses and overheating of the inverter switches, as demonstrated in [33]. At the same time, the control duty cycle of the BHBI corresponds to the actual duty cycle of the switch S2, while the switch S1 operates with a (1-D) duty cycle. The actual values of Dmin and Dmax for the BHBI are limited by the thermal performance of the converter design and the cooling of the semiconductors. Regardless of the BFEI implementation, the average switch current is proportional to the input power. However, in the BFEI with a reduced number of switches, such as BHBI or similar, a switch operation with a low duty cycle results in a significant increase in its rms current. In a generalized case, the ratio between the rms and average currents is inversely proportional to the square root of the switch duty cycle. To conclude this section, it is essential to understand how the voltage stress of the switches differs between the selected BFEIs. The BHBI must operate at a twice higher voltage to provide the same transformer voltage swing as the FBqZSI. These stresses are summarized and tabulated in Table3. Evidently, the FBqZSI can utilize switches with a much lower voltage rating than the BHBI.

Table 3. Voltage stress of the BFEI switches.

MMR Mode BFEI FBR VDR VQR

VOUT VOUT VOUT FBqZSI n 2×n 4×n

2×VOUT VOUT VOUT BHBI n n 2×n Electronics 2021, 10, x FOR PEER REVIEW 11 of 21

summarized and tabulated in Table 3. Evidently, the FBqZSI can utilize switches with a much lower voltage rating than the BHBI.

Table 3. Voltage stress of the BFEI switches.

MMR Mode BFEI FBR VDR VQR V V V FBqZSI OUT OUT OUT n 2× n 4× n Electronics 2021, 10, 914 11 of 20 2×V V V BHBI OUT OUT OUT n n 2× n

4.4. Experimental Experimental Results Results and and Discussion Discussion TwoTwo experimental prototypes of the high step-up DC-DC converter were assembled toto verify verify theoretical theoretical assumptions regardingregarding thethe efﬁciencyefficiency curve curve shapes shapes and and resulting resulting transi- tran- sitionstions between between the the MMR MMR modes. modes. Their Their photosphotos areare shownshown inin FigureFigure7 7.. TheThe parametersparameters andand mainmain components components are are listed listed in in Table Table 44.. TheseThese convertersconverters werewere designeddesigned toto utilizeutilize asas manymany commoncommon components components as as possible possible while while providing providing the the same same input input voltage voltage range range of of 10 to 6565 V V and and a a peak peak power power of of 250 250 W. W. This This input input power power and and voltage voltage range range correspond correspond to to count- count- lessless 60-cell 60-cell silicon-based silicon-based photovoltaic photovoltaic (PV) (PV) modules modules that that are are widely widely used used in in residential residential PV PV systems.systems. In addition, thethe maximummaximum input input voltage voltage of of the the BHBI-based BHBI-based converter converter theoretically theoreti- callycould could be over be over 65 V, 65 but V, itbut is additionallyit is additionally limited limited by theby the design design of the of the onboard onboard auxiliary auxil- iarypower power supply. supply. The The onboard onboard power power bus bus of of 5 5 V V is is stabilized stabilized by by integratedintegrated synchronous step-downstep-down voltage converterconverter LM46002LM46002 fromfrom Texas Texas Instruments, Instruments, which which cannot cannot accept accept input in- putvoltages voltages of over of over 65 V.65 The V. The switching switching frequency frequency was was selected selected based based on on general general practice practice in inthe the literature literature for for this this class class of of converters. converters.

(a) (b)

Figure 7. Experimental prototypes prototypes of of the the high high step-up step-up DC DC-DC-DC converters converters utilizing utilizing the the MMR MMR along along with with (a) (FBqZSIa) FBqZSI and and (b) BHBI.(b) BHBI.

TableThe 4. Speciﬁcations MMR was implemented of the experimental in the prototype. same way in both prototypes. Both prototypes were designed to cover the same input voltage range, resulting in a two-fold difference in the voltageInput rating voltage ofV INthe front-end generic Si switches. The1065 output V side semiconductors are ratedOutput for voltage600 V VorOUT 650 V. High switching frequency requires400 V the use of SiC Schottky

barrierSwitching diodes frequency,(SBDs) at ftheS output side, SiC MOSFET co-packed105 kHz with an SBD for SR1, but a generic Si device for SR2. A microcontroller with a Cortex-M4 core and enhanced PWM Transformer turns ratio n 6 peripherals was used to implement a simple closed-loop system employing a PI controller µ complementedOutput capacitors with aC feed-forward1, C3 loop using theoretical0.47 calculationsF derived from equa- tionsOutput (1)–(3). capacitors Quasi-Z-sourceC2, C4 inductors were implemented3 asµF coupled inductors on a sin-

gle RectiﬁerRM14 3C95 diodes ferriteD1 ... core.D6 The BHBI input inductorWolfspeed LIN was CSD01060E implemented using a high- flux toroidal powder core. Both prototypes utilize same design of the isolation transform- Switch SR1 ROHM SCH2080KE ers based on an RM14 3C95 ferrite core and copper Litz wire with 0.1 mm strands. Switch SR2 Inﬁneon IPW60R080P7 For the best efficiency, the duty cycle of the BHBI switch S2 should be restricted within the optimal range from 0.3 to 0.7,FBqZSI while the FBqZSI features the BHBI optimal shoot- Capacitors CqZS1 and CqZS2 25 µF- Inductors 2 × 22 µH 88 µH

Clamping capacitor CD - 47 µF

Blocking capacitor CB - 13.6 µF Switches S , S Inﬁneon IPB117N20NFD 1 2 Inﬁneon BSC035N10NS5 Switches S3, S4, SqZS -

The MMR was implemented in the same way in both prototypes. Both prototypes were designed to cover the same input voltage range, resulting in a two-fold difference in the voltage rating of the front-end generic Si switches. The output side semiconductors Electronics 2021, 10, 914 12 of 20

are rated for 600 V or 650 V. High switching frequency requires the use of SiC Schottky barrier diodes (SBDs) at the output side, SiC MOSFET co-packed with an SBD for SR1, but a generic Si device for SR2. A microcontroller with a Cortex-M4 core and enhanced PWM peripherals was used to implement a simple closed-loop system employing a PI controller complemented with a feed-forward loop using theoretical calculations derived from Equations (1)–(3). Quasi-Z-source inductors were implemented as coupled inductors on a single RM14 3C95 ferrite core. The BHBI input inductor L was implemented Electronics 2021, 10, x FOR PEER REVIEW IN 12 of 21 using a high-flux toroidal powder core. Both prototypes utilize same design of the isolation transformers based on an RM14 3C95 ferrite core and copper Litz wire with 0.1 mm strands. For the best efficiency, the duty cycle of the BHBI switch S2 should be restricted within thethrough optimal duty range cycle from range 0.3 from to 0.7, 0 to while 0.3, as the recommended FBqZSI features in [33]. the optimal Further shoot-throughmeasurements dutywill prove cycle range whether from this 0 to is 0.3, feasible as recommended with MMR reconfiguration. in [33]. Further measurements The measurements will prove were whetherperformed this in is wider feasible duty with cycle MMR ranges reconfiguration. to capture converter The measurements operating behaviors were performed for differ- inent wider MMR duty modes cycle and ranges compare to capture those with converter the theoretical operating predictions. behaviors As for shown different in MMRFigure modes8, both and BFEI compare operate those in the with corresponding the theoretical op predictions.timal duty cycle As shown ranges in when Figure optimal8, both BFEI tran- operatesitions between in the corresponding the MMR modes optimal are dutyimplemented. cycle ranges As whenpredicted optimal theoretically, transitions the between transi- thetion MMR between modes the areMMR implemented. modes happens As predicted at D = 0 in theoretically, the case of FBqZSI the transition (Figure between8a) and close the MMRto D = modes 0.3 forhappens the BHBI at (FigureD = 0 in 8b). the For case the of FBqZSI, FBqZSI (Figurethe theoretical8a) and closevalue to ofD the= 0.3duty for cycle the BHBIstep of (Figure Dtr = 0.258b). Foris close the FBqZSI,to the experimentally the theoretical observed value of theDtr = duty 0.26. cycle The stepstep ofsizeD dependstr = 0.25 ison close the operating to the experimentally point for the observed BHBI. It wasDtr =observed 0.26. The experimentally step size depends that onthese the step operating values pointequalfor 0.32 the and BHBI. 0.36 Itfor was Vth2 observed = 45 V and experimentally Vth1 = 21.5 V, respectively. that these step It is values worthequal noting 0.32 that and the 0.36optimal for V modeth2 = 45 transitions V and Vth 1were= 21.5 observed V, respectively. at roughly It is worthD = 0.3, noting which that results the optimal from the mode in- transitionscreased stress were of observed the BHBI at switch roughly S2 Dat =lower 0.3,which duty cycle results values. from theThese increased control stress characteris- of the BHBItics correspond switch S2 at tolower the input duty power cycle values.of 100 W. These control characteristics correspond to the input power of 100 W.

VQR VDR FBR MMR FBR VDR VQR MMR 40 40

30 30 G G

20 20

DC voltage gain gain voltage DC 10

0 0 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 Duty cycle D Duty cycle D

(a) (b)

FigureFigure 8. 8.Experimental Experimental control control variables variables vs. vs. dc dc voltage voltage gain gain and an controld control trajectory trajectory of the of MMRthe MMR in the in casethe case of (a )of FBqZSI (a) FBqZSI and (band) BHBI. (b) BHBI.

TableSimilar 4. Specifications to the control of the experimental variables, the prototype. efficiency was measured at the power level of 100 W using a precision power analyzer Yokogawa WT1800. This power level was selected Input voltage VIN 1065 V as it is feasible in the whole target input voltage range, as the converters cannot operate at currents aboveOutput 10 voltage A, while VOUT the isolation transformer can continuously400 V operate at 250 W at inputSwitching voltages frequency, above 25 V.fS The FBqZSI shows the highest105 kHz efficiency at D = 0 due to the considerablyTransformer turns reduced ratio switching n and conduction losses.6 Simultaneously, it drops significantlyOutput during capacitors a transition C1, C3to the next adjacent mode of the0.47 MMR µF (Figure9a). Stepwise changesOutput in losses capacitors can result C2, C in4 the thermal cycling of the converter3 µF components and compromiseRectifier their diodes long-term D1…D reliability.6 At the givenWolfspeed test conditions, CSD01060E the FBqZSI-based Switch SR1 ROHM SCH2080KE Switch SR2 Infineon IPW60R080P7 FBqZSI BHBI Capacitors CqZS1 and CqZS2 25 µF - Inductors 2 × 22 µH 88 µH Clamping capacitor CD - 47 µF Blocking capacitor CB - 13.6 µF Switches S1, S2 Infineon Infineon IPB117N20NFD Switches S3, S4, SqZS BSC035N10NS5 -

Electronics 2021, 10, x FOR PEER REVIEW 13 of 21

Similar to the control variables, the efficiency was measured at the power level of 100 W using a precision power analyzer Yokogawa WT1800. This power level was selected as it is feasible in the whole target input voltage range, as the converters cannot operate at currents above 10 A, while the isolation transformer can continuously operate at 250 W at input voltages above 25 V. The FBqZSI shows the highest efficiency at D = 0 due to the considerably reduced switching and conduction losses. Simultaneously, it drops significantly during a transition to the next adjacent mode of the MMR (Figure 9a). Stepwise Electronics 2021, 10, 914 changes in losses can result in the thermal cycling of the converter components and13 com- of 20 promise their long-term reliability. At the given test conditions, the FBqZSI-based converter experiences MMR mode transitions at Vth1 = 17.2 V and Vth2 = 33.5 V. The first transition corresponds to 2.3 W of the power loss step, while the second results in a step of 6 converter experiences MMR mode transitions at Vth1 = 17.2 V and Vth2 = 33.5 V. The W,first which transition proves corresponds our prior assumption to 2.3 W of theabout power the thermal loss step, cycling while issue. the second For a resultsfull-bridge in a topology,step of 6 W,these which threshold proves voltages our prior can assumption experience small about variations the thermal resulting cycling from issue. conduc- For a tionfull-bridge losses variations, topology, theseas shown threshold in Table voltages 5 for the can first experience threshold small voltage variations Vth1. Evidently, resulting withfrom the conduction input power losses increase—i.e., variations, as an shown increase in Table in the5 for conduction the first threshold losses—the voltage efficiencyVth1. stepEvidently, reduces with in relative the input terms, power while increase—i.e., the absolute an step increase of the in power the conduction loss remains losses—the above 2 W.efficiency This proves step reduces the assumption in relative that terms, the whilethermal the cycling absolute issue step is of present the power and losscould remains cause reliabilityabove 2 W. issues This provesat light the and assumption full load conditions. that the thermal A similar cycling behavior issue is could present be andobserved could forcause the reliabilitysecond mode issues transitions at light at and Vth2 full. For load example, conditions. an efficiency A similar step of behavior 6% resulting could in be a powerobserved loss for step the of second6 W at the mode input transitions power of at100V thW2 .is For reduced example, to 2.7% an efficiencyat the input step power of 6% of 250resulting W, which, in a powerhowever, loss corresponds step of 6 W to at an the even input higher power power of 100 loss W isstep reduced of 6.8 W. to 2.7%Therefore, at the theinput application power of of 250 full-bridge W, which, BFEIs however, with MMR corresponds is not advisable to an even in high higher step-up power applications. loss step of 6.8 W. Therefore, the application of full-bridge BFEIs with MMR is not advisable in high step-up applications.

(a) (b)

Figure 9. ExperimentalExperimental efficiency efﬁciency curves curves obta obtainedined at at the the power power of of 100 W for different types of front-end inverters: ( (aa)) FBqZSI and ( b) BHBI.

TableAs 5. Exampleexpected, of the thermal front-end cycling BHBI observed avoids in the this FBqZSI-based issue, as shown converter in Figure at Vth1 .9b. The parabolic shape of the BHBI efficiency curves allows for smooth transitions between the MMR modes, thus reducing the thermal cycling of theEfficiency components. Step The overall efficiencyPower Loss enve- Input Power, W Vth1,V lope with BHBI is continuous, unlikeFrom, that % in the To, case % of FBqZSI. Difference, As %was mentioned,Step, W the mode transitions25 of the 16.5 MMR occur 86.7 at Vth1 = 21.5 95.5 V and Vth2 8.8= 45 V. Compared 2.2 to the FBqZSI-based50 converter, 16.8 these threshold 90.3 voltages 95.7 experience a much 5.4 wider variation. 2.7 For comparison100 with the FBqZSI, 17.2 the first 92.7 threshold voltage 95 position 2.3 was measured 2.3 as a function of the120 input power 17.4 PIN, as shown 92.3 in Figure 94.4 10. Evidently, 2.1 the threshold voltage 2.5 re- 175 * 17.8 92 93.5 1.5 2.6 duces when the input power is increased. Lower threshold voltages would correspond to * Corresponds to the maximum input current with the active cooling of PCB for the given thermal design. a higher position of the mode transitions than those in Figure 8b. This could be explained As expected, the front-end BHBI avoids this issue, as shown in Figure9b. The parabolic shape of the BHBI efficiency curves allows for smooth transitions between the MMR modes, thus reducing the thermal cycling of the components. The overall efficiency envelope with BHBI is continuous, unlike that in the case of FBqZSI. As was mentioned, the mode transitions of the MMR occur at Vth1 = 21.5 V and Vth2 = 45 V. Compared to the FBqZSI-based converter, these threshold voltages experience a much wider variation. For comparison with the FBqZSI, the first threshold voltage position was measured as a function of the input power PIN, as shown in Figure 10. Evidently, the threshold voltage reduces when the input power is increased. Lower threshold voltages would correspond to a higher position of the mode transitions than those in Figure8b. This could be explained Electronics 2021, 10, 914x FOR PEER REVIEW 1414 of of 21 20

byby the the balance balance between between the the switching switching and and conduction conduction losses losses in in the the BHBI-based BHBI-based converter. converter. AtAt lower power, where the conduction losses are relatively minor, the VQR mode of the MMRMMR is beneficialbeneficial inin a a wider wider voltage voltage range, range, as as it lowersit lowers the the switching switching losses losses in the in converter the con- vertermore thanmore it than increases it increases the conduction the conduction losses due losses to a higherdue to numbera higher of number diodes atof thediodes output at theside. output At higher side. powerAt higher levels, power the conductionlevels, the conduction losses in those losses extra in diodesthose extra start diodes dominating start dominatingover the switching over the losses switching already losses at lower already input at voltages.lower input In termsvoltages. of intersections In terms of ofinter- the sectionsefficiency of curves,the efficiency the intersection curves, the point intersection is at the point falling is at (right) the falling branch (right) of the branch VQR modeof the VQRefficiency mode curve efficiency at light curve loads, at light which loads, shifts which to the shifts rising to (left) the branchrising (left) of the branch VQR of mode the VQRefficiency mode curve efficiency at higher curve powers. at higher powers.

30 BHBI

, V 25 th1 V

15 Threshold voltage voltage Threshold

10 10 30 50 70 90 110 130 150 170 Input power PIN, W

FigureFigure 10. 10. DependenceDependence of the threshold voltage VVthth11 onon the the input input power power in the converter with BHBI. BHBI. Figure 11 demonstrates how the efficiency depends on the converter operating power for differentFigure 11 input demonstrates voltages that how correspond the efficiency to all depends three operating on the converter modes of operating the MMR. power Three foroperating different point input were voltages selected that based correspond on observations to all three from operating Figure9. It modes was concluded of the MMR. that Threeboth converters operating shouldpoint were operate selected with thebased VQR onmode observations of the MMR from at FigureVIN = 9. 15 It V, was the VDRcon- cludedmode atthatVIN both= 27 converters V, and the should FBR mode operate at VwithIN = the 55 VQR V. Moreover, mode of thesethe MMR operating at VIN = points 15 V, theclosely VDR follow mode theat V relationIN = 27 V, between and the the FBRG Rmodevalues at ofVIN the = 55 MMR, V. Moreover, which allows these usoperating to keep pointsthe converter closely follow operating the atrelation nearly between the same the control GR values duty of cycle the MMR, values: which between allows 0.53 us and to keep0.57 forthe theconverter BHBI andoperating between at nearly 0.06 and the 0.09 same for control the FBqZSI. duty cycle Therefore, values: selecting between these 0.53 andoperating 0.57 for points the BHBI allows and for between a fairer 0.06 comparison and 0.09 for between the FBqZSI. the three Therefore, operating selecting modes. these The operatingoperating points points allows are referred for a tofairer as, forcompar example,ison between “15 V, VQR” the three in Figure operating 11, where modes. the firstThe operatingvalue corresponds points are to referred the input to voltageas, for exampl and thee, second “15 V, termVQR” refers in Figure to the 11, MMR where mode. the first The valuepower corresponds was limited to to the 120 input W in voltage the case and of th thee second VQR mode term torefers avoid to the MMR saturation mode. of The the powermagnetic was components. limited to 120 As W could in the be case observed of the fromVQR themode figures, to avoid the BHBIthe saturation provides of more the magneticsmooth efficiency components. curves As due could to thebe lowerobserved number from of the switches figures, that the dissipate BHBI provides considerable more smoothswitching efficiency power lossescurves at due light to loads.the lower number of switches that dissipate considerable switchingA closed-loop power losses control at light system loads. was implemented to demonstrate the feasibility of smooth transitions between MMR modes. It is based on the Cortex-M4 microcontroller

Table 5. ExampleSTM32F334 of thermal with high-resolution cycling observed pulse-width in the FBqZSI-based modulation converter PWM at timersVth1. and a 12-bit analog- to-digital converter (ADC). The converter was loaded with electronic load in constant- voltage mode to imitate a dcEfficiency microgrid. Step The output voltage was measured for protection Input Power, W Vth1, V Power Loss Step, W using a resistiveFrom, divider % and differential To, % isolation Difference, ampliﬁer % AMC1200 from Texas Instru- 25 16.5ments. The input86.7 voltage was95.5 measured using a 8.8 resistive divider and an 2.2 operational 50 16.8ampliﬁer OPA37890.3 from Texas95.7 Instruments. A high-accuracy 5.4 hall-effect-based 2.7 current 100 17.2sensor ACS72092.7 from Allegro Microsystems95 was used 2.3 for the input current measurement.2.3 120 17.4 92.3 94.4 2.1 2.5 175 * 17.8 92 93.5 1.5 2.6 * Corresponds to the maximum input current with the active cooling of PCB for the given thermal design.

Electronics 2021, 10, x FOR PEER REVIEW 15 of 21

Electronics 2021, 10, 914 15 of 20

(a) (b)

FigureFigure 11. 11.Experimental Experimental efﬁciency efficiency curves curves measured measured at differentat different power power levels levels for for different different input input voltages voltages for for (a )(a FBqZSI) FBqZSI and (b) BHBI.and (b) BHBI.

AA smooth closed-loop transition control between system the was MMR implemented modes could to demonst be achievedrate the by employingfeasibility of the feed-forwardsmooth transitions control, between similar MMR to [14 ].modes. As shown It is inbased Figure on the12, theCortex-M4 feed-forward microcontroller calculation STM32F334 with high-resolution pulse-width modulation PWM timers and a 12-bit ana- of the duty cycle D calculates the main component Dff using relations (1)–(3). The value log-to-digital converter (ADC). The converter was loaded with electronic load in constant- D V V Vre f ofvoltageff is calculatedmode to imitate based a ondc microgrid. the measured The outputOUT and voltage the was reference measured value for of protectionIN ( IN ). Theseusing calculations a resistive divider do not and take differential into account isolation the losses amplifier in the AMC1200 converter, from which Texas results Instru- in the underestimationments. The input of voltage the duty was cycle. measured This using means a thatresistiveDff woulddivider provideand an operational an input voltage am- slightlyplifier differentOPA378 from from Texas the reference Instruments. value. A high-accuracy To compensate hall-effect-based for this difference, current a generic sensor PI controllerACS720 from with Allegro a bandwidth Microsystems of 200 Hz was was used used for tothe minimize input current the differencemeasurement. between the referenceA smooth and measured transition input between voltage the MMR by adding modes a smallcould differencebe achieved∆ byD toemploying the duty the cycle Dfffeed-forward. It is important control, to reset similar (nullify) to [14]. the As integrator shown in eachFigure time 12, thethe MMRfeed-forward mode changes. calculation This approachof the duty enables cycle fastD calculates transients the during main component MMR mode D changes,ff using relations as shown (1)–(3). in Figure The value 13, where of the green signal for the ADC output of the microcontroller indicates the MMRref operating Dff is calculated based on the measured VOUT and the reference value of VIN (VIN ). These mode. The mode change transients take a longer time at the rising input voltage ramp due calculations do not take into account the losses in the converter, which results in the un- to the recharging of the MMR capacitors, which is required as the voltage VTX,sec increases derestimation of the duty cycle. This means that Dff would provide an input voltage its swing twofold at each transition. The reverse transitions are faster as the output current slightly different from the reference value. To compensate for this difference, a generic PI assists in discharging these capacitors. To stabilize the converter operation in the vicinity Electronics 2021, 10, x FOR PEER REVIEWcontroller with a bandwidth of 200 Hz was used to minimize the difference between16 the of 21 of the threshold voltages, a small hysteresis control with a bandwidth of ∆V = 2 V was reference and measured input voltage by adding a small difference ΔD to the dutyh cycle introduced for deﬁning mode transition points in the closed-loop control. Dff. It is important to reset (nullify) the integrator each time the MMR mode changes. This approach enables fast transients during MMR mode changes, as shown in Figure 13, 0.1 0.9 where the green signal for the ADC output of the microcontroller indicates the MMR op- ∆D erating mode. TheV ref mode change- transientsPI take a longer+ Sat.time at the rising input voltage IN + + D ramp due to the recharging of the MMR capacitors,Dff which is required as the voltage VTX,sec -0.1 PI 0.1 increases its swing twofold at each transition.Reset The reverse transitions are+ faster as the out- - S2 put current assists in discharging these capacitors. To stabilize the converterComp. operation in the vicinity of the threshold voltages, a small hysteresis control with a bandwidth+ of ΔVh + - S1 VIN + = 2 V was introduced for defining modeFeed-forward transition points in the closed-loop control. calculations of D VOU T TDT/TSW 1 Hysteresis Vth2 Triang. 2 0 carrier Vth1 1 1 Mode change detection 0 Mode VIN “0”: VQR SR1 ΔV ΔV ΔV ΔV “1”: VDR Static control h h h h of switches 2 2 2 2 “2”: FBR SR2

FigureFigure 12.12. ControlControl systemsystem forfor thethe converterconverter withwith BHBIBHBI andand MMR.MMR.

Figure 13. Closed-loop operation of the converter with BHBI.

5. Power Loss Breakdown The methodology for the power loss calculations is described in this section along with a power loss breakdown example. The power losses in the inductors includes the copper losses, dc and ac, represented by an equivalent resistance rLi. Considering the equivalent resistance and the rms current ILi,rms, the power losses in i-th inductor are calculated by: = 2 PrILi Li Li, rms . (6)

Inductor core losses can be ignored, as the ac components of the core flux density are much less than the maximum dc component.

Electronics 2021, 10, x FOR PEER REVIEW 16 of 21

0.1 0.9 ∆D V ref - PI + Sat. IN + + D Dff -0.1 PI 0.1 Reset + - S2 Comp. + + - S1 VIN + Feed-forward calculations of D VOU T TDT/TSW 1 Hysteresis Vth2 Triang. 2 0 carrier Vth1 1 1 Mode change detection 0 Mode VIN “0”: VQR SR1 ΔV ΔV ΔV ΔV “1”: VDR Static control h h h h of switches Electronics 2021, 10, 914 2 2 2 2 “2”: FBR SR2 16 of 20

Figure 12. Control system for the converter with BHBI and MMR.

Figure 13. Closed-loop operation of the converter with BHBI. 5. Power Loss Breakdown 5. Power Loss Breakdown The methodology for the power loss calculations is described in this section along The methodology for the power loss calculations is described in this section along with a power loss breakdown example. with a power loss breakdown example. The power losses in the inductors includes the copper losses, dc and ac, represented The power losses in the inductors includes the copper losses, dc and ac, represented by an equivalent resistance rLi. Considering the equivalent resistance and the rms current by an equivalent resistance rLi. Considering the equivalent resistance and the rms current ILi,rms, the power losses in i-th inductor are calculated by: ILi,rms, the power losses in i-th inductor are calculated by: 2 PLi = r=Li ILi,rms 2. (6) PrILi Li Li, rms . (6)

Inductor core losseslosses cancan be ignored, asas the ac components ofof thethe core ﬂuxflux densitydensity areare much less than the maximum dcdc component.component. Among the capacitors, only input-side capacitors should be considered for power loss calculation due to their high rms current stress. Similar to the inductors, the power losses in i-th capacitor are calculated based on the equivalent series resistance rCi and rms current ICi,rms as follows: 2 PCi = rCi ICi,rms . (7) MOSFET losses consist of conduction losses and switching losses. The conduction losses of the i-th MOSFET are calculated based on the on-state resistance RDS(on)i and the switch rms current ISi as follows:

2 PSi,cond = RDS(on)i ISi,rms. (8)

An improved method for the calculation of the switching losses was adopted from [34]. The switching losses of the i-th MOSFET consist of turn-on and turn-off losses:

PSi,sw = PSi,on + PSi,o f f , (9)

where PSi,on and PSi,off are the MOSFET turn-on and turn-off losses. According to [34,35]:

1 P = f I V (t + t ) + Q V , (10) Si,on 2 s Si,on Si r f u rr Si Electronics 2021, 10, 914 17 of 20

where tr is the current rise time from the datasheet and tfu is the voltage fall time that is calculated based on numerical integration of the CrSS parasitic capacitance characteristics from the MOSFET datasheet from 0 V up to the switch voltage stress value VSi corresponding to Table3. Qrr is the reverse-recovery charge that is typically given in the datasheet only for one out of many possible conditions, which reduces the accuracy of loss estimation. The turn-off losses are obtained as: 1 P = f I V (t + t ), (11) Si,o f f 2 s Si,o f f Si f ru

where tf is the current fall time from the datasheet and tru is the voltage rise time calculated based on the numerical integration of the CrSS parasitic capacitance characteristics from the MOSFET datasheet from the switch voltage stress value VSi down to 0 V. The copper losses of the transformer are calculated based on the equivalent resistance of the windings and rms transformer current. For calculations, the equivalent resistance of the transformer windings is considered in the secondary side based on the corresponding short-circuit test taken at 100 kHz using an RLC meter HAMEG HM8118 from Rohde&Schwarz. Therefore, the copper losses of transformer could be calculated by:

2 PTX,Cu = rTX ITX sec, (12)

where rTX is the equivalent resistance of the windings and ITXsec is the rms current of the secondary winding. The improved generalized Steinmetz equation (iGSE) method [36] was adopted for the calculation of the transformer core losses: α β−α Bm+1 − Bm PTX,core = fsvki(∆B) ∑ (tm+1 − tm), (13) m tm+1 − tm

where ∆B is the peak-to-peak flux density, α and β are the Steinmetz coefficients that depend on the core material and operating frequency according to the specification from a manufacturer, Bm is the flux density at instant tm, and v is the core volume. The constant ki could be obtained as follows: k ki = m (14) β+1 α−1 1.7061 2 π 0.2761 + α+1.354

where k is the Steinmetz coefﬁcient that is taken from the core material datasheet. As it follows from (13), the MMR mode with a lower GR value (the FBR mode) generates higher transformer core losses due to the increased voltage swing. The power losses of the MMR diodes are calculated based on the simple approximation of the diode volt-ampere characteristics by representing the conduction diode with a voltage source and a resistance: 2 PDi = VF IDi,av + Rd IDi,rms, (15)

where VF is the forward voltage drop of the diode, Rd is the on-state resistance of the diode that describes the slope of the volt-ampere characteristics, IDi,av is the average current of the i-th diode, and IDi,rms is the rms current of the i-th diode. For both BFEI, the VDR mode provides the best performance as features a good utilization of the transformer and a low number of diodes in the output-side rectiﬁer. The power loss breakdowns shown in Figure 14 were calculated for the operating power of 100 W and the operating voltages used in Figure 11. The input voltage corresponds to the operating points selected for Figure 11. As the input current is inversely proportional to the input voltage at a constant operating power, the power losses in the windings of the transformer and inductors would be the highest, as follows from Figure 14. The magnetic core in the transformer become recognizable only in the FBR mode. Therefore, these losses were grouped with the copper losses in Figure 14. The transformer suffers Electronics 2021, 10, 914 18 of 20

from the highest core losses in the FBR mode with the BHBI, where the ﬂux density swing is the highest among all operating conditions. In both converters, the MMR dissipates most of the losses in the VQR mode, where eight semiconductor components (all but D7) conduct the current. The losses in the auxiliary circuits and sensors increase with the input voltage as the efﬁciency of the onboard step-down power supply decreases, while the input-side voltage divider dissipates more losses at a higher input voltage. In the VQR mode, the conduction losses in the input-side semiconductors are dominant, while the Electronics 2021, 10, x FOR PEER REVIEW 19 of 21 switching losses are dominant in the FBR mode. Even though the BHBI operates at a twice higher voltage but lower currents than that of the FBqZSI in the same MMR mode, the high number of switches results in considerable losses in the FBqZSI switches in the FBR mode of the MMR.

FBqZSI BHBI

2.5 2.5 2 2 1.5 1.5 1 1 0.5 0.5 0 0 TX Inductor(s) S₁-S₄, Sq.. MMR Aux., TX Inductor(s) S₁, S₂ MMR Aux., sensors, sensors, others others

VQR VDR FBR VQR VDR FBR

(a) (b)

FigureFigure 14.14. PowerPower loss loss breakdown breakdown calculated calculated at at 100 100 W W for for operating operating voltages voltages from from Figure Figure 11 11considering considering two two BFEIs: BFEIs: (a) (FBqZSIa) FBqZSI and and (b) (BHBI.b) BHBI.

Despite the attempts to balance thethe BFEIBFEI performanceperformance byby selectingselecting operatingoperating pointspoints with nearly the same switch duty cycles, th thee FBqZSI showed an unbalanced performance, and thethe efficiencyefficiency in in the the VDR VDR mode mode of of the the MMR MMR is is much much better better than than in anyin any other other mode—i.e., mode— thei.e., “27the “27 V, VDR” V, VDR” curve curve is the is highestthe highest in Figure in Figure 11a. 11a. This This is due is due to theto the balanced balanced switching switch- lossesing losses of the of fivethe input-sidefive input-side MOSFETs MOSFETs and MMR and MMR conduction conduction losses fromlosses only from three only diodes three conductingdiodes conducting in the MMR, in the whileMMR, onewhile of one these of semiconductor these semiconductor types istypes gets is high gets in high the in VQR the andVQR FBR and modes. FBR modes. At the sameAt the time, same the time, BHBI the shows BHBI much shows more much balanced more performancebalanced perfor- due tomance using due only to two using MOSFETs, only two even MOSFETs, though theyeven operate though at they twice operate the voltage at twice stress the of voltage that of thestress FBqZSI of that at of the the same FBqZSI operating at the same point. oper Additionally,ating point. BHBI Additionally, consumes lessBHBI auxiliary consumes power less on-boardauxiliary power due to theon-board smaller due driving to the losses. smaller driving losses. 6. Conclusions 6. Conclusions This study shows that multimode rectifiers with static operating mode control are a promisingThis study solution shows in highthat multimode step-up DC-DC rectifiers converters with static that operating cannot achieve mode acontrol wide input are a voltagepromising range solution otherwise. in high The step-up high step-upDC-DC ofco thenverters input that voltage cannot requires achieve the a applicationwide input ofvoltage boost range front-end otherwise. inverters, The suchhigh asstep-up impedance- of the input and current-source voltage requires topologies. the application It could of beboost concluded front-end that inverters, the full-bridge such as boostimpedance- front-end and inverterscurrent-source tend to topologies. exhibit an It efficiency could be curveconcluded that risesthat the with full-bridge the input boost voltage front-end due to a inverters reduction tend in the to exhibit switching an andefficiency conduction curve losses.that rises The with application the input of voltage an MMR due extends to a reduction their input in the voltage switching regulation and conduction range but resultslosses. inThe a application sizable efficiency of an MMR step atextends the point their of inpu thet MMRvoltage mode regulation change. range Consequently, but results in the a heatsizable dissipation efficiency would step atchange the point stepwise of the MMR inside mode a converter change. case. Consequently, Therefore, the heat thermal dis- cyclingsipation of would the converter change componentsstepwise inside can a occur, converter which case. compromises Therefore, the the converter thermal cycling reliability. of Therefore,the converter this components paper recommends can occur, using which the half-bridgecompromises or anotherthe converter front-end reliability. inverter There- with afore, reduced this paper number recommends of switches using to avoid the half-bridge efficiency steps or another during front-end converter inverter operation with and a reduced number of switches to avoid efficiency steps during converter operation and provide a smooth efficiency curve. This approach also suits most high step-up applications well, as they typically require sub-kW converters. These conclusions were confirmed experimentally by comparing two prototypes. The full-bridge front-end inverter shows a high peak efficiency of 97.4%, but the efficiency can change with up to a 6% step in the case of an MMR mode change. The boost half- bridge front-end inverter avoids this issue but needs switches with a twice higher voltage rating. Nevertheless, it achieves a peak efficiency of 95.2% and a higher average efficiency than the full-bridge counterpart.

Electronics 2021, 10, 914 19 of 20

provide a smooth efficiency curve. This approach also suits most high step-up applications well, as they typically require sub-kW converters. These conclusions were confirmed experimentally by comparing two prototypes. The full-bridge front-end inverter shows a high peak efficiency of 97.4%, but the efficiency can change with up to a 6% step in the case of an MMR mode change. The boost half-bridge front-end inverter avoids this issue but needs switches with a twice higher voltage rating. Nevertheless, it achieves a peak efficiency of 95.2% and a higher average efficiency than the full-bridge counterpart.

Author Contributions: Conceptualization, D.V., O.K. and G.D.; methodology, A.C.; software, A.C. and O.K.; validation, A.C., O.K. and T.J.; formal analysis, D.V. and G.D.; investigation, D.V., T.J. and A.C.; resources, A.C.; data curation, O.K.; writing—original draft preparation, A.C. and D.V.; writing—review and editing, G.D., O.K. and T.J.; visualization, A.C. and T.J.; supervision, D.V.; project administration, O.K.; funding acquisition, A.C. and D.V. All authors have read and agreed to the published version of the manuscript. Funding: This research was supported in part by the Estonian Research Council (grants EAG9 and PUT1443), in part by the Estonian Centre of Excellence in Zero Energy and Resource Efficient Smart Buildings and Districts (ZEBE), grant 2014-2020.4.01.15-0016 funded by the European Regional Development Fund, and in part by the Government of Russian Federation, Grant 08-08. Conflicts of Interest: The authors declare no conflict of interest. The statements made herein are solely the responsibility of the authors.

References 1. Huang, Z.; Krishnaswami, H.; Yuan, G.; Huang, R. Ubiquitous power electronics in future power systems: Recommendations to fully utilize fast control capabilities. IEEE Electrif. Mag. 2020, 8, 18–27. [CrossRef] 2. Xu, Q.; Vafamand, N.; Chen, L.; Dragiˇcević,T.; Xie, L.; Blaabjerg, F. Review on Advanced Control Technologies for Bidirectional DC/DC Converters in DC Microgrids. IEEE J. Emerg. Sel. Top. Power Electron. 2020, 9, 1205–1221. [CrossRef] 3. Sinapis, K.; Litjens, G.; Donker, M.; Folkerts, W.; Sark, W. Outdoor characterization and comparison of string and MLPE under clear and partially shaded conditions. Energy Sci. Eng. 2015, 3, 510–519. [CrossRef] 4. Ravyts, S.; Dalla Vecchia, M.; Van den Broeck, G.; Yordanov, G.H.; Gonçalves, J.E.; Moschner, J.D.; Saelens, D.; Driesen, J. Embedded BIPV module-level DC/DC converters: Classification of optimal ratings. Renew. Energy 2020, 146, 880–889. [CrossRef] 5. Shen, Y.; Wang, H.; Al-Durra, A.; Qin, Z.; Blaabjerg, F. A Structure-reconfigurable series resonant DC–DC converter with wide-input and configurable-output voltages. IEEE Trans. Ind. Appl. 2019, 55, 1752–1764. [CrossRef] 6. Jovanović,M.M.; Irving, B.T. On-the-fly topology-morphing control—Efficiency optimization method for LLC resonant converters operating in wide input- and/or output-voltage range. IEEE Trans. Power Electron. 2016, 31, 2596–2608. [CrossRef] 7. Chub, A.; Vinnikov, D.; Kosenko, R.; Liivik, E. Wide input voltage range photovoltaic microconverter with reconfigurable buck–boost switching stage. IEEE Trans. Ind. Electron. 2017, 64, 5974–5983. [CrossRef] 8. Wang, H.; Shang, M.; Shu, D. Design considerations of efficiency enhanced LLC PEV charger using reconfigurable transformer. IEEE Trans. Veh. Technol. 2019, 68, 8642–8651. [CrossRef] 9. Hu, H.; Fang, X.; Chen, F.; Shen, Z.J.; Batarseh, I. A modified high-efficiency LLC converter with two transformers for wide input-voltage range applications. IEEE Trans. Power Electron. 2013, 28, 1946–1960. [CrossRef] 10. Ranjram, M.K.; Moon, I.; Perreault, D.J. Variable-inverter-rectifier-transformer: A hybrid electronic and magnetic structure enabling adjustable high step-down conversion ratios. IEEE Trans. Power Electron. 2018, 33, 6509–6525. [CrossRef] 11. Wang, H.; Li, Z. A PWM LLC type resonant converter adapted to wide output range in PEV charging applications. IEEE Trans. Power Electron. 2018, 33, 3791–3801. [CrossRef] 12. Zhao, X.; Chen, C.; Lai, J.S. A high-efficiency active-boost-rectifier-based converter with a novel double-pulse duty cycle modulation for PV to DC microgrid applications. IEEE Trans. Power Electron. 2019, 34, 7462–7473. [CrossRef] 13. Chub, A.; Vinnikov, D.; Kouro, S.; Malinowski, M. Three-mode reconfigurable rectifier for DC-DC converters with wide input voltage range. In Proceedings of the IECON 2019, Lisbon, Portugal, 14–17 October 2019; pp. 4429–4435. 14. Vinnikov, D.; Chub, A.; Liivik, E.; Blaabjerg, F.; Kouro, S. Maximizing energy harvest of the impedance source PV microconverter under partial shading conditions. In Proceedings of the CPE-POWERENG 2018, Doha, Qatar, 7 June 2018; pp. 1–7. 15. Wang, W.; Liu, W.; Yao, W.; Du, L.; Chen, G.; Lu, Z. LLC Resonant converter with topology morphing rectifier for wide output voltage range application. In Proceedings of the ICPES 2018, Colombo, Sri Lanka, 21–22 December 2018; pp. 17–22. 16. Vinnikov, D.; Chub, A.; Korkh, O.; Liivik, E.; Blaabjerg, F.; Kouro, S. MPPT performance enhancement of low-cost PV microconverters. Sol. Energy 2019, 187, 156–166. [CrossRef] 17. Costa, L.F.; Liserre, M. Failure analysis of the DC-DC converter: A comprehensive survey of faults and solutions for improving reliability. IEEE Power Electron. Mag. 2018, 5, 42–51. [CrossRef] Electronics 2021, 10, 914 20 of 20

18. Wu, H.; Li, Y.; Xing, Y. LLC Resonant converter with semiactive variable-structure rectifier (SA-VSR) for wide output voltage range application. IEEE Trans. Power Electron. 2016, 31, 3389–3394. [CrossRef] 19. Vinnikov, D.; Chub, A.; Liivik, E.; Blaabjerg, F.; Siwakoti, Y. Boost half-bridge DC-DC converter with reconfigurable rectifier for ultra-wide input voltage range applications. In Proceedings of the APEC 2018, Port Moresby, Papa New Guinea, 4–8 March 2018; pp. 1528–1532. 20. Costa, L.; Buticchi, G.; Liserre, M. A fault-tolerant series-resonant DC–DC converter. IEEE Trans. Power Electron. 2017, 32, 900–905. [CrossRef] 21. Samsudin, N.A.; Ishak, D.; Ahmad, A.B. Design and experimental evaluation of a single-stage AC/DC converter with PFC and hybrid full-bridge rectifier. Eng. Sci. Technol. Int. J. 2018, 21, 189–200. [CrossRef] 22. Shang, M.; Wang, H.; Cao, Q. Reconfigurable LLC topology with squeezed frequency span for high-voltage bus-based photovoltaic systems. IEEE Trans. Power Electron. 2018, 33, 3688–3692. [CrossRef] 23. Nguyen, M.H.; Fortin Blanchette, H. A review and comparison of solid, multi-strands and litz style PCB WINDING. Electronics 2020, 9, 1324. [CrossRef] 24. Kazimierczuk, M. Winding resistance at high frequencies. In High Frequency Magnetic Components, 2nd ed.; Wiley: Coshocton, OH, USA, 2014; p. 303. 25. Forouzesh, M.; Siwakoti, Y.P.; Gorji, S.A.; Blaabjerg, F.; Lehman, B. Step-up DC–DC converters: A comprehensive review of voltage-boosting techniques, topologies, and applications. IEEE Trans. Power Electron. 2017, 32, 9143–9178. [CrossRef] 26. Kosenko, R.; Liivik, L.; Chub, A.; Velihorskyi, O. Comparative analysis of semiconductor power losses of galvanically isolated quasi-z-source and full-bridge boost DC-DC converters. Electrical Control Commun. Eng. 2015, 8, 5–12. [CrossRef] 27. Maheri, H.M.; Vinnikov, D.; Chub, A.; Sidorov, V.; Liivik, E. Impact of transformer turns ratio on the power losses and efficiency of the wide range isolated buck–boost converter for photovoltaic applications. Energies 2020, 13, 5645. [CrossRef] 28. Siwakoti, Y.P.; Peng, F.Z.; Blaabjerg, F.; Loh, P.C.; Town, G.E. Impedance-source networks for electric power conversion part I: A topological review. IEEE Trans. Power Electron. 2015, 30, 699–716. [CrossRef] 29. Liivik, E.; Chub, A.; Kosenko, R.; Vinnikov, D. Low-cost photovoltaic microinverter with ultra-wide MPPT voltage range. In Proceedings of the ICCEP 2017, Santa Margherita Ligure, Italy, 27–29 June 2017; pp. 46–52. 30. Jiang, S.; Cao, D.; Li, Y.; Peng, F.Z. Grid-connected boost-half-bridge photovoltaic microinverter system using repetitive current control and maximum power point tracking. IEEE Trans. Power Electron. 2012, 27, 4711–4722. [CrossRef] 31. York, B.; Yu, W.; Lai, J. An integrated boost resonant converter for photovoltaic applications. IEEE Trans. Power Electron. 2013, 28, 1199–1207. [CrossRef] 32. Ardi, H.; Ajami, A.; Sabahi, M. A novel high step-up DC–dc converter with continuous input current integrating coupled inductor for renewable energy applications. IEEE Trans. Ind. Electron. 2018, 65, 1306–1315. [CrossRef] 33. Galigekere, V.P.; Kazimierczuk, M.K. Analysis of PWM Z-source DC-DC converter in CCM for steady state. IEEE Trans. Circuits Syst. I Reg. Pap. 2012, 59, 854–863. [CrossRef] 34. Guo, J.; Ge, H.; Jin, Y.; Emadi, A. Improved method for MOSFET voltage rise-time and fall-time estimation in inverter switching loss calculation. In Proceedings of the ITEC 2015, Dearborn, MI, USA, 14–17 June 2015. 35. Graovac, D.; Purschel, M.; Kiep, A. MOSFET power losses calculation using the data-sheet parameters. Infineon Technol. Appl. Note 2006, 1, 1–23. 36. Venkatachalam, K.; Sullivan, C.R.; Abdallah, T.; Tacca, H. Accurate prediction of ferrite core loss with nonsinusoidal waveforms using only Steinmetz parameters. In Proceedings of the 2002 IEEE Workshop on Computers in Power Electronics, Mayaguez, PR, USA, 3–4 June 2002.