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Enhancement-/Depletion-PHEMT Device and Manufacturing Method

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Enhancement-/Depletion-PHEMT Device and Manufacturing Method (19) TZZ _T (11) EP 2 555 242 B1 (12) EUROPEAN PATENT SPECIFICATION (45) Date of publication and mention (51) Int Cl.: of the grant of the patent: H01L 27/088 (2006.01) H01L 27/06 (2006.01) 23.07.2014 Bulletin 2014/30 H01L 21/8252 (2006.01) (21) Application number: 12178617.2 (22) Date of filing: 31.07.2012 (54) Enhancement-/depletion-PHEMT device and manufacturing method thereof Verstärkungs-/Verarmungs-PHEMT-Vorrichtung und Herstellungsverfahren dafür Dispositif PHEMT à enrichissement et appauvrissement et procédé pour sa fabrication (84) Designated Contracting States: (56) References cited: AL AT BE BG CH CY CZ DE DK EE ES FI FR GB EP-A1- 0 371 686 WO-A2-2006/083587 GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO JP-A- 63 222 462 JP-A- 2009 032 729 PL PT RO RS SE SI SK SM TR US-A1- 2006 208 279 US-A1- 2008 251 837 US-A1- 2010 001 318 US-A1- 2011 049 526 (30) Priority: 01.08.2011 IT TO20110713 • HURM V ET AL: "10 Gbit/s monolithic integrated (43) Date of publication of application: optoelectronic receiver using an MSM 06.02.2013 Bulletin 2013/06 photodiode and AlGaAs/GaAs HEMTs", MICROELECTRONIC ENGINEERING, ELSEVIER (73) Proprietor: SELEX ES S.p.A. PUBLISHERS BV., AMSTERDAM, NL, vol. 15, no. 00131 Roma (IT) 1-4, 1 October 1991 (1991-10-01), pages 275-278, XP024484431, ISSN: 0167-9317, DOI: (72) Inventors: 10.1016/0167-9317(91)90228-6 [retrieved on • Chini, Alessandro 1991-10-01] 00131 ROMA (IT) • HSIEN-CHIN CHIU ET AL: "High uniformity • Lanzieri, Claudio enhancementand depletion- modeInGaP/ InGaAs 00131 ROMA (IT) pHEMTs using a selective succinic acid gate recess process; High uniformity enhancement (74) Representative: Bergadano, Mirko et al and depletion-mode InGaP/InGaAs pHEMTs", Studio Torta S.p.A. SEMICONDUCTOR SCIENCE AND Via Viotti, 9 TECHNOLOGY, IOP PUBLISHING LTD, GB, vol. 10121 Torino (IT) 21, no. 1, 1 January 2006 (2006-01-01), pages 55-59, XP020098204, ISSN: 0268-1242, DOI: 10.1088/0268-1242/21/1/010 Note: Within nine months of the publication of the mention of the grant of the European patent in the European Patent Bulletin, any person may give notice to the European Patent Office of opposition to that patent, in accordance with the Implementing Regulations. Notice of opposition shall not be deemed to have been filed until the opposition fee has been paid. (Art. 99(1) European Patent Convention). EP 2 555 242 B1 Printed by Jouve, 75001 PARIS (FR) 1 EP 2 555 242 B1 2 Description [0008] Therefore, the object of the present invention is that of providing an enhancement/depletion PHEMT de- TECHNICAL FIELD OF THE INVENTION vice and a method of manufacturing an enhancement/de- pletion PHEMT device. [0001] The present invention relates, in general, to en- 5 [0009] This object is achieved by the present invention hancement/depletion Pseudomorphic High Electron Mo- in that the latter relates to a layered epitaxial structure bility Transistors (PHEMTs) and, in particular, to an en- for enhancement/depletion PHEMT devices, to an en- hancement/depletion PHEMT device and a method for hancement/depletion PHEMT device and to a method manufacturing enhancement/depletion PHEMT devices for manufacturing an enhancement/depletion PHEMT that finds advantageous, but not exclusive, application 10 device, according to that defined in the appended claims. in the production of integrated circuits operating at milli- [0010] In particular, the layered epitaxial structure for metre-wave and microwave frequencies. PHEMT devices comprises: STATE OF THE ART • a superlattice and buffer layer; 15 • an undoped back-barrier layer formed on the super- [0002] As is known, Pseudomorphic High Electron Mo- lattice and buffer layer and made of aluminium gal- bility Transistors (PHEMTs) are widely used in integrated lium arsenide (AlGaAs); circuits operating at millimetre-wave and microwave fre- • a doped back delta doping layer formed on the back- quencies, such as the so-called Monolithic Microwave barrier layer; Integrated Circuits (MMICs). 20 • an undoped back-spacer layer formed on the back [0003] In particular, PHEMTs are widely exploited in delta doping layer and made of aluminium gallium various types of system, such as radio communication arsenide (AlGaAs); systems and radar systems. • an undoped channel layer formed on the back-spac- [0004] In detail, PHEMTs have found wide utilization er layer and made of indium gallium arsenide (In- over the years because they provide high Radio Frequen- 25 GaAs); cy gain (RF gain), high Power Added Efficiency (PAE) • an undoped spacer layer formed on the channel lay- and a low Noise Figure (NF). er and made of aluminium gallium arsenide (Al- GaAs); OBJECT AND SUMMARY OF THE INVENTION • a delta doping layer formed on the spacer layer; 30 • an undoped enhancement barrier layer formed on [0005] The applicant, in consideration of the excellent the delta doping layer; properties of PHEMTs that, as previously mentioned, • a doped first etch stopper layer formed on the en- have given rise to extensive usage thereof in various hancement barrier layer and made of aluminium ar- types of systems over the years, has carried out an in- senide (AlAs); depth study on currently-known enhancement/depletion 35 • a doped first depletion barrier layer formed on the PHEMT devices. first etch stopper layer; [0006] In particular, the applicant has carried out an • an undoped second depletion barrier layer formed exhaustive analysis regarding the characteristics of the on the first depletion barrier layer; enhancement/depletion PHEMT devices described in • a doped second etch stopper layer formed on the United States patent applications US 2006/0027840 and 40 second depletion barrier layer and made of alumin- US 2006/0208279, in European patent application EP ium arsenide (AlAs); 0371686 and in United States patents US 6,670,652, US • a first cap layer doped with n-type doping, formed 6,703,638 and US 7,361,536. onthe second etch stopperlayer and made of gallium [0007] On the basis of the results of said analysis, the arsenide (GaAs); applicant felt, thence, the need to develop: 45 • an undoped second cap layer formed on the first cap layer and made of gallium arsenide (GaAs); • an innovative enhancement/depletion PHEMT de- • a third etch stopper layer doped with n-type doping, vice having superior properties than currently known formed on the second cap layer and made of alu- enhancement/depletion PHEMT devices, in particu- minium arsenide (AlAs); and lar the enhancement/depletion PHEMT devices de- 50 • an ohmic layer doped with n-type doping, formed on scribed in United States patent applications US the third etch stopper layer and made of gallium ar- 2006/0027840 and US 2006/0208279, in European senide (GaAs). patent application EP 0371686 and in United States patents US 6,670,652, US 6,703,638 and US [0011] Furthermore, the enhancement/depletion 7,361,536; and 55 PHEMT device according to the present invention com- • an innovative method for manufacturing enhance- prises: ment/depletion PHEMT devices. • the above-stated layered epitaxial structure; 2 3 EP 2 555 242 B1 4 • a first region comprising surface of the second depletion barrier layer de- fining the second Schottky contact region and - a first recess vertically formed through the ohmic extending vertically from said second Schottky layer and the third etch stopper layer so as to contact region through the fifth and fourth re- expose a first upper surface of the second cap 5 cesses so as to protrude from said fourth recess. layer, - a second recess that is narrower than the first BRIEF DESCRIPTION OF THE DRAWINGS recess and which vertically extends from the first recess through the second cap layer, the first [0012] For a better understanding of the present inven- cap layer and the second etch stopper layer so 10 tion, some preferred embodiments, provided by way of as to expose a first upper surface of the second non-limitative example, will now be illustrated with refer- depletion barrier layer, and ence to the attached drawings (not to scale), where: - a third recess that is narrower than the second recess and which vertically extends from the • Figures 1-6 are schematic section views that illus- second recess through the second depletion 15 trate successive manufacturing steps of a first en- barrier layer, the first depletion barrier layer and hancement/depletion PHEMT device according to a the first etch stopper layer so as to expose an first preferred embodiment of the present invention; upper surface of the enhancement barrier layer and defining a first Schottky contact region; • Figures 7 and 8 are schematic section views of a 20 second enhancement/depletion PHEMT device ac- • a second region laterally spaced apart, and electri- cording to a second preferred embodiment of the cally insulated, from said first region and comprising present invention. - a fourth recess vertically formed through the DETAILED DESCRIPTION OF PREFERRED EMBOD- ohmic layer and the third etch stopper layer so 25 IMENTS OF THE INVENTION as to expose a second upper surface of the sec- ond cap layer, and [0013] The present invention will now be described in - a fifth recess that is narrower than the fourth detail with reference to the attached Figures to enable recess and which vertically extends from the an expert in the field to embody it and use it. Various fourth recess through the second cap layer, the 30 modifications to the described embodiments will be im- first cap layer and the second etch stopper layer mediately obvious to experts in the field, and the generic so as to expose a second upper surface of the principles described herein can be applied to other em- second depletion barrier layer defining a second bodiments and applications without leaving the scope of Schottky contact region; protection of the present invention, as defined in the ap- 35 pended claims.
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