ECEN325: Electronics Spring 2021

Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)

Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements & Reading

• HW 7 due Apr 5

• MOSFET Reading • Razavi Ch6 – MOSFET Models • Razavi Ch7 – MOSFET Amplifiers

2 MOSFET Circuit Symbols

NMOS PMOS

• MOSFETs are 4-terminal devices • Drain, Gate, Source, & Body • Body terminal generally has small impact in normal operation modes, thus device is generally considered a 3-terminal device • Drain, Gate, and Source are respectively similar to the Collector, Base, and Emitter of the BJT • 2 complementary MOSFETS: NMOS, PMOS

3 NMOS Physical Structure

[Karsilayan] 4 CMOS Physical Structure

[Karsilayan] 5 VTH Definition

[Silva]

• The threshold voltage, VTH, is the voltage at which an “inversion layer” is formed • For an NMOS this is when the concentration of electrons equals the concentration of holes in the p- substrate 6 Drain Current Derivation: Channel Charge Density

[Razavi]

Q  WCox (VGC VTH )

ox where Capacitane per unit gate area : Cox  tox

 The incremental channel charge density is equal to the gate capacitance times the gate-channel voltage in excess of the threshold voltage.

CH 6 Physics of MOS Transistors 7 Drain Current Derivation: Charge Density at a Point

[Razavi]

Q(x) WCoxVGS V(x)VTH

 Let x be a point along the channel from source to drain, and V(x) its potential; the expression above gives the charge density (per unit length).

CH 6 Physics of MOS Transistors 8 Drain Current Derivation: Charge Density and Current

[Razavi]

I  Q v

 The current that flows from source to drain (electrons) is related to the charge density in the channel by the charge velocity.

CH 6 Physics of MOS Transistors 9 Drain Current Derivation:

Triode Region (Small VDS) Current Equation

[Razavi]

dV Electron Velocity : v   n dx  dV (x) I  Qx v  WC V V (x) V D ox GS TH n dx xL V x V I dx  DS C WV V (x) V dV (x) x00D V x  n ox GS TH   W  1  ID  nCox VGS VTH  VDS VDS L  2 

CH 6 Physics of MOS Transistors 10 Triode or Linear Region

[Silva]

VDS

x=0 x=L x V 0  0 V x  V V L  V DS L DS x V x  V V x  V V GC GS GS DS L • Channel depth and transistor current is a function of the overdrive

voltage, VGS-VT, and VDS

• Because VDS is small, VGC is roughly constant across channel length and channel depth is roughly uniform 1 R  W DS W I DS  nCOX VGS VTn  0.5VDS VDS C V V L For small V L ox GS Tn DS 11 MOS Equations in Triode Region (Large VDS)

Drain current: Expression used in SPICE level 1 VGS V GND DS W I   C V V  0.5V V tox DS L n OX GS Tn DS DS

N+ N+ W ID L Linear approximation This doesn’t V GS V really happen GND DS IDsat

tox

V > V N+ N+ W GS T VDS Non-linear channel VDSsat

VDSsat VGS VTn Triode Region Channel Profile

x V x  V V x  V V [Sedra/Smith] GC GS GS DS L

• If VGC is always above VT throughout the channel length, the transistor current obeys the triode region current equation 13 Saturation Region Channel Profile

x V x  V V x  V V GC GS GS DS L

• When VDS  VGS-VTH=VOV, VGC no longer exceeds VTH, resulting in the channel “pinching off” and the current saturating to a value that is no longer a

function of VDS (ideally)

[Sedra/Smith] 14 Saturation Region

[Silva]

x V =V -V V -V V x V V x  V V DSsat GS T DS DSsat GC GS GS DS L

x=0 x=L x V 0  0 V x  V V L  V DS L DS

• Channel “pinches-off” when VDS=VGS-VTH and the current saturates • After channel charge goes to 0, the high lateral field “sweeps” the

carriers to the drain and drops the extra VDS voltage W  V  I   C V V  DS V DS n OX L GS Tn 2 DS   VDS VGS VTn VDSsat VGS VTn

 C W 2 I  n OX V V DS 2 L GS Tn 15 NMOS ID –VDS Characteristics

V  V V OV GS TN [Sedra/Smith]

16 MOS “Large-Signal” Output Characteristic

[Sedra/Smith]

Note: V =V -V ov GS T 17 What about the PMOS device?

NMOS PMOS

[Silva]

• The current equations for the PMOS device are the same as the NMOS EXCEPT you swap the current direction and all the voltage polarities NMOS PMOS W W Linear: I   C V V  0.5V V I   C V  V  0.5V V DS L n OX GS Tn DS DS SD L p OX SG Tp SD SD W W 2 Saturation: I   C V V 2 I   C V  V DS 2L n OX GS Tn SD 2L p OX SG Tp

18 PMOS ID –VSD Characteristics

VOV  VSG  VTP [Karsilayan]

(Saturation)

19 NMOS DC Operation (w/ infinite rout)

Region Bias Condition I DS

Cutoff VGS  VTN I DS  0

 W  VDS  Triode (Linear) VGS  VTN , VDS  VGS VTN I DS  nCox VGS VTN  VDS L  2 

 C W Saturation (Active) V  V , V  V V I  n ox V V 2 GS TN DS GS TN DS 2 L GS TN

[Karsilayan] • In transistor model, often combine

nCox term as a parameter KPN with units A/V2

• In lab, we combine nCox(W/L) term 2 as a parameter N with units A/V

20 PMOS DC Operation (w/ infinite rout)

Region Bias Condition I SD

Cutoff VSG  VTP I SD  0

 W  VSD  Triode (Linear) VSG  VTP , VSD  VSG  VTP I SD  pCox VSG  VTP  VSD L  2 

 C W 2 Saturation (Active) V  V , V  V  V I  p ox V  V SG TP SD SG TP SD 2 L SG TP

• In transistor model, often combine

pCox term as a parameter KPP with units A/V2

• In lab, we combine pCox(W/L) term 2 as a parameter P with units A/V [Karsilayan]