Design & Simulation of 32-Bit Floating Point
Design & Simulation Of 32-Bit Floating Point ALU DESIGN & SIMULATION OF 32-BIT FLOATING POINT ALU 1KAVITA KATOLE, 2ASHWIN SHINDE, 3SUMEDHA CHOKHANDRE, 4BHUSHAN MANJRE, 5NIRJA DHARMALE 1234Asst.Prof, 123DBACER, 4PCOE, 5RCOE Abstract— VHDL environment for floating point arithmetic and logic unit design is introduced the novelty in the ALU design which provides a high performance ALU to execute multiple instructions simultaneously. In top-down design approach, arithmetic modules, addition, subtraction, multiplication, division, comparison & logical functions are combined to form a floating point ALU unit. Each module is divided into sub- modules with four selection bits are combined to select a particular operation. Each module is independent to each other. The modules are realized and validated using VHDL simulation in the Active HDL software. Keywords— VHDL, Xilinx 9.2 ISE, ALU, Floating point I. INTRODUCTION fixed point representation. In this representation, each number is treated as a fraction between -1 and 1. The The term floating point is derived from the fact that magnitude of each number ranges from 0 to 1. The there is no fixed number of digits before and after the main advantage of this format is that multiplication decimal point, that is, the decimal point can float. doesn’t cause overflow, only addition can cause an There are also representations in which after the overflow. Many DSP coefficients and transforms, decimal point, that is, the decimal point can float. especially FFT and IFFT, that we will be using in The number of digits before and after the decimal OFDM are typically fractions and can be easily point is set, called fixed-point representations.
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