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Intel 80310 I/O Processor Chipset AAU Coding Techniques

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Intel 80310 I/O Processor Chipset AAU Coding Techniques Intel® 80310 I/O Processor Chipset AAU Coding Techniques White Paper January 14, 2002 Document Number: 273649-001 Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Intel® 80310 I/O processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. Copyright© Intel Corporation, 2002 AlertVIEW, i960, AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, Commerce Cart, CT Connect, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, GatherRound, i386, i486, iCat, iCOMP, Insight960, InstantIP, Intel, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel ChatPad, Intel Create&Share, Intel Dot.Station, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetStructure, Intel Play, Intel Play logo, Intel Pocket Concert, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel WebOutfitter, Intel Xeon, Intel XScale, Itanium, JobAnalyst, LANDesk, LanRover, MCS, MMX, MMX logo, NetPort, NetportExpress, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, ProShare, RemoteExpress, Screamline, Shiva, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside, The Journey Inside, This Way In, TokenExpress, Trillium, Vivonic, and VTune are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. 2 White Paper Contents Contents 1.0 White Paper Purpose and Description ........................................................................................7 1.1 Document Highlights.............................................................................................................7 1.2 Related Documents ..............................................................................................................7 2.0 Application Accelerator Unit ........................................................................................................8 2.0.1 Overview..................................................................................................................8 3.0 Low-Level Design Document .......................................................................................................9 3.1 Objective...............................................................................................................................9 3.1.1 AAU Implementation................................................................................................9 3.1.1.1 Overview ..................................................................................................9 3.1.2 Assumptions ..........................................................................................................10 3.1.3 Initialization ............................................................................................................11 3.1.4 AAU Data Structures .............................................................................................11 3.1.5 Data Path...............................................................................................................15 3.1.6 API Functions ........................................................................................................17 3.1.6.1 API Listing..............................................................................................17 3.1.6.1.1 AAU Public............................................................................17 3.1.6.1.2 AAU Private (Static) ..............................................................17 3.1.6.2 Selected API Descriptions .....................................................................18 3.1.6.2.1 static int __init aau_init(void);................................................18 3.1.6.2.2 static int aau_start(iop310_aau_t *aau, sw_aau_t *aau_chain);..........................................................19 3.1.6.2.3 int aau_request(u32 *aau_context); ......................................19 3.1.6.2.4 int aau_suspend(u32 aau_context);......................................19 3.1.6.2.5 int aau_resume(u32 aau_context); .......................................20 3.1.6.2.6 int aau_queue_buffer(u32 aau_context, aau_sgl_t *sgl);......20 3.1.6.2.7 static int aau_flush_all(u32 aau_context);.............................21 3.1.6.2.8 int aau_free(u32 aau_context); .............................................21 3.1.6.2.9 static void aau_irq_handler(int irq, void *dev_id, struct pt_regs *regs);.............................................................22 3.1.6.2.10 static void aau_process(iop310_aau_t *aau); .......................24 3.1.6.2.11 static void aau_result_handler(void *aau);............................24 3.1.6.2.12 aau_sgl_t * aau_get_buffer(u32 aau_context, u32 num_buf); .......................................................................25 3.1.6.2.13 void aau_return_buffer(u32 aau_context, sgl_list_t *list); .....25 4.0 Code Commentary.......................................................................................................................26 4.1 Section Objectives ..............................................................................................................26 4.1.1 File Organization Overview....................................................................................26 4.1.1.1 Key Data Structure and Use of Casting .................................................26 4.1.2 Cache Memory ......................................................................................................27 4.1.3 Other AAU Hardware.............................................................................................27 4.1.4 Virtual to Physical memory ....................................................................................27 4.1.5 Interrupt Handling ..................................................................................................28 4.1.5.1 Top Half Interrupt Handler: aau_irq_handler() .......................................28 4.1.5.2 Bottom Half Interrupt Handler: aau_task() .............................................28 4.1.6 Linux Kernel APIs ..................................................................................................28 White Paper 3 Contents 4.2 Optimization Related ..........................................................................................................29 4.2.1 Stack verses Queue ..............................................................................................29 4.2.2 Chaining and Resume ...........................................................................................29 4.2.3 Requiring the Application to Supply Physical Addresses in AAU Descriptor (verses virtual addresses)........................................................29 4.2.4 Allocations of Memory for AAU Decriptors During Initialization.............................29 4.2.5 Using AAU for Local Memory to Local Memory Copy: mem_copy() ..................... 29 5.0 Potential Enhancements.............................................................................................................30 5.1 Error Handling.....................................................................................................................30 5.2 Lookaside Cache Scheme (This is Linux specific) .............................................................30 5.3 Extensive Intel Optimization Related Documentation.........................................................30 6.0 Conclusion...................................................................................................................................31 A AAU Source Code........................................................................................................................32 A.1 Public Definitions for Intel® 80310 I/O Processor Chipset AAU: \include\aau.h......................... 32 A.2 Private Definitions for Intel® XScale™ Microarchitecture AAU: \src\aau.h .................................36
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