Chapter 13 Output Stages and Power Amplifiers

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Chapter 13 Output Stages and Power Amplifiers Chapter 14 Output Stages and Power Amplifiers 14.1 General Considerations 14.2 Emitter Follower as Power Amplifier 14.3 Push-Pull Stage 14.4 Improved Push-Pull Stage 14.5 Large-Signal Considerations 14.6 Short Circuit Protection 14.7 Heat Dissipation 14.8 Efficiency 14.9 Power Amplifier Classes 1 Why Power Amplifiers? Drive a load with high power. Cellular phones need 1W of power at the antenna. Audio systems deliver tens to hundreds of watts of power. Ordinary Voltage/Current amplifiers are not suitable for such applications CH 13 Output Stages and Power Amplifiers 2 Chapter Outline CH 13 Output Stages and Power Amplifiers 3 Power Amplifier Characteristics Experiences low load resistance. Delivers large current levels. Requires large voltage swings. Draws a large amount of power from supply. Dissipates a large amount of power, therefore gets “hot”. CH 13 Output Stages and Power Amplifiers 4 Power Amplifier Performance Metrics Distortion - Linearity Power Efficiency Voltage Rating – Transistor Breakdown voltage CH 13 Output Stages and Power Amplifiers 5 Emitter Follower Large-Signal Behavior I Av R L R L1 g m For RL 8 , 1/gImC 0.8 , thus, 32.5 mA As Vin increases Vout also follows and Q1 provides more current. For Vin=4.8V, Vout=4.0V, IL=500mA, IE1=532.5mA CH 13 Output Stages and Power Amplifiers 6 Emitter Follower Large-Signal Behavior II However, as Vin decreases, Vout also decreases, shutting off Q1 and resulting in a constant Vout. For Vin=0.8V, Vout=0V, IL=0mA, IE1=32.5mA For Vin=0.7V, Vout=-0.1V, IL=12.5mA, IE1=20mA When all current (32.5mA) flows to the load, Vout=-0.26V CH 13 Output Stages and Power Amplifiers 7 Example 14.1: Emitter Follower Vin=0.5V, Vout=? Vout VVVIIin BE1 out, 1 C 1 RL VVIIBE11 Tln( C / S ) Vout 1 VVIVin Tln 1 out RILS For VVin 0.5 Vout 211 mV by a few iterations CH 13 Output Stages and Power Amplifiers 8 Example 14.1: Emitter Follower For what Vin, Q1 carries only 1% of I1? IC1 VVIIRin Tln C11 L IS For IIC110.01 Vin 390 mV CH 13 Output Stages and Power Amplifiers 9 Linearity of an Emitter Follower As Vin decreases the output waveform will be clipped, introducing nonlinearity in I/O characteristics. CH 13 Output Stages and Power Amplifiers 10 Push-Pull Stage As Vin increases, Q1 is on and pushes current into RL. As Vin decreases, Q2 is on and pulls current out of RL. CH 13 Output Stages and Power Amplifiers 11 Example 14.2: I/O Characteristics for Large Vin Vout = Vin-VBE1 for large +Vin Vout = Vin+|VBE2| for large -Vin For positive Vin, Q1 shifts the output down and for negative Vin, Q2 shifts the output up. CH 13 Output Stages and Power Amplifiers 12 Overall I/O Characteristics of Push-Pull Stage However, for small Vin, there is a “dead zone” (both Q1 and Q2 are off) in the I/O characteristic, resulting in gross nonlinearity. CH 13 Output Stages and Power Amplifiers 13 Example 14.3: Small-Signal Gain of Push-Pull Stage The push-pull stage exhibits a gain that tends to unity when either Q1 or Q2 is on. When Vin is very small, the gain drops to zero. CH 13 Output Stages and Power Amplifiers 14 Example 14.4: Sinusoidal Response of Push-Pull Stage For large Vin, the output follows the input with a fixed DC offset, however as Vin becomes small the output drops to zero and causes “Crossover Distortion.” CH 13 Output Stages and Power Amplifiers 15 Improved Push-Pull Stage VB = VBE1 + |VBE2| With a battery of VB inserted between the bases of Q1 and Q2, the dead zone is eliminated. CH 13 Output Stages and Power Amplifiers 16 Implementation of VB Since VB=VBE1+|VBE2|, a natural choice would be two diodes in series. I1 in figure (b) is used to bias the diodes and Q1. CH 13 Output Stages and Power Amplifiers 17 Example 14.6: Current Flow I IIIIin1 B 1 B 2 Iin Usually IIVB12 B unless out 0 IVin flows even when out = 0. CH 13 Output Stages and Power Amplifiers 18 Example 14.8: Current Flow II VVD1 BE → VVout in IVIIin0 when out 0 if 12 CH 13 Output Stages and Power Amplifiers 19 Addition of CE Stage A CE stage (predriver) is added to provide voltage gain from the input to the bases of Q1 and Q2. CH 13 Output Stages and Power Amplifiers 20 Bias Point Analysis Vout=0 VA=0 For bias point analysis for Vout=0, the circuit can be simplified to the one on the right, which resembles a current mirror. ISQ,1 IICC13 ISD,1 CH 13 Output Stages and Power Amplifiers 21 Small-Signal Analysis Assuming 2rD is small and (gm1+gm2)RL is much greater than 1, Av g m4 r 1 r 2 ( 1) R L g r r r r g g 1 R m4 1 2 1 2 m 1 m 2 L gm4 r 1 r 2 g m 1 g m 2 R L CH 13 Output Stages and Power Amplifiers 22 Example 14.9: Output Resistance Analysis 1 rrOO34|| Rout gm1 g m 2( g m 1 g m 2 )( r 1 || r 2 ) If β is low, the second term of the output resistance will rise, which will be problematic when driving a small resistance. CH 13 Output Stages and Power Amplifiers 23 Example14.10: Biasing Compute the required bias current. Predriver (CE stage):AV 5 125uA OutputStage:ARVL 0.8 for 8 60uA 65uA 2 100, II 6.5mA npn pnp C12 C 6.5mA 135uA 11 195uA gm1 g m 2 2 g m 1 g m 2 4 Thus, IICC126.5 mA rr12|| 400 || 200 133 gm4 r 1|| r 2 1 g m 1 g m 2 R L 4 1 gImC44 133 195 μA CH 13 Output Stages and Power Amplifiers 24 Problem of Base Current 195 µA of base current in Q1 can only support 19.5 mA of collector current, insufficient for high current operation (500 mA for 4 V on 8 ). CH 13 Output Stages and Power Amplifiers 25 Modification of the PNP Emitter Follower 1 Rout 231 gm Instead of having a single PNP as the emitter-follower, it is now combined with an NPN (Q2), providing a lower output resistance. CH 13 Output Stages and Power Amplifiers 26 Example 14.11: Input Resistance v R Comparing with the standard EF, out L v 1 11 in R rout L 1 231 gm 1 231 gm 231 gm r 3 r 3 CH 13 Output Stages and Power Amplifiers 27 Example 14.11: Input Resistance 1 RL iin v in v in r 3 1 RL 231 gm rin3( 2 1) R L r 3 CH 13 Output Stages and Power Amplifiers 28 Additional Bias Current I1 is added to the base of Q2 to provide an additional bias current to Q3 so the capacitance at the base of Q2 can be charged/discharged quickly. Additional pole at the base of Q2. CH 13 Output Stages and Power Amplifiers 29 Example 14.12: Minimum Vin MinVin 0 Min Vin V BE 2 VVout EB2 VVVout EB32 BE CH 13 Output Stages and Power Amplifiers 30 Power Amplifier Classes Class A: High linearity, low efficiency Class B: High efficiency, low linearity Class AB: Compromise between Class A and B CH 13 Output Stages and Power Amplifiers 31 HiFi Design As Vout becomes more positive, gm rises and Av comes closer to unity, resulting in nonlinearity. Using negative feedback, linearity is improved, providing higher fidelity. CH 13 Output Stages and Power Amplifiers 32 Short-Circuit Protection Qs and r are used to “steal” some base current away from Q1 when the output is accidentally shorted to ground, preventing short-circuit damage. CH 13 Output Stages and Power Amplifiers 33 Power transistors Package and heat sink Small-signal Transistor Power Transistor in Heat Sink Power Transistor Inside Emitter Follower Power Rating (Class A) Pull down is done by a current source with huge current! 1 T P I V dt avT 0 C CE 1 T Vtsin I P V Vsin t dt 0 1 CC P TRL 2 VVVPPP IVIVI1 CC 1 CC if 1 RRLL2 Maximum power dissipated across Q1 occurs in the absence of a signal. CH 13 Output Stages and Power Amplifiers 35 Example 14.13: Power Dissipation Avg Power Dissipated in the Current Source I1 1 T PI11 I V psin t V EE dt T 0 IV1 EE CH 13 Output Stages and Power Amplifiers 36 Push-Pull Stage Power Rating 1 T /2 P I V dt av, NPNT 0 C CE 1 T /2 Vtsin V Vsin t P dt 0 CC P TRL 2 VVVCC PVVVPPP CC RRRLLL44 No power for half of the period. CH 13 Output Stages and Power Amplifiers 37 Push-Pull Stage Power Rating 1 T /2 P I V dt av, NPNT 0 C CE 1 T /2 Vtsin V Vsin t P dt 0 CC P TRL 2 VVVCC PVVVPPP CC RRRLLL44 No power for half of the period. Maximum power occurs between Vp=0 and 4Vcc/π. 2 VVVCC P CC PVav,max 2 when P 2 RL CH 13 Output Stages and Power Amplifiers 38 Push-Pull Stage Power Rating 1 T P I V dt av, PNPT T /2 C CE 1 T Vtsin Vsin t V P dt T /2 P EE TRL 2 VVVVVVEE P P P EE P RRRLLL44 PPVVav,, PNP av NPN when CC EE Maximum power occurs between Vp=0 and 4VCC/π.
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