Owned by Dipl. Ing. Mario Blunk Buchfinkenweg 3 99097 Erfurt / Germany Phone +49 (0)361 6022 5184 Email
[email protected] Internet www.blunk-electronic.de Doc. Vers. 2017-08-10 Design Reviews Surveys Consulting HW/SW Engineering (Eagle, KiCad, VHDL, Verilog, Ada, Linux) Agenda Day #1 Day #2 Day #3 ● schematic capture ● part placement ● creating/editing parts in ● defining net classes ● texts in copper the library ● electrical rule check ● silk screen ● symbols, packages, (ERC) ● design rules (DRC) devices ● schematic structure ● layer setup, via types ● library structure ● exercises & consulting ● routing ● naming conventions ● preparing PCB layout ● communication with ● resource management ● outlines of the board suppliers and assembly ● CAM processor ● fiducials, mounting holes houses ● Gerber/drill data ● exercises & consulting Day #4 ● project & schematic structure ● practicing with modular and hierarchic designs ● naming conventions / style guides ● introduction to agile HW development ● design for test & manufacturing (DFT/DFM) ● scripting & automation Create Project right-click / new project Create Schematic #1 right-click on project name / new schematic Create Schematic #2 Schematic Frame command ADD Schematic Capture #1 commands ADD, USE, MOVE, DELETE, GROUP, NAME, VALUE, CHANGE, SMASH Schematic Capture #2 commands NET, NAME, LABEL, SPLIT, JUNCTION, SHOW Schematic Capture #3 command INVOKE or across sheets use INVOKE V1 Nets commands LABEL, MOVE, DELETE Gate Swap command GATESWAP before after Busses commands BUS, NAME,