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Zero-Voltage Switching Flyback-Boost Converter with Voltage-Doubler Rectifier for High Step-Up Applications

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Zero-Voltage Switching Flyback-Boost Converter with Voltage-Doubler Rectifier for High Step-Up Applications Zero-Voltage Switching Flyback-Boost Converter with Voltage-Doubler Rectifier for High Step-up Applications Hyun-Wook Seong, Hyoung-Suk Kim, Ki-Bum Park, Gun-Woo Moon, and Myung-Joong Youn Department of Electrical Engineering, KAIST 373-1 Guseong-dong, Yuseong-gu, Daegeon, Republic of Korea, 305-701 [email protected] Abstract -- A zero-voltage switching (ZVS) flyback-boost (FB) output rectifier produces the high voltage spike. Thus, the converter with a voltage-doubler rectifier (VDR) has been snubber network is required across the output rectifier, which proposed. By combining the common part between a flyback results in a degraded efficiency. converter and a boost converter as a parallel-input/series-output As an attractive solution over aforementioned topologies, (PISO) configuration, this proposed circuit can increase a step- up ratio and clamp the surge voltage of switches. The secondary the flyback-boost (FB) converter was proposed as shown in VDR provides a further extended step-up ratio as well as its Fig. 1 [5], [6]. It can achieve a higher step-up ratio due to voltage stress to be clamped. An auxiliary switch instead of a both a transformer and a parallel-input/series-output (PISO) boost diode enables all switches to be turned on under ZVS configuration. Since the voltage spike across the switch is conditions. The zero-current turn-off of the secondary VDR limited to the output voltage of the boost converter, no alleviates its reverse-recovery losses. The operation principles, protection circuit is required. Furthermore, since the energy the theoretical analysis, and the design consideration are investigated. The experimental results from a 250W and 42V-to- stored in the leakage inductance is effectively recycled and 400V prototype are shown to verify the proposed scheme. transferred to the load, a high efficiency can be achieved. However, despite of those advantageous features, the Index Terms—Zero-voltage switching (ZVS), Voltage- voltage spike across the output rectifier is inevitable. Thus, to doubler rectifier (VDR), and Step-up ratio. achieve the voltage clamping of the switch and output rectifiers simultaneously, the concept of the voltage-doubler I. INTRODUCTION presented in [2], [3] can be adopted in an FB converter [7]. It The DC-DC conversion systems powered by battery can protect the output rectifiers from a high peak voltage as sources such as high intensity discharge (HID) lamps, well as provide a higher step-up ratio than an FB converter. uninterruptible power supplies (UPS), fuel cell systems, and Moreover, since the boost diode and output rectifier are LED drivers call for high-performance step-up converters [1]. turned off at zero current, the reverse-recovery losses can be The major concerns for the step-up converters are how to alleviated. Hence, among various alternatives, the FB extend a step-up ratio and how to alleviate the voltage spike converter with a VDR is one of the most attractive candidates across the switching devices led from the leakage inductance for high step-up applications. of the transformer. However, most of abovementioned circuits including the To handle the mentioned concerns, several non-isolated FB converter with a VDR suffer from considerable switching converter topologies have been proposed, since the galvanic losses due to the hard switching. It confines to increase the isolation is not the critical requirement for those applications switching frequency and to minimize the size of magnetic [1]-[6]. In [2]-[3], it has been demonstrated that the voltage- components and filter capacitors. doublers using additional diodes and capacitors on the output stage effectively contribute to extend a step-up ratio without the penalty of the extreme duty ratio and to limit the voltage stress of the output rectifiers. However, dissipative protection circuits across the switches increase the cost, losses, and design complexity. Another approach to extend a step-up ratio is using clamp-mode coupled-inductor boost converters [1], [4]. Since the leakage energy can be recycled due to the non-dissipative clamp circuits across the switch, it can achieve a high efficiency as well as protect the switch from the high peak voltage. Nevertheless, the resonance between the leakage inductance and the parasitic capacitance of the Fig. 1. Circuit diagram of the flyback-boost (FB) converter. 978-1-4244-5287-3/10/$26.00 ©2010 IEEE 823 I L C I D I lkg lkg 1:n b Cb o2 Do2 DTS (1-D)TS Vlkg VCb IO Q1 Q2 Q1 Lm VLm Do1 IDo1 Co2 VCo2 ILm VCb/n VLm (VCo2 VCb)/n VI Ro VO Q2 IQ2 VI VCb/n VI+(VCo2 VCb)/n IQ1 Vlkg VI-VCo1-VCb/n Q1 Co1 VCo1 VI VCo1+(VCo2 VCb)/n ILm Fig. 2. Circuit diagram of the proposed ZVS FB converter with VDR. Ilkg IQ1 In order to reduce switching losses while maintaining the advantageous features, a zero-voltage switching (ZVS) FB IQ2 converter with a VDR is proposed as shown in Fig. 2. By VQ1 VCo1 using an auxiliary switch instead of a boost diode in the FB VQ2 converter, all switches can be turned on under ZVS ICb conditions. Therefore, the proposed converter can ensure the higher operating frequency, higher step-up ratio, lower IDo1 voltage stresses across the switches and output rectifiers with IDo2 an improved conversion efficiency. The operation principle VDo1 and the theoretical analysis are investigated. The VCo2 V experimental results are then presented for the verifications. Do2 t0 t1 t2 t3 t4 t5 t6 t7 II. OPERATION PRINCIPLES OF THE PROPOSED CONVERTER Fig. 3. Steady-state waveforms of the proposed converter. Fig. 2 shows the circuit diagram of the proposed ZVS FB through the anti-parallel diode of Q1. Therefore, the zero converter with a VDR. The structure of the proposed voltage across Q1 is maintained. Since the voltage across the converter is the same as that of the FB converter except for magnetizing inductor VLm is -(VCo2-VCb)/n due to the the existence of a VDR and an auxiliary switch Q2. The VDR forward-biased output rectifier DO2, Ilkg(t) is increased is composed of a link capacitor Cb and rectifying diodes DO1 linearly as given by the following equation. and DO2. The auxiliary switch Q2 is turned on and off in a VVICoCb()/2 V n complementary way to the main switch Q . To illustrate the Ilkg()tttIt (00 ) lkg ( ) (1) 1 L steady-state operation, several assumptions are made as lkg follows: Mode 2 (t1-t2) : At t=t1, the switch Q1 is turned on under ▪ The values of the output capacitors are large enough to be ZVS conditions while its anti-parallel diode is conducting. regarded as constant voltage sources V and V . The current Ilkg(t) continuously increases with the slope Co1 Co2 expressed in (1) and reaches the magnetizing inductor current ▪ The link capacitor Cb is kept on being charged with a constant voltage V . at t2. It means that the rectifier DO2 is turned off at zero Cb current, which can alleviate the reverse-recovery problem. ▪ The magnetizing current I is always positive. Lm Mode 3 (t -t ) : At t=t , the diode D is turned off. After ▪ The leakage inductor L is much less than the magnetizing 2 3 2 O2 lkg that, the diverted current through the transformer charges the inductor Lm. junction capacitor of D to V and discharges that of D Fig. 3 and Fig. 4 illustrate the steady-state waveforms and O2 Co2 O1 to 0V for a short time, respectively. Then, it flows through topological states of the proposed converter, respectively. To the output rectifier D to charge the link capacitor C . present the operation of each mode sequentially, it is assumed O1 b Because the applied voltage across Lm is VCb/n, the current that the switch Q1 was turned off and the switch Q2 was Ilkg(t) can be expressed as follows: turned on before t0. Due to an auxiliary switch Q2, the VVICb / n regenerated current from the output capacitor CO1 flows to Ilkg()tttIt (22 ) lkg ( ) (2) the input source. Thus, the direction of the primary current Llkg Ilkg(t) is reversed with a negative slope before t0. Mode 4 (t3-t4) : At t=t3, the switch Q1 is turned off. The Mode 1 (t0-t1) : At t=t0, the switch Q2 is turned off. The current Ilkg(t) charges the junction capacitor of Q1 to VCo1 and primary leakage current Ilkg(t) charges the junction capacitor discharges that of Q2 to 0V rapidly. Then, it flows through of Q2 to VCo1 and discharges that of Q1 to 0V, respectively in the anti-parallel diode of Q2. Since the voltage across Q1 is a resonant manner for a very brief time. Then, it flows clamped to VCo1 due to the anti-parallel diode of Q2, no 824 (a) (b) (c) (d) (e) (f) (g) Fig. 4. Topological states of the proposed converter (a) Mode 1 (t0-t1), (b) Mode 2 (t1-t2), (c) Mode 3 (t2-t3), (d) Mode 4 (t3-t4), (e) Mode 5 (t4-t5), (f) Mode 6 (t5-t6), and (g) Mode 7 (t6-t7). protection circuit is required and the conduction loss can be off at t7. The reverse-directed current Ilkg(t) flows to the input reduced by using lower voltage-rated power switches. The source. conducted anti-parallel diode provides the zero voltage across Q2 until the next mode. The current Ilkg(t) can be easily III. ANALYSIS AND DESIGN CONSIDERATION OF THE PROPOSED obtained as follows: CONVERTER VVICoCb1 V/ n Ilkg()tttIt (33 ) lkg ( ) (3) A. Step-up Ratio L lkg Due to the series-output configurations, each output Mode 5 (t -t ) : At t=t , the switch Q is turned on under 4 5 4 2 capacitor voltage is put together and the overall output ZVS conditions.
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