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The Ultimated Edition Tout Du M Ondeo THEULTIMATED EDITIONUS 20170352767A1 TOUTDU M ONDEO (19 ) United States (12 ) Patent Application Publication ( 10) Pub . No. : US 2017/ 0352767 A1 Hayne (43 ) Pub . Date : Dec. 7 , 2017 ( 54 ) ELECTRONIC MEMORY DEVICES HOIL 29 /66 (2006 .01 ) GIIC 16 / 14 ( 2006 . 01 ) (71 ) Applicant: Lancaster University Business HOIL 29 / 423 ( 2006 .01 ) Enterprises Limited , Lancashire (GB ) 2 ) U . S . CI. CPC .. .. HOIL 29 /803 ( 2014 .09 ) ; HOIL 29 /66924 (72 ) Inventor : Manus Hayne, Lancashire (GB ) ( 2013 .01 ) ; HOIL 29 /66916 (2013 .01 ) ; HOIL 29 / 432 ( 2013 .01 ) ; GIIC 16 / 14 ( 2013 . 01 ) ; (21 ) Appl. No. : 15 /521 , 208 HOIL 21/ 28273 ( 2013 .01 ) ; GIIC 16 / 28 (22 ) PCT Filed : Oct. 23 , 2015 ( 2013 .01 ) ; HOIL 29/ 42324 ( 2013 .01 ) ( 57 ) ABSTRACT ( 86 ) PCT No. : PCT/ GB2015 / 053191 A memory cell for storing one or more bits of information $ 371 ( c ) ( 1 ) , has a control gate , a source terminal and a drain terminal. A ( 2 ) Date : Apr. 21, 2017 semiconductor substrate is located between the source and drain terminals , and a floating gate is disposed between the ( 30 ) Foreign Application Priority Data control gate and the semiconductor substrate . The floating gate is electrically isolated from the control gate by a charge Oct. 23, 2014 (GB ) .. .. .. 1418888 . 2 trapping barrier, and is electrically isolated from the semi conductor substrate by a charge blocking barrier . At least Publication Classification one of the charge trapping barrier and the charge blocking (51 ) Int . CI. barrier contains a III- V semiconductor material . The charge HOIL 29 /80 ( 2006 .01 ) trapping barrier is adapted to enable the selective passage of HOIL 29 /43 ( 2006 . 01 ) charge carriers between the control gate and the floating HOIL 21/ 28 ( 2006 .01 ) gate , in use , to modify the one or more bits of information GIIC 16 / 28 ( 2006 . 01 ) stored by the memory cell. 24 6000 op de Hos * 1 porlo Patent Application Publication Dec . 7 , 2017 Sheet 1 of 6 US 2017 / 0352767 A1 Figure 1 wwwwwww wwwwwwwwwwww 24 26 1 0600 NORMAN X 150 5008 Wood ith w woon 20 Patent Application Publication Dec . 7 , 2017 Sheet 2 of 6 US 2017 / 0352767 A1 FigureFigurx 2 W * 24 20 440 XXX * * * CHORONARINChorong X soos nogo google 2006 Patent Application Publication Dec . 7 , 2017 Sheet 3 of 6 US 2017 / 0352767 A1 Figure 3 30 k * * * , * , * , * , * , * , * , * , * ,* , * , * * * * * , * , * , * , * , * a # * # # # * ooooooooooo00oooooooooo # ???????? # * # 00000000000000000000000000000000000000000000000 * # * ooooooooooooooooooooooooooooo # # # * # # * # # # # * # wwwwwwwwwwwww 00000000000000000000000000000000oooooooo0000000000000000000000000000000000000000000000000000000 * oooooooooooooooooooooooooooooooooo # * # # KOSOANOVI # www oooooooooooooooooooooooooo # . * . * . * . * . * . * . * . * . * . * . * . * . * . * . * www ooooo # # wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww000000000000000000000000000000000000000 Opocs Patent Application Publication Dec . 7 , 2017 Sheet 4 of 6 US 2017 / 0352767 A1 Figurewi 4 wwwwww wwwwwwww ! w ww w - + inna + V wwwwwwwwwwwwwwwwwwwwwwwwwww w errrrrrrrrrrr KOJOB wwwwwwww wwwwwwwwww wwwwwwwwwwwwwwwwwwww wwwwwwwwwwwwww ?momen ww + WWW pamannannawaanzaaaannnnnnnnnaaagawannnnnnnnnnnnnnnnnnnnnnnnn 20 Displacsment (nm ) Figure 5 00000 0 0000000000000000 febrer wwwwwwwwwwwwwwwwwwwwwwww wowy e 7777777777777777777777777 Energy(@V) 5c 5 $ wernerennnnnnn momentwemo , i quererquyuyuyundurdu wwwins? isimine ni 8 hmmmmmmmmm wiwiwimminen Werderderderderd Jauwgelosia) uu ( Patent Application Publication Dec . 7 , 2017 Sheet 5 of 6 US 2017 / 0352767 A1 Figure 6 de ; ; 33 LUUvomoun Horoosoles* Harcamage oi probaasbydessäy y sumption mona ? ?????????• ? : ; :? ?????????? an www diea Percentageofprobabilitydensityfunction suapAungegold momentin ??????????????????????????????????????????????????????????????????????????????? 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(O)Xh3B mempercent er V . olen ????????? mmmmmmm ?????? * * ER wwwwwwwwwwwwwwwwamen busmoment 7a 0 1 komandante d wujuawajeldso Patent Application Publication Dec . 7 , 2017 Sheet 6 of 6 US 2017 / 0352767 A1 Figure22 . 8 wwwwwwwwwwwwwwwwwwwwwwwwwwwwwwww ** * * roosoudy censity function morcentage of prodaoutty onsity function hoe mmmmm VC Sinceur Probabilitydensityfunction(nm) wantummannahamwinamakanminnanland in wwwwwwww wimmoinnin uonounsalsuapAilqeqoidjoabeju2018d s womitmentwmiminimitat wwwwwwww wmowhomontown.common KWKWKWKWKWWwwwwwwwwwwww w han hometo this - - m . dr m way more o n . - - - - - - - - - - - - - - - - wwwwww- wwwwwwwwwwwwwwwwwwwww-wwwwwwwwww- wwwwww wwwwwwwwwwwwwwwwww wwwwwwwwww 0 -30 20 . 01 Displacement (nm ) US 2017 /0352767 A1 Dec. 7 , 2017 ELECTRONIC MEMORY DEVICES be held within the floating gate for extremely long periods of time without the risk of charge being removed from the CROSS REFERENCE TO RELATED floating gate . Thus, flash memory is a non - volatile form of APPLICATION memory , which allows for robust storage of data . [0001 ] The present application claims priority to Great [0008 ] Flash memory typically makes use of one of two Britain Patent Application No . 1418888 . 2 , filed Oct. 23 , mechanisms for the transfer of charge between the channel 2014 , incorporated herein its entirety . and the floating gate , namely Fowler -Nordheim tunnelling and hot - carrier injection (HCI ) . TECHNICAL FIELD [0009 ] Fowler- Nordheim tunnelling is a quantum mechanical effect relying on the tunnelling of electrons [0002 ] The present invention relates to electronic memory through a potential barrier . The probability of an electron devices , and in particular to electronic memory devices that passing through a barrier is greater for barriers of a smaller utilise floating gates to store charge . width , and thus , in order to facilitate the transfer of electrons between the channel and the floating gate , it is desirable to BACKGROUND have as thin a layer of oxide as possible . 10003 ] In the modern era , society is becoming ever more [00101 This , however, contradicts the requirement for non dependent on access to , and the manipulation and storage of, volatility , which requires that the oxide layer is thick enough increasingly vast amounts of data , at ever increasing speeds . to prevent charge from leaking from the floating gate to the Indeed , the ability to access large amounts of robustly stored channel, and vice versa . The increased thickness that is data at a high speed is vital in many industries, as well as necessary for non - volatility thus results in a lower probabil highly desirable for individuals when , for example , access ity of electrons being transferred between the channel and ing the internet and the like . Access to information can the floating gate , thereby increasing write and erase times . promote freedom of choice , improve efficiency , drive inno [ 0011 ] Hot - carrier injection relies on the application of a vation and economic development , and may overall lead to voltage between the source and drain , which increases the an improved quality of life . kinetic energy of electrons in the channel such that they are [0004 ] Memory devices are typically semiconductor able to pass through the oxide layer and into the floating based , integrated circuits for use by computers or other channel . However , this requires a high voltage to be applied , electronic devices . There are many different types of which may in turn create a high electric field through the memory, including random - access memory (RAM ) , read structure . Furthermore , increased voltages may result in only memory (ROM ) , non - volatile floating gate NOR / electrons having increased kinetic energy to such a degree NAND flash memory , and dynamic random -access memory that, when electrons collide with the oxide layer , degradation (DRAM ) . of the oxide layer may occur , thereby limiting the number of [0005 ] Flash memory is a semiconductor device that uti times that electrons may be transferred ( ie data may be lises an electrically isolated floating gate within which written and erased ) from the channel to the floating gate . charge is selectively stored . A conventional flash memory [0012 ] Various alternative methods to conventional flash cell comprises a semiconductor substrate (usually silicon ) , memory have been proposed , for example the production of which is doped to form separated source and drain terminals . nitride trapping layers in SONOS or TANOS devices, yet A control gate terminal is also provided , with an electrically none of these methods have been able to combine long term isolated floating gate disposed between the control gate and charge retention , ie non -volatility , with the fast write and /or the substrate . A voltage applied to the control gate that is erase times that are desirable . greater in magnitude than a threshold voltage enables cur [ 0013] There has now been devised a memory cell, rent flow along a conductive channel, also known as an method of manufacturing a memory cell , and a method of inversion layer, in the semiconductor substrate between the operating a memory cell , which overcome or substantially source and the drain terminals . [ 0006 ] If charge is located within the floating gate , then mitigate the aforementioned and / or other disadvantages the floating gate partially screens the control gate from the associated with the prior art. channel, thereby increasing the magnitude of the threshold voltage, ie the voltage at the control gate
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