Automatic Gain Control in Burst Communications Systems

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tx/rx Automatic gain control in burst communications systems This simple and fast analog AGC for phase modulated burst signals improves threshold and facilitates accurate RSSI, bandwidth and noise figure measurements. ceive chain of a time-division multiple- but only during specific time slots By Pankaj Goyal access (TDMA) based point-to-multi- assigned by it using TDMA. The base point radio. Derivation of accurate re- station receives the signals in the form Editors note: Due to the complexity ceived signal strength indicator (RSSI) of modulated bursts sent by the differ-

and length of some of the formulas used from the control loop and the measure- ent remote stations at frequency f2 with by Mr. Goyal, they have been moved to ment methods for systematic evalua- a guard time Tg separating the bursts. the end of the article (page 56). tion of the receive chain performance Depending on the distance of a particu- are described. lar remote from the base, the propaga- his article presents a practical ap- The AGC circuit was implemented tion delay and the strength of the burst Tproach toward the design of a fast along with an L-band downconverter reaching the base varies from one automatic gain control (AGC) and dis- on the same printed circuit board remote to the other. There is a high cusses the design issues related to the (PCB). The module was tested in the probability of different remotes trans- circuit performance. The main points base station of a TDMA-based point-to- mitting in consecutive time slots and, addressed in this article include: power multi-point system where the gain–con- as a result, the slot timing and power control techniques and dynamic range, trolled IF at 32.768 MHz was fed to a control in uplink become major design basic design of analog feedback AGCs, digital quadrature phase shift keying issues. the effect of important control loop ele- (DQPSK) demodulator and perfor- — Timing slots in the uplink frame: ments on the response time, signal mance improvement was verified. When a remote is powered on, the spectrum and measurements. A feed- downlink is established first, and the back topology is simulated and the cir- The links remote synchronizes its timing clock to cuit behavior is explained with the In a typical TDMA based stationary that of the base station. As far as trans- help of graphs and tables. point–to–multipoint radio (see Figure mission is concerned, it is likely that a Though generic cases are discussed 1), the base station broadcasts on fre- burst transmitted by this remote will wherever possible, the article is mainly quency f1 to all the remotes. The remote interfere with the burst transmitted by based on the work done to design a stations demodulate continuously, but the other remotes. To avoid this clash, similar circuit for the base station re- each remote processes only the relevant auto-ranging is performed. the remote information transmits a predefined burst of short meant for it. duration during the signaling slot. The REMOTE All of the base station calculates the possible po- f /slot6 2 3 remote sta- sitioning of this uplink slot and tells tions transmit the remote to advance/delay its trans- f /slot3 f REMOTE 2 1 on the same mission accordingly. This process is 2 frequency f2 continued until the remote transmis- BASE toward the sion is adjusted to a required accuracy.

f1 base station, Although there can always be a finite f1

f /slot1 REMOTE 2 n

f1 I.F. IN G(s) I.F. OUT

f2/slot20 REMOTE VCA 1

Tg Tg

LOOP FILTER DETECTOR H(s)

SLOT n+1 SLOT n SLOT n+2

Figure 1. Uplink and downlink block diagram. Figure 2. A feedback AGC circuit.

34 www.rfdesign.com February 2000 error in this timing, the guard time Tg Implementing amplitude control degradation in the uplink of this partic- prevents any transmission clash in the — Power control at the remote: When ular remote. By ensuring that the re- uplink. the dynamic range requirement is high, mote transmitter gain is slightly higher — Power control and dynamic range: uplink power control becomes more than that determined by the RSSI, a Irrespective of the modulation scheme cumbersome because any control reasonable reduction in the dynamic used, some sort of amplitude control is system would require a finite time to range of the base receiver can be needed over the uplink bursts at the change the gain value and settle within achieved. base receiver. This practice ensures a desired accuracy. Transmit power In a closed loop power control that a constant level can be fed to the control at the remote can aid to a large method, the base detects the power in demodulator to keep it functioning at extent in reducing the dynamic range the uplink of each remote and instructs its design point. For example, a phase requirement of base receiver. the remote station to adjust its trans- locked loop (PLL) based FSK demodu- The downlink signal is received con- mitter power accordingly. Although lator can misbehave [1] because the tinuously by all the remotes. The RSSI this method is certainly more accurate phase detector output and, hence, the (a DC reference voltage) generated by than open loop power control, the re- operating point of the loop may shift as the remote receiver can be easily ma- duction in dynamic range resulting at the input signal amplitude varies. nipulated to control the gain of remote the base receiver may not be worth the Many demodulator circuits use ADCs transmitter. This function is called complexity of implementation. to digitize the down-converted signal open loop power control. It assumes the Moreover, the downlink for each re- and then perform demodulation in the uplink and downlink path loss and mote station needs to have additional digital domain. Any excessive power fading to be identical. This technique is power control bits, which will reduce level variation at the ADC input can not very accurate, as is the case with the system efficiency. cause serious degradation in receiver any open loop control system. If the — Power control at the base: performance [2]. transmitter power is less than re- Whether uplink power control is used quired, there can be a serious threshold at the remote transmitters or not, it is a “must” at the base receiver. A limiter or an AGC circuit can be used for keeping the IF amplitude at the demod- VCA ulator’s design point (A limiter is generally an amplifier driven in satura- I.F. OUT tion.) Its response is as instantaneous as that of other IF amplifiers. However, the nonlinear nature of the limiter dis- POWER torts the signal waveform. This distor- I.F. IN SPLITTER AND DELAY tion is seen as spectral spreading, in- COMPENSATOR termodulation products and AM/PM conversion. The out-of-band components can be filtered out, but there is no way of removing the in-band distor- tion. Although a limiter can perform DETECTOR LOOP FILTER well in FM/FSK systems, a linear amplification is highly desirable in the Figure 3. A feedforward AGC circuit. systems employing QPSK and higher- order phase modulations. This goal can be achieved by an AGC circuit, where a voltage-controlled amplifier (VCA) is I.F. OUT used and its gain is varied depending on the strength of the received signal. I.F. IN Thus, only the required amount of gain is given to the signal and saturation is C(s) avoided. The behavior of basic elements of AGC may be nonlinear, but the R(s) + signal amplification is, nevertheless, DETECTOR LOOP FILTER linear. A considerable amount of litera- ture has been published about AGC circuits by several authors. [3], [4], [5], [6], [7].

AGC techniques Figure 2 shows a feedback AGC, the H(s)=1 most commonly used method of amplitude control. The signal is passed through a VCA, detected, filtered and Figure 4. Linearized model of Figure 2. then fed back to the VCA in a manner

36 www.rfdesign.com February 2000 so as to adjust its gain to remove un- The uplink slot allocation for remotes is complexity of the other techniques wanted time variations in the input done by the base and it knows which discussed earlier. signal envelope. Delay introduced by remote will transmit next. It can then each element in the control loop adds apply the required control voltage to The design up and determines overall delay in cir- the VCA just before the burst arrives at Control theory analysis cannot be di- cuit response. Thus, a feedback AGC is base receiver. In a stationary TDMA rectly applied to the AGC shown in inherently slow. environment, the fade depth is not se- Figure 2, where the input is a modu- A feed-forward AGC (see Figure 3) vere and the frequency of signal fading lated IF and the control voltage is a has a faster response because the is not high compared to the frame time. DC signal. It is not possible to define signal detection and gain control are So, for a particular remote/base uplink, the error signal simply as the differ- parallel. The incoming signal is split the probability of the received power ence of these two. Thus, a linearized into two paths; one goes to the VCA variation from one frame to the other is model is used as shown in Figure 4. and the other to a detector. The de- small. This is a feedback correction The feedback transfer function is unity tector is designed to have a response method where the delay between the in this case. that ensures the VCA gets the required detection and correction depends on Strictly speaking, feedback control control voltage and gives a gain exactly system dynamics such as how fre- system design is a recursive process of as required by the input IF amplitude. quently a remote transmits, frame mathematical calculations, Basically it The transmission delays of these two length, etc. A small amount of instanta- involves four easy steps. [8] parallel paths are equalized by intro- neous feedback is needed to eliminate 1.) Write the closed-loop transfer ducing an extra delay in one of them as the amplitude error caused by this function for an acceptable, initially required. Being an open–loop control delay. The dynamic range of this feed- chosen block diagram: system, this method has limited accu- back circuit, however, is small. Toward racy. The output varies with the input, the end of each remote transmission, Cs() Gs() but over a relatively small range. The the corrected value is updated in the = Rs() 1 + GsHs() () pattern of this variation cannot be de- respective memory location. fined in a simple manner because the This technique is superior to the characteristics of detector and VCA do others in the sense that the approxi- where C(s) is output, R(s) is input, G(s) not remain constant over the entire dy- mate value of control voltage is known is open loop transfer function and H(s) namic range. The VCA gain, detector before the burst actually arrives and is, is feedback transfer function. Here, gain and other circuit parameters also therefore, very fast. Because no remote H(s) is unity and the feedback elements show some variation, however small, transmits during the guard band, other are included in G(s). over the operating temperature range techniques have to perform amplitude also. Among the best available correction over a larger range, which So: high–performance ICs is a linear V/dB can only be done after the burst arrives Cs() Gs() detector that was used along with a at base. = + linear dB/V, VCA. This configuration Thus, we see that amplitude con- Rs() 1 Gs() (1) showed an error of the order of 4 dB trol problems can be solved one way over a dynamic range of 40 dB. In or the other. Because different cir- 2.) Define a deterministic test signal some cases, the demodulator may tol- cuits may suit different situations, a R(s). A step function is used to mathe- erate this variation in the input signal rule of thumb generally never applies matically describe the AGC’s quickness level. Otherwise, a small amount of in a communication system design. to respond to an amplitude step change feedback can be used to correct this Whatever may be the method adopt- at the input. error in the output level. ed for amplitude control, a feedback Let the input step amplitude be: AGC is inevitable for maintaining An adaptive gain the output at an exact IF level. And, r(t)=A control technique if it is possible to sacrifice a bit or The base receiver can maintain a two in the beginning of the burst, a Then: record of the RSSI voltage for each up- simple, but fast, feedback AGC alone A link slot and can store it in memory. may be able to do the job without the Rs()= s (2)

G(s) 3.) Find c(t) by taking the inverse Laplace transform of C(s). c(t) explains the time domain behavior of control C(s) R(s) H (s) LPF HLD(s) HVCA(s) KVCA KDET loop. 4.) Calculate the steady state error,

ess, by applying final value theorem to error signal E(s). This is a measure of accuracy with which the control-loop is H(s)=1 able to correct variations in the input signal level (see equation 3, page 56). Following these steps, it is possible to Figure 5. A modified block diagram of the circuit elements for response time limitation analysis. optimize the overall response of con-

38 www.rfdesign.com February 2000 trol loop by selecting appropriate com- times, the bandwidth of the loop filter ponents. has to be high enough. A carefully Figure 5 describes a modified block chosen zero in the filter transfer func- diagram that takes into account the re- tion improves stability of the control sponse time limitations of circuit ele- loop while ensuring the required loop ments. The open-loop transfer function bandwidth. The loop filter follows the is given in equation 4 (see page 56). detector and thus limits the detector Further, equation 4 terms are defined performance at threshold if noise per- as follows: formance of op-amp is not good. The open loop transfer function of

HLPF(s) is the transfer function of the the op-amp must be considered when loop filter. the response time of loop is critical.

HLD(s) is the transfer function of lead The DC gain of the op-amp sets a network. limit on the value of HLPF(s) at s=0, HVCA(s) models the VCA’s control inter- and bandwidth of op-amp sets a limit face. on the filter bandwidth. Thus, in this

KVCA is the VCA gain, indicating the type of application, a low-noise op- gain change per unit variation in the amp with high gain-bandwidth is control voltage. needed. Sometimes, the bandwidth

KDET is the detector gain, indicating the limitations of the op-amp can be posi- voltage change per unit variation in tively utilized to reject high frequency input signal power. noise from the detector.

The loop filter Lead compensation Numerous configurations are pos- The op-amps in active loop filters sible for a loop filter design. These have an output voltage swing much range from a simple RC lowpass section higher than the control voltage range of to complex active filters. Active filters VCAs. In some cases, it may be re- give gain, which helps to reduce the quired to limit the VCA control voltage steady state error. The transfer func- within the specified range. One way to tion of op-amp integrator shown in do this is to add a resistor in parallel Figure 6a is: with the feedback RC arm of loop filter. But this will also reduce the DC gain of integrator resulting in steady state sR21 C +1 HsLPF()= error that can be verified by replacing 11 sR C HLPF(s) in equation (7). Another way is to use a resistor divider network at the When the input signal amplitude integrator output. This practice also re- changes, the detector identifies it and duces the loop gain, subsequently in- the integrator output ramps up/down, creasing the response time. For clarifi- searches and settles at the best point cation, a lead network’s function is on the control voltage axis where the shown in Figure 7. It is: VCA can give a desired gain to correct the output signal amplitude. This sC23 R +1 process lasts for a small fraction of HsLD()= + time determined by transient re- sC23 R p sponse of c(t). For very small response

R2 C1 C2

R1 Vi Vo Vo Vi R3

R4 R1 Vi Vo

Figure 6a, b. Transfer functions of the op-amp Figure 7. A lead network for limiting the control integrator. range.

42 February 2000 Where: FKTBZS trol voltage (control/modulation bandwidth) becomes a limiting factor. Many N (6) data sheets specify the VCA response R3 p =+1 in detail. Sometimes this information is R4 where: not readily available, particularly if a multiplier or a balanced mixer is used

The capacitor C2 effectively passes F = noise figure for gain control. It is important to de- the filtered step signals coming from K = Boltzmann’s constant. termine the response time of the VCA. the detector, particularly at the begin- T = Temperature in Kelvin For more precise analysis, HVCA(s) ning of an uplink burst, and reduces B = IF bandwidth should be measured, which sets a limit the delay caused by resistors R3 and R4. Z = System impedance on the quickness of how a loop responds S/N = Required signal-to-noise ratio for to a step change. It can be measured The VCA specified quality of demodulated experimentally as shown in Figure 8. As the heart of an AGC circuit. the output. Let a(t) and b(t) be the IF input and VCA must support the required gain The combination of a high-attenua- output respectively, and c(t) is the con- range at the desired IF frequency with tion stage like a surface acoustic wave trol input to the VCA. The control in- sufficient bandwidth. The VCA can be (SAW) filter and a high-noise figure terface will generally have a low-pass either a voltage-controlled amplifier or VCA can cause serious degradation in characteristic and c’(t) is assumed to be a voltage-controlled attenuator. overall noise figure and, hence, receiver controlling the gain. Let: Voltage-controlled amplifiers are more sensitivity. ω advantageous in the sense that the The noise figure of commonly avail- a(t) = Ac sin( ct) , ω noise figure of the chain is less. able fixed IF amplifiers is typically 3 to c(t) = Am sin( mt), ω π Moreover, it is better to give only the 4 dB. Noise figures of VCAs can be typi- c = 2 fc , ω π required gain to the input signal rather cally 5 dB to 10 dB. The lowest noise m = 2 fm , than first amplifying it fully, and then figure is obtained only at maximum π = 22/7 attenuating it as the incoming signal gain (or minimum attenuation). level goes high. This lowers the noise Because the input signal level is very a(t) and c(t) are sinusoids at IF and figure and intercept point specifications low at threshold, it requires the noise the lower frequency, respectively. The of fixed amplifiers. For high dynamic figure of the chain to be the minimum output signal b(t) appears on the spec- range applications, VCAs like the possible. At higher input SNRs, it is trum analyzer as amplitude modula- KGF2441 and RF2607 are available clear from equation (6) that errorless tion of a(t) by c(t) and the frequency with a combination of gain and attenu- detection is possible even with a high components seen are: ation on the same gain vs. control VCA noise figure.

voltage curve. In continuous transmission systems, fc, fc + fm, fc - fm. The receiver sensitivity is directly re- control loops can be slow and the VCA

lated to the noise figure of the receive response to control voltage is generally As fm is increased to fm(max), keeping chain. The sensitivity, in volts, is given much faster than the control loop re- Am constant, the sidebands are seen as: sponse. But, in burst communication moving away from fc and towards systems, where the response time re- higher values of fm,. Thus, the level of quirement of the AGC is critical, the the sidebands are seen as decreasing

VCA response with respect to its con- gradually. fm(max) should be an order of

VCA

a(t) b(t)

CARRIER AM OUTPUT c/(t) CONTROL INTERFACE

c(t) MODULATING SIGNAL c/(t) H (s) = VCA c(t) POWER

FREQUENCY fc-fm max fc-fm fc fc+fm fc+fm max

Figure 8. Results of loop measurements. Figure 9. Measurement of control/modulation bandwidth, HVCA (s).

46 www.rfdesign.com February 2000 magnitude higher than the somewhat shorter delay. In short, this inverse of required response detector is faster than a diode detector time. It is important to men- because, along with carrier frequency, tion that the settling time is the noise components are also trans- specified for a percentage of lated to higher frequencies after the final value, and it will be squaring. This detector performs higher as the required preci- slightly better than a diode rectifier at sion increases. The curve in a low SNR. A lower noise floor of the

region fc to fc + fm(max) repre- multiplier also ensures better perfor- sents HVCA(s) and can be mance at the threshold. modeled by an RLC circuit for Asynchronous envelope detection is simulation purposes. If this not efficient at low SNRs, and the input measurement is carried out compression point of the VCAs is not carefully, the VCA behavior high (0 dBm being a typical figure). As can be approximated with a a result, it is difficult to implement a reasonable accuracy. high dynamic range AGC even when the VCA’s gain range is sufficient. The detector Synchronous or post-demodulation en- Figure 10a. Loop control voltage vs. modulator switch control The simplest envelope de- velope detection is a solution, but the voltage. tector is a half-wave diode circuit is complex and loop delay sets a rectifier. Schottky diodes lower limit on the response time. with sensitivities as good as Taking a look at the closed loop transfer –40 dBm are readily avail- function of the detector in figure 5 able. Some of them can give yields formula (7) (see page 56). a DC voltage on the order of To achieve a 65 dB dynamic range 100 mV at an input power with a fast response requires a fast level of –10 dBm, even in VCA. Among the fast VCAs available, the absence of biasing. To one with a gain range of 40 dB for 1 V filter out the AC compo- variation in its differential control nents, an R-C filter is used voltage was selected. A cascade of two at the output. This intro- devices with a parallel gain control en- duces a finite time delay. sures a much wider control bandwidth. This diode detector con- The loop filter op-amp is chosen to op- ducts only during half of the erate on +5 V supply and has a +4 V cycle time and, thus presents output swing. The lead network resis-

a varying impedance at its tors R3 and R4 were chosen to be of input. This can affect the equal value, limiting the swing to +2 V. main line return loss, particu- The permitted common mode control larly, when a high interme- voltage range of VCA is between –1.2 V diate frequency is used. A to +2 V by keeping the negative control

Figure 10b. Loop control voltage vs. modulator switch control buffer at the diode input may terminal Vn within 0 V and +1 V voltage–driven at higher levels. be a viable solution. This de- (Flexibility is kept for RSSI tuning as tection is asynchronous, and described later.) The loop control its performance degrades at voltage is applied to the positive control low SNRs. This leads to am- terminal Vp. Now the transfer function plitude error in the output of lead network becomes: level toward threshold.

Another asynchronous de- 1 + sC23 R tection method is the use of a HsLD()= 2 + sC23 R squaring circuit. Several (8) high-speed multipliers are available with high input im- The modulation bandwidth was mea- pedance and high operating sured for the cascade of two VCAs as frequency range. The high shown in Figure 9. The response was input impedance does not approximated as: load the main line. The output consists of DC equiva- = 1 lent of the input power and HsVCA() 1 + sRvv C AC components at around twice the IF frequency. In this case-filtering can be easily Using equations (5), (8) and (9) in equa- done with a high cut-off low- tion (7) yields equation (10) (see page Figure 10c. Loop control voltage vs. modulator switch control pass filter (LPF), which has a 56). voltage–near threshold.

50 www.rfdesign.com February 2000 One way to analyze c(t) is to reduce to the VCA, it is important to compare output with less error over a wider the right-hand side by partial fractions it with a reference voltage. This deter- input range, the useful range with and then take the inverse Laplace mines the direction in which correction short settling times is limited. transform. Another way is to simulate is to be applied and the steady state the circuit. output level of the AGC circuit. This Noise in the control loop A block level simulation can be done function can be incorporated along with The noise can be caused by ripples in for this closed-loop transfer function the integrator circuit. A reference the detector output, IF leakage and

using Eesoft-Omnisys. By substituting voltage, VREF can be applied to the non- other active components. Any DC-to- G(s) from equation (4) in equation (3), inverting input of op-amp. The transfer DC converters in the vicinity can also the steady state error is shown in equa- function of the circuit is found to be: induce considerable noise. Any noise on tion (11) on page 56. It can be seen that control voltage can result in unwanted

steady state error reduces to zero Vo 1 + sC12 R amplitude modulation of IF high gain mainly because of the pole at s=0 in =−()VVREF I+ V REF VCAs, which are more sensitive to con- Vi sC11 R HLPF(s). If the loop filter shown in (13) trol voltage noise because a small Figure (6a) is replaced by the one change in control voltage can alter the shown in Figure (6b) then: In this case, that, for the loop to work, gain significantly. As seen in the

VI and VREF must be of the same po- process of measuring HVCA(s), the + larity. modulation index reduces for higher = 1 sC12 R HsLPF() modulating frequencies. This property 1 ++sR()121 R C Loop gain, response time helps in filtering out the detector noise and dynamic range (provided that the IF is sufficiently No pole at the origin now, and the Transient analysis of the closed loop high). A squaring detector output has steady state error is shown in equation transfer function shows that the set- AC components at twice the IF fre- (12) on page 56. tling time is less when loop gain is suf- quency, which further improves the This shows that the steady state ficiently high. In this circuit, the noise rejection. High frequency noise × error in the output varies with input product KVCA KDET is not a constant results in spurii that lie outside the IF step amplitude. Thus with the varying and varies over the dynamic range. bandwidth and can be filtered out. input levels, the AGC output will also This is because the VCA gain (dB/V) More prominent is the effect of low fre- vary but over a small range. From remains constant throughout its dy- quency noise seen as spurii within the equation (12) it is clear that in the ab- namic range (linear in dB), while the IF bandwidth. Because low-pass fil- sence of a pole at the origin, the error detector output expressed in V/dB is tering of control voltage makes the loop can only be minimized and not elimi- not a constant over the input range of slow, extra care should be taken for nated, and only by making the loop detector. This manifests itself as a power supply filtering and the PCB gain high. variation in loop gain and, conse- layout, ensuring a proper shielding of quently, response time over the dy- the control line. The comparator namic range. As a result, even though Based on the above considerations, Before applying the control voltage the circuit can maintain a constant the devices selected were: 1.) A four-quadrant active multiplier with a fast settling time of around 20 ns for 0.1% full-scale voltage and an adder port to introduce DC offset. Positive detection is implemented by 3.4 squaring the IF. 2.) An op-amp with a gain-bandwidth of 600 MHz, input voltage and current noise of 2 nV/√Hz and 2.9 1.5 pA/√Hz, respectively, and a settling time of 65 ns to 0.1% of full scale value when operated from +5 V supply. 3) A VCA with a high-impedance dif- 2.4 ferential control interface.

RSSI VOLTAGE (volts) Vn = 0.540V The received signal spectrum Vn = 0.639V The burst signal spectrum consists of 1.9 the following components. Vn = 0.702V 1.) Quadrature phase-shift keying modulation (intelligence). 2.) Amplitude shift-keying (ASK) 1.4 -94 -86 -78 -70 -62 -54 -46 -38 modulation due to burst mode switching at the remote transmitters. The spec- I/P POWER LEVEL (dBm) trum at the base receiver looks like a multilevel ASK modulation of the actual QPSK spectrum because of random sep- Figure 11. RSSI tuning for three different settings of Vn.

52 www.rfdesign.com February 2000 RF i/p RF o/p tion systems, the RSSI is generally (dBm) (dBm) sampled in the middle of an uplink time slot after the loop control voltage has settled to its final value. -98 4.17 While tapping the AGC loop control -97 4.33 voltage, care should be taken not to dis- turb the normal functioning of the con- -96 4.33 trol loop. In this circuit, a non-inverting -95 4.50 op-amp buffer was used for the pur- -94 4.67 pose. The response time of this op-amp determines how fast the RSSI informa- -93 4.67 tion becomes available. -92 4.67 The downconverter gain can vary -91 4.83 from piece to piece by 1 to 2 dB, which results in a shift in the RSSI curve. The ~~use of VCA with a differential control -74 5.00 helps to tune out this offset. This cir- ~~cuit used only one terminal (Vp) of dif- Figure 12a. IF bandwidth measured with control loop enabled. -30 5.00 ferential control interface for control ac- tion, while the other (Vn) was tied to a DC voltage set by a potentiometer. The Table 1. RSSI tuning is shown in Figure 11 for

different settings of Vn.

served by introducing a vari- Noise figure and IF bandwidth able attenuation at the IF The parameters of the downcon- input to the AGC. It is seen in verter can be measured only when the that at higher levels, the gain AGC circuit is disabled and the VCA is very high and the control gain is at maximum. voltage overshoots before set- In most of the non-coherent AGC cir- tling (See Figure 10b.) cuits, as the threshold is approached Towards threshold, the re- output levels start reducing as the i/p sponse is rather damped (See level is reduced further. Up to a certain Figure 10c.) point, this reduction is not proportional and is mainly caused by the tracking Dynamic range and RSSI limitations of the circuit (detector) and The dynamic range mea- not because the loop is out of lock. surements are done with a Though this region of operation is of single-tone continuous signal. little use from the system’s point of This AGC circuit has been in- view, the control loop is still active and Figure 12b. IF bandwidth measured with control loop disabled. tegrated with an L–band VCA does not operate at its maximum downconverter. The varia- gain. arations of remotes from the base. So, tions in IF o/p level vs. RF i/p level is The noise power used by the test in- frequency domain measurement of re- given in Table 1. strument can be comparable to the ceived signal at the base, does not give Received signal strength indication threshold power and be well within the any qualitative information. is necessary for power control purposes AGC input range. Thus a correct noise 3.) Amplitude modulation by multi- such as monitoring the link health, and figure measurement of the chain re- path fading, the effect of which can be should be provided by the downcon- quires the feedback loop to be forcibly neglected here because of extremely verter. The signal level detection at IF disabled and the VCA be put in max- slow amplitude variations compared to is much easier than at RF. One method imum gain (or minimum attenuation in the correction speed of AGC. is to tap the main stream IF signal and case of a voltage controlled attenuator). These factors decide the measure- apply to an envelope detector. Another The bandwidth test is sometimes neces- ment methods to be used for testing the is to tap the loop control voltage if an sary to verify the downconverter/de- circuit. The response time measure- AGC is used. modulator interface. This single tone ment is done by feeding an IF burst. An advantage of the second method measurement is done by time-sweeping This step is done with the help of a is that the stabilized loop control the input RF frequency. switch similar to the one used in the re- voltage directly reflects the VCA char- Because the adjacent channel rejec- mote transmit chain. The control acteristics and is independent of the de- tion of the IF filter is typically around voltage of this switch and that of the tector. Thus, use of a linear (in dB) 40 dB. The AGC circuit, having a com- VCA are monitored together on the os- VCA gives an RSSI voltage that varies paratively wider bandwidth and a large cilloscope (See Figure 10a.) Variation of linearly with input signal variation (in dynamic range, will try to correct the response times over the operating dB) and can be easily processed by level variations in time domain. Hence, range (as explained earlier), can be ob- baseband circuits. In burst communica- the frequency response of IF filter will

54 www.rfdesign.com February 2000 s. R(s) A eLtLtsEsLtss ===..(). e(t) → = Lt. → (3) ()t→∞(s → 0) ()s 0 1 + Gs() s 0 1+G(s) (4) Gs()=•••• HLPF () s H LD () s H VCA () s K VCA () s K DET

Cs() HsHsHsKsKLPF()•• LD () VCA () • VCA () • DET = (7) Rs() 1 +=Gs() HLPF () s •••HsHLD() VCA () sK • VCA () sK • DET  A   ()11+ sC12 R()+ sC 23 R KVCA K DET  S  Cs()= (10) sC11 R()21+ sC 23 R()+ sRVCCsCRsCRKKV++()1112()+ 23 VCA DET

AsC11 R()21+ sC 23 R()+ sCVV R (t) = = (11) Lt.. e (t→∞ ) Lt ()s→0 0 sC11 R(()2 + sC 23 R ()111+ sCV R V++() sC12 R()+ sC 23 R K VCA K DET

()++ ()+ ()+ A121 sC11 R sC 12 R sC 23 R sCVV R = 2A (12) Lt.()s→0 ()12++sC11 R sC 12 R ()+ sC23 R()111+ sCV R V++() sC 12 R()+ sC 23 R K VCA K DET2 + KK VCA DET look flatter than it actually is. One so- Conclusion 5. John M. Khoury, “Fixed time con- lution is to reduce the input power to a An AGC circuit was designed for a stant AGC circuits,” IEEE Symposium level well below the threshold, where burst receiver and response time re- on Circuits and Systems, June 9-12, the control loop is out of lock. At such lated issues were stressed. This design 1997. low input levels, it is difficult to mea- is suitable for commercial applications 6. Eugenio J. Tacconi, Carlos F. sure the filter rejection, so disabling the based on TDMA or time-division duplex Christiansen, “A wide range and high loop is the solution (The VCA should (TDD) schemes that employ phase speed automatic gain control,” Particle give maximum gain.) modulation. Measurement procedures Accelerator Conference Proceedings, A correct noise figure and bandwidth for evaluating the performance of a Pages: 2139-2141, vol.3 measurement also requires that satu- feedback AGC were discussed. The dis- 7. David M. Badger, “Stability of ration of the final IF stages be avoided, cussion provides a deep insight into the AGC circuits containing peak detec- particularly when this type of testing is circuit dynamics and supports an effec- tors,” Consumer Electronics, IEEE required at the IF port. Devices with tive design of almost any type of feed- transactions, Aug.1992, vol. 3. Pages: sufficiently high intercept points should back AGC for communication systems. 377-383. be used in final IF amplifier stages. 8. Benjamin C. Kuo, “Automatic To switch to maximum gain mode, a Control Systems.”

–ve DC voltage, VTEST, of around 0.5 V is References : added to the loop through the adder 1. N.K. Abdulaziz, S.D. Marougi, port of the multiplier IC. When the loop “Effect of an AGC amplifier on the per- is disabled, the IF input signal should formance of a generalized PLL in the be kept small enough to protect the presence of a large interfering signal,”

final I.F stages. As long as |VTEST| IEEE Proceedings vol. 136, Pt. G. no. 4, >|VDET|, (where VDET is the detector August 1989. output voltage for a given IF signal 2. G.A. Gray, G.W. Zeoli, About the author level used for testing), the feedback loop “Quantization and saturation noise due Pankaj Goyal holds a B.E. degree remains disabled, the loop-filter op-amp to analog to digital conversion”, IEEE in Electronics and Communication remains in saturation at +ve rail and Trans. Aerospace and Electronic Engineering from R.E.C. Trichy and the VCA is at maximum gain. The noise Systems, vol. AES-12, Jan. 1971. works as a research engineer with C- figure of the downconverter was mea- 3. Bertran, E.; Palacin, J.M., DOT, a telecom technology center for sured to be less than 2.5 dB. The IF “Control theory applied to the design of the Government of India. He has sev- bandwidth measured with AGC enabled AGC circuits,” Electrotechnical eral years of experience working on and disabled is given in Figures 12a Conference Proceedings, 6th RF/IF control circuits, low-noise and 12b respectively. The measurement Mediterranean Published: 1991, Pages amplifiers and downconverters for error can be clearly observed. 66-70 vol. 1. microwave receivers. He can be con- The IF output level can be easily 4. L. Popken, W. Kriedte, “Statistical tacted at: 71/1, Sneha Complex,

varied by + 1 dB by tuning VREF input to description of non-coherent automatic Miller Road, Bangalore, India the loop filter without affecting the re- gain control,” Ng, C.S.; Yeo, T.S.; Yeo, 560052. Telephone +91 080-2253257; sponse time or any other circuit para- S.P. Singapore ICCS/ISITA ‘92. Pages: e-mail—[email protected] or meters. 133-136 vol. 1. [email protected].

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