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Lecture 17 or “I got a new laptop!” It’s so purdy Announcements

I am almost done with grades, Indie Bits ended up taking my entire weekend instead of just Thursday like I planned.

They will be up soon, I promise. More announcements

Final is April 30th and 4pm Review is April 28th (a week from today) Smash day was tomorrow, I need to move it though, project due and I won’t have time. Extra Credit Project

I will have it up tonight. I need to make sure that it works first…

For every correct answer you get 1 points on a test, if you get all 6 you get 10 points. Let’s start! The

The CPU is in charge of the following tasks: ● Basic arithmetic ● ● Control ● I/O CPU

The CPUs design and function have changed over the years, but it’s function hasn’t changed that much. 3 main parts to a CPU ● (ALU) ● (CU) ● Registers Arithmetic Logic Unit

A digital circuit that performs arithmetic and bitwise logical operations on integer binary numbers. Basic building block for floating point units (FPU). These perform floating point operations using multiple ALUs ALU ALU

A basic ALU has three parallel inputs ● Input A ● Input B ● Output Y Typically A, B, and Y are the same word size as the CPU ALU ALU

Opcode tells the ALU which operation to run. The size of this varies, and is determined by the amount of operations the ALU can do. If the ALU can perform 8 operations it will only need 3 bits ALU

Status signals go in and out of the ALU. The output status can be many things, such as the -out, zero (all bits in Y are zero), negative, overflow, etc. The input allows additional info to be sent to ALU. This is usually used for carry- in. Control Unit

The control unit directs operation of the processor. Basically it tells the parts of the what to do when it gets certain instructions. CU

Provides timing and control signals for the rest of the computer. Registers

Very fast memory Stores bits so that the system can read and write to all of them at the same time Operation of CPU

Fetch: Retrieve an instruction from program memory Decode: Instruction that was fetched is broken up into parts that other parts of the CPU can understand Execute: The decoded command is run Memory: Read or write data Write Back: Store result Subscalar CPU

Less than 1 instruction per second Originally looked like this: Instruction level Parallelism

Can run 1 of each operation per clock cycle. Looks like this: The previous...

The last 2 slides showed examples of pipelining.