Heterogeneous Integration Roadmap Update- INTEGRATED POWER ELECTRONICS (IPE) Technical Working Group

MOVING HETEROGENEOUS POWER INTEGRATION FORWARD

The IEEE Societies, and companies are sponsoring a new Roadmap focused on the critical packaging technologies that can maintain the pace of “More’s Law.” cpmt.ieee.org/technology/heterogeneous-integration-roadmap.html www.semi.org/en/heterogeneous-integration-roadmap

Excerpts from presentation at IEEE Heterogeneous Integration Roadmap Symposium ECTC 2018

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Integrated Power Electronics (IPE)

Co-Chair: Prof Douglas C Hopkins, Ph.D. North Carolina State University

Dr Hopkins is engaged in research involving very high frequency, high density power electronics, organic-based circuits for power and energy systems, and true 3D electronic packaging.

Co-Chair: Prof Patrick McClusky, Ph.D. University of Maryland

Dr McClusky in engaged in research in high temperature and high power electronics packaging, materials, and reliability, and is General Chair of the 2018 3D-Power Electronics Integration and Manufacturing Symposium.

Heterogeneous Integration Roadmap 2 Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University PERSPECTIVE

Micro- Electronics Heterogeneous Power

Integration

Power Electronics

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Profound Philosophical Distinction Processing Information Processing Energy

“ETHEREAL” PROCESSING “PHYSICAL” PROCESSING Tremendous collaboration on Companies compete on the physical the physical requirements to “Energies”, i.e. electrical, mechanical, support competition in the thermal, chemical; in the forms of reliability, “Ethereal” world energy efficiency, size, weight, etc. HOW DO WE INTEGRATE POWER INTO THE NEW WORLD OF “SYSTEM IN PACKAGE” AND “HETEROGENEOUS INTEGRATION”?

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Evolution in Microelectronics Packaging

Courtesy of John Hunt ASE Group 19Sep’16

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Cell Phones Evolved…….

Consumers wanted smaller devices

Courtesy of John Hunt ASE Group 19Sep’16

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Advanced Packaging for Mobility

Drivers Small, Thin for mobile applications Low cost for Consumer Products Good Electrical performance Size Cost Low power Integration of Functionality Solutions Wafer Level Chip Scale Package Performance Fan Out Wafer Level Package Fan Out System in Package (SiP)

Courtesy of John Hunt ASE Group 19Sep’16

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Driver for Wafer Level Packages & Fanout

iPhone Evolution 3013 13

12 12 25

11 11 20

10 10 15

WLCSPs 9 9 Thickness (mm) Thickness Thickness (mm) Thickness 10 8 8

5 7 7

06 6 1 /2007 3GS /2009 4S /2011 5 /2012 5S /2013 6 /2014 6+ /2014 iPhone Model/year WLPsThicknessThickness

iPhone 1 iPhone 3GS iPhone 4S iPhone 5 iPhone 5S iPhone 6 iPhone 6 Plus 2007 2009 2011 2013 2013 2014 2014 2 WLPs 4 WLPs 7 WLPs 11+ WLPs 22 WLPs 26+ WLPs 26+ WLPs

Shown to scale

Source: TechSearch International, Inc., adapted from TPSS. Courtesy of John Hunt ASE Group 19Sep’16

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Revolution in Packaging Packaging Technologies ~ 2000 0 £ Mechanical Processes £ + Chemical Processes l Grinding l Wafer Processing l l Sawing Sputtering l Plating l Die Bonding l Etching l Wire Bonding l Photo Processing l Molding u Photoresists l Singulation u Polymers l Plasma

Courtesy of John Hunt ASE Group 19Sep’16

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University State of Art in Power Planar 2D power packaging technology Flex circuit structure POL package, SKiN package, etc. Embedded structure AT&S GaNPX, PCB embedded, etc. Sandwiched structure Planar Bond All package, etc. ABB Stacked DBC [1] Planar Bond All[8]

GaNPX package[7] Power Overlay SKiN module [5] PCB embedded module[6] package [4]

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University State of Art in Power 3D power packaging technology Device level Quilt dies, stacked / vertical dies Module level 3D CSP, Power chip on chip, 3D power circuit . Quilt packaging[9]

Inner post

SiC MOSFET & Diodes

3D Power module[10] Orthogonal DBC Substrate

Stacked device[13] 3D CSP module[12] Excerpt from Dissertation of Dr Haotao Key, 2018 Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University But, Power Needs a Change

And needs to take more cues from microelectronics

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Limitation of level-0 packaging

Source: Mark Papermaster, AMD CTO. GSA Europe, April 6, 2017

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Limitation… Cost is raising for digital

Source: Mark Papermaster, AMD CTO. GSA Europe, April 6, 2017

“For the past 50 years, the cheapest and easiest way to increase complexity was to shrink the feature size and grow the wafer diameter.(That was he classic Moore’s Law) Now there is a tradeoff. We will do the things that are most economic for the capabilities we want. Some of those will keep us going with smaller and smaller feature sizes almost forever. But the most economical tradeoff is likely to be a combination of better system engineering, multi chip packaging, and a whole variety of other techniques to keep advancing the capabilities in the most cost effective way.” Wally Rhines, Chairman Mentor Graphics. Source: Semiconductor Engineering, Ed Sperling, April 20 2017 - - Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University DEFINITION Heterogeneous Integration The integration of separately manufactured components into a higher level assembly (SiP) that in the aggregate provides enhanced functionality and improved operating characteristics.

SiP through Heterogeneous Integration

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University SYSTEM in PACKAGE (SiP) through HI

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University DEFINITION Heterogeneous Integration of Power (HIP) HIP is defined as the integration of separately manufactured power electronic components and subsystems into higher-level assemblies (SiP, PCB/Substrate- embedded systems) that in the aggregate provide enhanced functionality and improved operating characteristics. Power passives High current Inductors Low profile passives Power distribution planes Advanced materials PMU Heat spreaders, heat sinks Active cooling systems Power semiconductors SiP through Heterogeneous EMI shielding Integration Unique design architectures

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University How Do We Integrate Heterogeneous Power ?

1 2 3 0 Power Distribution On-Chip Peripheral On-Chip Distributed uses SiP Pkg & Mfg Power Distribution Power Conversion Discrete Power is technologies being mapped uses “Component” Pkg uses “Component” Pkg & through the PSMA in to distribute power & Mfg technologies Mfg technologies their “Embedded from Discrete Power to create power to create distributed Component Study.” converters conversion at the power conversion within interface with the SiP the Component

Power Conv Conv Power Conv Power Conv Power Power Conv Power Conv Conv Power

Power Conv Not the HIR-IPE focus, but will benefit from our technologies

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Complimentary Technologies

HIP PSiP HIP SiP

Heat sink INDUCTOR

RE-DISTRIBUTION LAYER

SUBSTRATE Technology EXCHANGE 1mm SiP Substrate Discrete Power Integrated Power

Integration challenge will be in “planarization” of power

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University What has “Power” been looking at?

Heterogeneous Power Integration (HPI) has begun

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University The PSMA 2015 Tech Report (334 pp)

1. Embedding in PCBs &

Inorganic Substrates

2. High Temp Die-Attach & High-Lead Solder 3. Thermal Management TECHNOLOGY REPORT 4. Packaging Technologies Current Developments in 3D Packaging 5. Interposers With Focus on Embedded Substrate Technologies 6. Embedded Resistors PSMA 3D Power Packaging Phase II A Special Project of the 7. Embedded Capacitors PSMA Packaging Committee 8. Embedded Magnetics March 2015 9. Additive Manufacturing & Laser Fabrication www.psma.org

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University

The PSMA 2018 Tech Report

EXCERPT 3D Power Packaging with Focus on Embedded Components • 3D Power Packaging Technologies • Drivers and Trends • 3D Power Package Technologies with Focuses on Embedded Components • Low Power Packaging Technologies and Roadmap (0.1W-100 W) • Medium Power Packaging Technologies and Roadmap (100W-1kW) • High Power Packaging Technologies and Roadmap (1kW- 100 kW) Advanced Substrate Materials and Reliability Emerging Lead-Free High Temperature Die Attach Technologies

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University “Stacked Components”

TI's NexFET™ PowerStack

Innovations in “brick-type” power converters 3D Stacked Die Packaging (Amkor)

Stacking Quarter Bricks Courtesy of: www.psma.com, [email protected]

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Embedding Process, e.g. Shinko Electric

Courtesy of: www.psma.com, [email protected] Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University “Embedded (Active) Components Example of HERMES face-down technology Concept view of Crane Aerospace & with two embedded core FR-4 PCBs, Prepreg Electronics embedded components in fusion layers, and external components bonded Multi-Mix® assembly

MMX

DBC Heatsink

• Other embedding technologies in the industry ROHM/TDK module – Nanium's embedded wafer level package (eWLP) using the – Integrated Module Board (IMB) from Imbera "SEmiconductor – Amkor's Embedded Die/Passives in Substrate embedded in – SiPLIT from Siemens SUBstrate” (SESUB) – DrBlade from Infineon process – i2 Board®, p2 Pack® from Schweizer Courtesy of: www.psma.com, [email protected]

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Haswell processor w/ PCB-embedded inductors

Great product, but the inductor is a problem!

Processor Bott. View Power Density X’ X Power Package Saving substrate Inductors Core layer Processor Die Efficiency

Inductors in the Fsw up to 130MHz! package board Capacit ors Package Inductors are formed in board the package substrate Solder bumps Die Die top i5-4430 package side Courtesy of LTEC Corporation

Heterogeneous Integration Roadmap 26 Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Heterogeneous Integrated Stand-alone Power

C in Lout other passive Cout Cbyp 1mm components HIPS Silicon Driver Die GaAs FET Die SiP Driver Die heat & current

5.5mm Vin GaAs Vcc Die Cbyp Cin 5mm UFET1 PWM1 Cboot1 Vout GaAs Lout1 Source Die Sarda Technologies LFET1 PWM Driver ControllerControl Die Signals

UFET2 Cboot2

PWM2 GaAs Lout Die Cout Courtesy of LTEC LFET2 Corporation

Heterogeneous Integration Roadmap 27 Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University SEEKING YOU HELP

MOVING HETEROGENEOUS POWER INTEGRATION FORWARD

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University How Do We Integrate Heterogeneous Power ?

Power Conv Conv Power Conv Power Conv Power Power Conv Power Conv Conv Power

Power Conv Not the HIR-IPE focus, but will benefit from our technologies

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University Objectives of an IPE Working Group • Analyze the impact of current and future market drivers at 5, 10, and 15 years • Identify major challenges and barriers • Assess the status of manufacturing Infrastructure • Set project goals and time horizons

Part I “SiP POWER” Power Conv 1 PART-II “COMPONENT POWER” 2

• Identify SiP power distribution Conv • Identify interface metrics for SiP Power requirements to support COMPONENTs COMPONETs • Identify key enabling packaging Conv Power Power Conv Power • Identify key enabling packaging technologies and challenges common technologies and challenges to all COMPONENTs Power Conv

• Identify key enabling technologies and challenges • Efficiency: Reduced dynamic & conduction losses (WBG), fsw • Power density: Conductive, dynamic switching losses, fsw • Thermal management: Integrated/embedded cooling • Power integrity: Proximity, coupling effects, EMI • Materials: Improved thermomechanical properties * We hope each COMPONENT TWG will have a “Power Section” in their “Chapter” • Interconnect: Power delivery, decoupling and we will merge it into our ”Chapter” also.

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University “Component” TWGs are Impacted by HIP?

Integrated Photonics WLP (fan in and fan out) MEMS & Sensor integration HI for Specialized Applications RF and Analog Mixed Mobile Mat’ls & Emerging Res Mat’ls IoT and Wearable Interconnect Medical and Health Security Initiative Automotive Integration Processes High Performance Computing & Data Center

Join the HIR – IPE committee

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University HIR Technical Working Groups & Chairs Heterogeneous Integration Components Integration Processes • Single Chip and Multi Chip Packaging • SiP Rolf Archenbrenner (Fraunhofer IZM) • (including Substrates) William Chen (ASE), • 3D +2.5D Ravi.Mahajan (Intel), Raja Annette Teng (promex) Swaminathan (Intel) • Integrated Photonics Amr Helmy (U Toronto) & • WLP (fan in and fan out) Rozalia Bieca (DOW) WR Bottoms (3MTS) John Hunt (ASE) • Integrated Power Electronics Doug Hopkins HI for Specialized Applications (NCSU) & Louis Burgyan (Ltec) • Mobile (recruting chair) • MEMS & Sensor integration Shafi Saiyed (ADI) • IoT and Wearable R Lo (ITRI Taiwan) • RF and Analog Mixed Signal Herbert Bennett • Medical and Health Mark Poliks (BU) & Nanct (NIST Ret) Stoffel (GE) Cross Cutting topics • Automotive R Tummala (Georgia Tech) • Materials & Emerging Research Materials WR • High Performance Computing & Data Center Bottoms,(3MTS),MJ Yim (INTEL) Kanad Ghose (BU) • Emerging Research Devices A. Chen (SRC/IBM), • Aerospace & Defense Tim Lee (Boeing) & D Myya Meyyappan (NASA) Green (DARPA) • Interconnect Subramanian S. Iyer (UCLA) Design • Test Dave Armstrong (Advantest) • Co-Design & Simulation – Tools & Practice • Supply Chain Tom Salmon (SEMI) Andrew Kahng (USD) / C Bailey (Greewich) & A separate Security Initiative has been approved Xuejun Fan (Lamar) Scott List (SRC)

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University HIR Collaborates With Many Roadmaps Today HIR is committed to collaboration with other Roadmaps wherever possible

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University HETEROGENEOUS INTEGRATION ROADMAP Integrate Power Electronics – Technical Working Group Volunteers needed to provide PERSPECTIVE Integrated Electronics Heterogeneous Power Contact: Prof. Doug Hopkins [email protected] +1-919-513-5929

Integration

Power Electronics

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University HIR- Integrated Power Electronics Committee

Date:18Nov/17 NAME EMAIL AFFILIATION Douglas C Hopkins (Co-Chair) [email protected] NC State University (NCSU.edu) Patrick McClusky [email protected] University of Maryland Markondeya “Raj” Pulugurtha [email protected] Georgia Tech

Mark Johnson [email protected] University ofNottingham Mark Hoffmeyer (interim) Hoffmeyr@us.ibm.com IBM

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University WHERE DO WE START?

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University DELIVERABLE: Report Outline & Content Scope Executive Summary Difficult Challenges Top 10 for 5-year horizon Top 5 for 15-year horizon Top 10 for 25-year horizon for research areas Discussion of Key Technical Issues Background & Overview Challenges Requirements for key attributes over time (refer to tables with explanation in the text) Potential Solutions Technology Gaps and Research needs Supply chain needs (Materials, Processes, Equipment) Summary Acknowledgements, References, Bibliography, Definition of terms and Glossary

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University If you would like to join the HIR-IPE Committee, contact:

Prof. Douglas C Hopkins, Ph.D. North Carolina State University 1791 Varsity Drive, Suite 100 Raleigh, NC 27606-7571 Tele: 919-513-5929 [email protected]

Heterogeneous Integration Roadmap Technical Working Group – Integrated Power Electronics [email protected] North Carolina State University