University of Arkansas, Fayetteville ScholarWorks@UARK Electrical Engineering Undergraduate Honors Electrical Engineering Theses 5-2013 SPICE netlist generation for electrical parasitic modeling of multi-chip power module designs Peter Tucker University of Arkansas, Fayetteville Follow this and additional works at: http://scholarworks.uark.edu/eleguht Part of the Electrical and Electronics Commons, and the Electronic Devices and Semiconductor Manufacturing Commons Recommended Citation Tucker, Peter, "SPICE netlist generation for electrical parasitic modeling of multi-chip power module designs" (2013). Electrical Engineering Undergraduate Honors Theses. 4. http://scholarworks.uark.edu/eleguht/4 This Thesis is brought to you for free and open access by the Electrical Engineering at ScholarWorks@UARK. It has been accepted for inclusion in Electrical Engineering Undergraduate Honors Theses by an authorized administrator of ScholarWorks@UARK. For more information, please contact
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[email protected]. SPICE NETLIST GENERATION FOR ELECTRICAL PARASITIC MODELING OF MULTI-CHIP POWER MODULE DESIGNS SPICE NETLIST GENERATION FOR ELECTRICAL PARASITIC MODELING OF MULTI-CHIP POWER MODULE DESIGNS An Undergraduate Honors College Thesis in the Department of Electrical Engineering College of Engineering University of Arkansas Fayetteville, AR by Peter Nathaniel Tucker April 2013 ABSTRACT Multi-Chip Power Module (MCPM) designs are widely used in the area of power electronics to control multiple power semiconductor devices in a single package. The work described in this thesis is part of a larger ongoing project aimed at designing and implementing a computer aided drafting tool to assist in analysis and optimization of MCPM designs. This thesis work adds to the software tool the ability to export an electrical parasitic model of a power module layout into a SPICE format that can be run through an external SPICE circuit simulator.