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Famílias De Circuitos Lógicos

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Famílias De Circuitos Lógicos FAMÍLIAS DE CIRCUITOS LÓGICOS Famílias lógicas consistem de um conjunto de circuitos integrados implementados para cobrir um determinado grupo de funções lógicas que possuem características de fabricação e elétricas similares. O desenvolvimento das famílias lógicas é uma conseqüência da evolução das técnicas de fabricação e necessidades de aplicação (velocidade, potência, etc.). CLASSIFICAÇÃO PELO ELEMENTO CHAVEADOR: • Transistor Bipolar • Transistor MOS Tecnologias-Demantova 1 Transistor Bipolar: Tecnologias-Demantova 2 Transistor MOS: Tecnologias-Demantova 3 SUB FAMÍLIAS: • BIPOLAR: -DTL (Diode Transistor Logic, Lógica de Diodos e Transistores); -DCTL (Direct Coupled Transistor Logic, Lógica de Transistores diretamente acoplados); -RTL (Resistor Transistor Logic, Lógica de Transistores e Resistores); -RCTL (Resistor Capacitor Transistor Logic, RTL com Capacitores); -HTL (High Threshold Logic, Lógica de alto Limiar); -TTL (Transistor Transistor Logic, Lógica Transistor-transistor); -ECL (Emitter Coupled Logic, Lógica de Emissores Acoplados);. • MOS (Metal Oxide Semiconductor Logic, Lógica de MOSFETs): -pMOS (MOSFET canal P); -nMOS (MOSFET canal N); -CMOS (Complementary MOS Logic, Lógica MOS complementar) Tecnologias-Demantova 4 SUB FAMÍLIAS: • BICMOS: -É uma terceira tecnologia que ganha campo hoje em dia mesclando os dois elementos chaveadores em um mesmo componente. Tecnologias-Demantova 5 Volume x Tempo x Custo: Tecnologias-Demantova 6 PARÂMETROS ELÉTRICOS E NÍVEIS LÓGICOS: • IIH: corrente de entrada para nível alto; • IIL: corrente de entrada para nível baixo; • ioh: corrente de saída para nível alto; • IOL: corrente de saída para nível baixo; • VIH: tensão de entrada para nível alto; • VIL: tensão de entrada para nível baixo; • VOH: tensão de saída para nível alto; • VOL: tensão de saída para nível baixo; • TPD: tempo de propagação de uma transição da SAÍDA EM relação a entrada (TPHL, TPLH). Tecnologias-Demantova 7 PARÂMETROS ELÉTRICOS E NÍVEIS LÓGICOS: CONDIÇÕES DE COMPATIBILIDADE: VOH ≥ VIH; VOL ≤ VIL; IOH ≥ N.IIH; IOL ≥ N.IIL; Tecnologias-Demantova 8 IMUNIDADE À RUÍDO: Representa o maior grau de ruído que pode ser adicionado ao sinal lógico presente em uma interconexão de portas lógicas, sem que acarrete que um nível lógico fornecido na saída seja interpretado erroneamente na entrada em que está conectada. PARA A DETERMINAÇÃO DA IMUNIDADE AO RUÍDO, DEVE-SE CONSIDERAR O PIOR CASO, OU SEJA, O MENOR VALOR ENTRE (VOHMÍN - VIH MÍN ) E (VIL MÁX - VOLMÁX). Tecnologias-Demantova 9 CORRENTES DE ENTRADA E SAÍDA: DETERMINA COM CERTEZA A MÁXIMA CARGA QUE CADA PORTA PODE SUPORTAR RESPEITANDO SUAS CARACTERÍSTICAS DE IMUNIDADE A RUÍDO. SINAIS NEGATIVOS SIGNIFICAM CORRENTES SAINDO DA PORTA LÓGICA. FAN OUT: CORRESPONDE AO NÚMERO DE ENTRADAS PADRÃO QUE UMA SAÍDA CONSEGUE & EXCITAR COM GARANTIA. É UM NÚMERO ADIMENSIONAL. & & ex. TTL Standard & Tecnologias-Demantova 10 TEMPO DE PROPAGAÇÃO: tPLH – Tempo de atraso do estado lógico “0” para o “1”. tPHL – Tempo de atraso do estado lógico “1” para o “0”. PRINCIPAIS CAUSAS: • ATRASOS DE COMUTAÇÃO INTERNA • CAPACITÂNCIAS INTERNAS E PARASITAS • TEMPO DE RECOMBINAÇÃO DE PORTADORES Tecnologias-Demantova 11 FREQÜÊNCIA MÁXIMA DE OPERAÇÃO: É a máxima freqüência de um sinal aplicado a entrada de uma porta lógica sendo que esta ainda consegue comutar de maneira correta a sua saída: 1 fmax TPHL TPLH Tecnologias-Demantova 12 TEMPERATURAS DE CIRCUITOS INTEGRADOS: Faixa Militar -55 a +125 °C Operação Faixa Meio-Militar 0 a +100 °C ao ar livre Faixa Profissional 0 a +75 °C Faixa Industrial 15 a +55 °C Temperatura de armazenamento -65 a +150 °C Tecnologias-Demantova 13 TEMPERATURAS DE CIRCUITOS INTEGRADOS: Faixa Militar -55 a +125 °C Operação Faixa Meio-Militar 0 a +100 °C ao ar livre Faixa Profissional 0 a +75 °C Faixa Industrial 15 a +55 °C Temperatura de armazenamento -65 a +150 °C Normalmente o fabricante especifica a potência máxima de dissipação a uma dada temperatura (ex:110mw a 25°c) e um fator de decréscimo ( 1mw/°c). Tecnologias-Demantova 14 EXIGÊNCIAS DE ALIMENTAÇÃO: Em geral ICCH e ICCL têm valores diferentes, sendo a potência média consumida pelo integrado calculada como: PD Média ICCmédia VCC Tecnologias-Demantova 15 TIPOS DE ENCAPSULAMENTOS: Tecnologias-Demantova 16 A EVOLUÇÃO DAS FAMÍLIAS LÓGICAS: LÓGICA COM DIODOS (DIODE LOGIC): Tecnologias-Demantova 17 FAMÍLIA RTL (RESISTOR TRANSISTOR LOGIC): Vcc R R1 Z A B R2 -É de simples confecção e muito utilizada em componentes discretos. -É a primeira família considerada de tecnologia saturada. -Apresenta como limitações: baixa freqüência de corte devido aos resistores (5MHz). resistência de carga => „1‟ ideal é baixa. => „0‟ ideal é alta. -Resistência de entrada reduzem o fan-out para 5. -Uma derivação desta família é a RCTL Tecnologias-Demantova 18 FAMÍLIA DTL (DIODE TRANSISTOR LOGIC): Vcc Vcc R R D1 Z D3 & Vx A T1 Vd3 Vbe B D2 -É uma extensão da lógica com diodos. - Aumento da velocidade (baixa resistência em polarização direta). -Aumento de fan-out (alta resistência em polarização inversa). -Entrada em zero => diodo conduzindo => transistor cortado (Vx=VD1=VD2<(VD3+VBE). - Quando a=b=1, transistor saturado (saída igual a zero). - Pincipais características: bloco lógico básico ne, tempo de atraso da ordem de 30ns, fan-out 8, potência/bloco 10mW, imunidade ao ruído da ordem de 1,4V. Tecnologias-Demantova 19 FAMÍLIA HTL (HIGH THRESHOLD LOGIC): - Apresenta maior imunidade ao ruído. qualquer ruído precisa ter energia suficiente para polarizar o diodo zener e a junção base- emissor do transistor antes de causar alteração no estado da porta. - Fan-out típico igual a 10, consumo aproximado de 60 mW/bloco. apresenta o maior tempo de atraso entre as famílias de tecnologia bipolar. Tecnologias-Demantova 20 FAMÍLIA TTL (TRANSISTOR-TRANSISTOR LOGIC): - Derivada da família DTL. usa transistores multiemissores. - Vantagens: eliminação da rede de diodos e resistores de entrada, maior velocidade de comutação e maior facilidade de construção em escala integrada, tornando-se menor o custo por unidade. Tecnologias-Demantova 21 FAMÍLIA TTL (TRANSISTOR-TRANSISTOR LOGIC): Para a polarização de uma junção base-emissor, precisa-se de um Vbe=0,6V, então existirá uma corrente de coletor que passará pelo(s) emissor(es) polarizado(s) e que irá drenar corrente da base do transistor de saída, cortando-o e fazendo a saída ficar em nível lógico um. Quando as duas junções base-emissor não estiverem polarizadas, existirá uma corrente de fuga ICBO (corrente base-coletor com emissor em aberto), que será suficiente para polarizar o transistor da saída, levando a mesma para o nível zero. Entrada em aberto: Quando deixamos uma entrada em aberto, teremos a respectiva junção base-emissor não polarizada. Isto tem o mesmo efeito de se colocar o nível lógico um na entrada. Na prática, onde problemas de acoplamento de ruído de HF são bem conhecidos, sempre devemos garantir o nível um ligando-o fisicamente a Vcc, i.e., não devemos confiar no expediente de deixar entradas em aberto, geralmente aparecerão problemas. Tecnologias-Demantova 22 ESPECIFICAÇÕES DA FAMÍLIA TTL SÉRIES 74/54 SIMBOLOGIA: ZZ 74 AC XXX NT - ZZ é geralmente o código do fabricante (ex. SN da Texas Inst.). - Faixa de Temperatura: 74[0..75C] e 54 [-55..125C]. - As letras que aparecem após o 74/54 especificam a subfamília: - Os números XXX especificam a função do CI. - NT identifica o tipo de encapsulamento. Ex: N=300mil DIP Dual in Pine; NT é 300 mil DIP para 24/28 pinos; D=150 mil SO; DW 300 mil SO 20/24/28 pinos; DL 300 mil SSOP (Shrink Small Outline Package) 48/56 pinos 300 mil cerâmico DIL. Tecnologias-Demantova 23 ESPECIFICAÇÕES DA FAMÍLIA TTL ALIMENTAÇÃO: - A versão comercial tem tolerância de 5% na alimentação [de 4,75 a 5,25V]. NÍVEIS DE ENTRADA E SAÍDA: Tecnologias-Demantova 24 ESPECIFICAÇÕES DA FAMÍLIA TTL SAÍDAS PADRÃO: Tecnologias-Demantova 25 ESPECIFICAÇÕES DA FAMÍLIA TTL PORTA NE TTL PADRÃO: - R3 caracteriza o active pull-up resistor. - Q3 e Q4 a saída toten-pole. - A e/ou B em nível zero, Q2 corta, levando Q4 ao corte. - Q3 conduz, aparecendo na saída s um, igual a +Vcc. - Com A e B em nível um, por R1 fluirá uma corrente (ICBO) que irá saturar Q2 e consequentemente Q4. - Devido queda de tensão em D, o transistor Q3 cortará e teremos na saída a tensão VCESAT de Q4, ou seja, 0,2V. Tecnologias-Demantova 26 ESPECIFICAÇÕES DA FAMÍLIA TTL COLETOR ABERTO: Tecnologias-Demantova 27 FUNÇÃO ENABLE, TRI-STATE / ESTADO DE ALTA IMPEDÂNCIA: Este tipo de porta apresenta 3 estados de saída: o estado zero (Q4 saturado e Q3 cortado), o estado um (Q4 cortado e Q3 saturado) e um terceiro estado de alta impedância (Q4 e Q3 cortados), conhecido como terceiro estado. Diz-se que esta saída é do tipo tri-state (3S ou 3z). Se aplicarmos um nível zero (0V) na entrada E no enable (entrada de habilitação), Q5 será cortado e o circuito funcionará normalmente como uma porta NE. Se aplicarmos nível um (Vcc), o transistor Q5 saturará e o potencial no ponto X cairá para um valor baixo, levando Q3 e Q4 para a situação de corte. O terminal de saída S, neste caso, estará praticamente desconectado do circuito e ocasionará o estado de alta impedância. Na prática, as aplicações das saídas tri-state são muitas, principalmente em sistemas com micro-processadores, onde vários circuitos integrados compartilham um mesmo conjunto de, formando o que se denomina barramento de dados (Data Bus). Nesta situação, enquanto um dispositivo utiliza os dados do barramento, todos os outros dispositivos ligados ao mesmo barramento permanecem em estado de
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