Laboratory Two Microcontroller Logic Basic Concepts 1. Arithmetic and logic operations are performed in processors in the arithmetic logic unit, ALU. 2. ALUs consist of registers, logic and an adder block. Registers store a string of binary bits. An adder block can add the contents of registers together, bit by bit, with carrys propagated, as shown at right. Encoding operands in a 2’s complement representation does subtraction. 3. ALUs can also perform other logical operations such as shifting, floating point and Hamming codes. Note: This prelab (marked “Pre” below) is worth 10 points. Task One: Binary Arithmetic Exercises (10 pts) Write the problems shown at right in your notebook. 1. (Pre) Binary Addition: Compute the sum of the 8-bit binary numbers shown at right. Identify any addition that results in a carry 00000110 01110110 01110110 overflow, i.e. a non-zero number in the 9th bit position. +00001011 +01111111 +11101111 2. (Pre) Take a 2’s complement: The 2’s complement is a special code used to represent negative numbers to help subtraction. We will call this code N*. The procedure for computing N* is as follows: a. Complement all 8 bits of N. This is called the 1’s 6 = 00000110 7 = 00000111 complement. Invert: b. Add +1 to the result. Add + 1: c. Discard any carry to the 9th bit position. This result -6 = -7 = is the 2’s complement, N*. Compute N* for the numbers shown at right. Such numbers will always have a leading 1, which indicates that 7 = 6 = they are negative. Note: carrys going into the 9th bit -6 = -7 = position now cause problems. 1 = -1 = 3. (Pre) Subtract two numbers by adding them: Compute N + N* for the two examples shown at right. Ignore any carry to the 9th bit position. 4. (Pre) Find the original number: Given the 2’s complement numbers N*, shown at right, compute the original decimal number, plus the sign N. N* = 11111001 N* = 00001001 The procedure for finding the signed binary number is: a. If the leading bit of N* is 1, then take the 2’s N = N = complement of N*. The result is then defined -N. b. If the leading bit should happen to be 0, then the result is defined as +N. (i.e. don’t change anything) Task Two: Full Adder Simulation w/Logisim 1. Open Logisim in your browser. 2. You will now build and simulate the simple Full Adder circuit, capable of adding 3 bits. Review this video tutorial for using Logisim. The parts bin that we are going to use will be on the left. It has a 2-input AND, a 2-input OR and a 2-input exclusive OR, also called a XOR. 3. Choose and drag the symbols needed for the schematic on the right onto the white space of the schematic window, connecting these components as you see in the diagram at right. 4. Complete your logic circuit schematic by adding pins to your design, label them as A, B, C plus Carry and Sum. Save your schematic by giving your project a name and saving the result. 5. Now change the values of your inputs in the square pins and view the simulated values of Sum and Carry as you vary A, B and C. 6. Go to the Project -> Analyze Circuit and check use the “Inputs” and “Outputs” tabs to check the names of your signals. Finally, use the “Table” tab and fill in an experimental truth table for the 3-input Full Adder circuit in your lab notebook. 7. Finally, your instructor will show you how to create a “Full Adder” Logisim Symbol for your circuit, which will look like the symbol shown at right. This symbol can be used to develop more complicated adder circuits. Task Three: Logic Design of a Ripple ALU We are going to extend your Full adder to create a 4-bit Arithmetic Logic Unit (ALU) that can do four functions. a. A + B (ADD) b. A · B (AND) c. A + B (OR) d. B’ (NOT) 1. Connect your Full Adder circuit to the schematic module for a 1-bit Full ALU (see schematic next page, courtesy of J. White), as shown at right. The operation of the Full ALU is controlled by two function select inputs F0 and F1, such as shown in the table in the figure. Test this circuit to validate its operation. 2. Next, create a Logisim symbol for the 1-bit Full ALU such as shown at right. 3. Finally paste three more Full ALUs vertically down, as shown on the next page. Now test the ripple FA, using inputs suggested by your lab TA Task Four: Exercising the Simple ALU We will now perform some operations on a simple ALU (already built for you in Logisim), consisting of a Logic Operations Unit (LOU), four registers, and a shared Data Bus. The Registers A [a0 a1 a2 a3 a4 a5 a6 a7] and B [b0 b1 b2 b3 b4 b5 b6 b7] hold the two input variables for the LOU. Register I holds the instruction (operation) that the LOU performs, similar to the of functions F0 and F1. Register C [c0 c1 c2 c3 c4 c5 c6 c7] holds the output of the LOU. The contents of all registers are displayed on the seven-segment display in hexadecimal format. The contents of the Data Bus are on LEDs. Register I ALU Operation 00000000 C = A + B (Add) 00000001 C = A · B (AND) 00000010 C = A + B (OR) 00000011 C = B’ (NOT) 1. Load a number into register A: a. Set +7 = 00000111 into the switches (+7 -> SW). b. Load A. (SW -> A) 2. Compute A + B and store results into the C: a. Make sure register A is loaded with +7. (see Step 1) b. Set +6 = 00000110 into the switches (+6 -> SW). c. Load B (SW -> B) d. Set 00000000 into the switches of (0 -> SW). e. Load I. (SW -> I) f. Set Gate A high, result: (A + B -> C) (Look for “0d” = 00001101 = +13 in register C.) 3. Compute A – B and store results into the C: a. Load A with +7. (SW -> A) b. Set SW to the 2s complement of 6 and move the result into Register B. (SW -> B) c. Set 00000000 into the switches of (0 -> SW). d. Load I. (SW -> I) e. Set Gate A high, result: (A + B -> C) (Look for “01” = 00000001 = + 1 in register C.) 4. Make a 2’s complement: Write a list of bus operations a, b, c… (similar to that which were written in 2 above) to make the 2’s complement of the number 6 and read the result in register C. You will need to make use of the NOT operation to compute the 2’s complement. Record the bus operations (x -> y) and show your results to your lab instructor. .