Dissertation Methods to Exploit Reconfigurable Fabrics Making Reconfigurable Systems Mature A thesis submitted to the Faculty of Computer Science, Electrical Engineering and Mathematics of the University of Paderborn in partial fulfillment of the requirements for the degree of Dr. rer. nat. Florian Dittmann Paderborn 2007 Supervisors: Prof. Dr. Franz J. Rammig, Heinz Nixdorf Institute, University of Paderborn Prof. Dr. Marco Platzner, University of Paderborn Prof. Dr.-Ing. Jurgen¨ Teich, University of Erlangen-Nuremberg Date of public examination: December 14, 2007 Acknowledgements This work was carried out in the course of exploring reconfigurable fabrics during my work as a research assistant in the working group Distributed Embedded Systems at the Heinz Nixdorf Institute, an interdisciplinary center of research and technology of the University of Paderborn. First of all, I wish to express my deep gratitude to my supervisor Prof. Dr. Franz J. Rammig. He gave me the possibility to work in the field of reconfigurable computing and excellently guided me through my PhD journey. I could always count on his opti- mism, which more than once helped me to search for the way out when I was sure to be stuck in a dead-end road. I also like to thank my two vice-supervisors Prof. Dr. Marco Platzner and Prof. Dr.- Ing. Jurgen¨ Teich. I enjoyed having those two experts of the field of reconfigurable computing supervising my thesis. I like to thank all my former colleagues, who helped me in different ways to finalize my thesis, among them Achim Rettberg, Marcelo G¨otz, Stefan Ihmor, Klaus Danne, J¨org St¨ocklein, Norma Montealegre, Simon Oberthur,¨ and last but not least Vera Kuhne.¨ In particular, I want to thank Dr. Achim Rettberg and Dr. Marcelo G¨otz for the fruitful discussions on the benefits and challenges of reconfigurable computing. In both I found two inspirational researchers for discussions that substantially contributed to the quality of this thesis. This work was also done within the SPP 1148 Reconfigurable Computing Systems of the DFG, the German Research Foundation. Besides all fellows I met during colloquia, I particularly want to thank Prof. Dr. Christophe Bobda, who heavily influenced the first application for this position. Also, I want to thank all helping students: Fabian Schulte, Alexander Warkentin, Stefan Frank, Elmar Weber, Paulin Francis Ngaleu, Simon Schutte,¨ and Helene Schilke. Finally, I want to thank my parents. Their open-minded style allowed me to find my own way with the knowledge of their unlimited support. Thanks also to my sister Christine and my grandmother. Both always found the right words to help me believe in myself. Last but not least my lovely thanks go to my girl-friend Carmen and her patience. She tirelessly gave me the motivation to finalize this project. Paderborn, December 2007 i ii Abstract The demands for flexibility and performance presumably are the two main driving forces of modern computing systems. Both are ever increasing requirements of users, de- vices, machines, processes, etc. Computer scientists and engineers constantly search for methods and architectures to solve these demands. Recently, reconfigurable devices— adaptable and fairly powerful computing resources—have approached this scene. Reconfigurable devices appear to be most appropriate for high flexibility and high performance. They process in parallel and can change their behavior by loading dif- ferent configurations on their fabrics, also during run-time. However, comprehensive exploitation of the paradigms of reconfigurable computing is rarely found in modern systems. In particular, dynamic reconfiguration—the adaptation of the behavior during run-time—combined with partial reconfiguration capabilities of modern FPGAs remains unused in most modern designs. If we search for reasons, the answers are twofold. On one hand, we have to generally argue on what benefits partial run-time reconfiguration yields, as we have to overcome challenging technical hurdles. On the other hand, also few high-level methods exist that target the partial reconfiguration capabilities of modern FPGAs and would allow a system designer to exploit partial run-time reconfiguration. This thesis approaches the situation described along the second train of thoughts—the need for methods. We discuss new methods to exploit run-time reconfiguration, which explore given reconfiguration constraints and often target at specific application areas. In order to evaluate the methods, we integrate them into an abstracting layered view on reconfigurable computing. We also discuss the technical challenges, which have to be overcome to implement the methods. Altogether and maybe most notably, the methods themselves explain where they can be useful, thus making a case for the use of run-time reconfiguration in everyday systems—making reconfigurable systems mature. iii iv Zusammenfassung Flexibilit¨at und Leistungsf¨ahigkeit (Performance) geh¨oren wohl zu den am st¨arksten nachgefragten Anforderungen an moderne Rechensysteme. So werden beide in st¨andig steigendem Maße von Benutzern, aber auch Maschinen, Prozessen, usw. eingefordert. Informatikern und Ingenieuren obliegt die Aufgabe stets nach neuen Methoden und Ar- chitekturen zu suchen, die dieser Herausforderung gerecht werden. In jungster¨ Zeit sind nun die adaptierbaren und leistungsf¨ahigen rekonfigurierbaren Rechensysteme als weite- re Architekturen hinzugekommen. Ihre Eigenschaften weisen sie als besonders geeignet fur¨ das Erreichen von Performance und Flexibilit¨at aus. So findet eine Berechnung auf rekonfigurierbaren Systemen im Raum, d. h. parallel, statt und kann nach Bedarf w¨ahrend der Laufzeit durch Rekonfigurierung angepasst werden. Trotz der offensichtlichen Vorteile sind unter den modernen Rechensystemen wenige vorzufinden, welche die M¨oglichkeiten der Rekonfigurierung auch tats¨achlich ausnutzen. Insbesondere bleibt die dynamische Rekonfigurierung, d. h. die Anpassung des Verhaltens w¨ahrend der Laufzeit, kombiniert mit der M¨oglichkeit zur partiellen Rekonfigurierung oftmals ungenutzt. Es lasse sich zwei Begrundungen¨ hierzu ermitteln. Einerseits muss grunds¨atzlich gekl¨art sein, wo die tats¨achlichen Vorteile einer partiellen Rekonfigurierung liegen, da eine solche nicht kostenneutral zu erreichen ist. Andererseits existieren aber auch nur wenige Methoden, insbesondere auf h¨oherer Abstraktionsebene, die es erlauben die Leistungsdaten von Systemen bei Ausnutzung der partiellen Rekonfigurierung zu evaluieren und letztere dann sp¨ater auch gewinnbringend einzusetzen. In dieser Arbeit wird dem Dilemma anhand der zweiten Begrundung¨ Rechnung ge- tragen. Es werden vier neue Methoden diskutiert, die es erlauben Vorteile der partiellen Rekonfigurierung zur Laufzeit auszusch¨opfen. Um die teilweise applikationsspezifischen Methoden zu explorieren, wird ein abstrahierendes Schichtenmodell verwendet. Zudem werden die fur¨ eine Implementierung notwendigen technischen Herausforderungen n¨aher beleuchtet. Schlussendlich sind die vorgestellten Methoden nicht nur Entwurfsmittel, sondern stellen selbst neue M¨oglichkeiten zur Anwendung partiell rekonfigurierbarer Rechensysteme dar. Sie zeigen auf, wo der Einsatz m¨oglich und praxisgerecht ist. v vi Contents 1 Introduction 1 1.1 Reconfigurable Computing . 2 1.2 Contribution of the Thesis . 4 1.3 Abstracting Layered Approach . 5 1.4 Outlineofthework.............................. 5 2 Reconfigurable Computing 7 2.1 Introduction.................................. 7 2.1.1 Evolution ............................... 7 2.1.2 Makimoto’s Wave . 11 2.1.3 Remainder of the Chapter . 12 2.2 Technical Aspects . 12 2.2.1 Reconfigurable versus Programmable . 13 2.2.2 Granularity .............................. 14 2.2.3 Field Programmable Gate Arrays . 15 2.2.4 Programming FPGAs . 20 2.2.5 Run-Time Reconfiguration . 22 2.2.6 Coupling................................ 28 2.3 FieldsofApplication ............................. 29 2.3.1 ASIC Design . 29 2.3.2 Replacement of Dedicated Circuits . 30 2.3.3 Adaptive Processing . 31 2.4 Design Approaches for Reconfigurable Systems . 34 2.4.1 Execution Environments/Architectures . 34 2.4.2 Placement/Scheduling Methods . 37 2.4.3 Comprehensive Design Systems/Design Methods . 39 2.4.4 Miscellaneous Concepts . 40 2.5 Lesson Learned . 40 2.6 Summary ................................... 42 3 Two-Slot Framework 43 3.1 Introduction.................................. 43 3.1.1 Layered Approach . 45 3.1.2 Organization of the Chapter . 45 3.2 Concept .................................... 45 3.2.1 Problem Abstraction . 46 vii Contents 3.2.2 Problem Solution Strategy . 48 3.3 Run-Time Architecture . 49 3.3.1 Fundamental Design Constraints . 50 3.3.2 Intermodule Communication . 51 3.4 Partitioning .................................. 53 3.4.1 Simple Temporal Partitioning . 53 3.4.2 Spectral Based Partitioning . 54 3.5 Scheduler ................................... 59 3.6 Experiment .................................. 61 3.6.1 Proof of Concept Implementation . 61 3.6.2 Cryptography Example . 63 3.7 Extensions................................... 65 3.7.1 Low Power Considerations . 65 3.7.2 The Two Slot Framework as an IP Core . 69 3.8 Lesson Learned . 70 3.9 RelatedWork ................................. 71 3.10Summary ................................... 73 4 Specification Graph Approach for Reconfigurable Fabrics 75 4.1 Introduction.................................. 75 4.1.1 Layered Approach . 76 4.1.2 Organization of the Chapter . 76 4.2 Concept .................................... 77 4.2.1 Problem Abstraction .