DOCSLIB.ORG

Administering IBM Spectrum LSF

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Administering IBM Spectrum LSF IBM Spectrum LSF Version 10 Release 1 Administering IBM Spectrum LSF IBM IBM Spectrum LSF Version 10 Release 1 Administering IBM Spectrum LSF IBM Note Before using this information and the product it supports, read the information in “Notices” on page 841. This edition applies to version 10, release 1 of IBM Spectrum LSF (product numbers 5725G82 and 5725L25) and to all subsequent releases and modifications until otherwise indicated in new editions. Significant changes or additions to the text and illustrations are indicated by a vertical line (|) to the left of the change. If you find an error in any IBM Spectrum Computing documentation, or you have a suggestion for improving it, let us know. Log in to IBM Knowledge Center with your IBMid, and add your comments and feedback to any topic. © Copyright IBM Corporation 1992, 2017. US Government Users Restricted Rights – Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp. Contents Chapter 1. Managing Your Cluster ... 1 Limiting job resource allocations ....... 455 Work with your cluster ........... 1 Reserving Resources ........... 468 LSF daemon startup control ......... 25 Job dependency and job priority ....... 481 Working with hosts............ 33 Job requeue and job rerun ......... 500 Managing job execution .......... 70 Job Migration ............. 505 Working with Queues .......... 109 Job Checkpoint and Restart......... 514 Enable host-based resources ........ 120 Resizable Jobs ............. 527 External Load Indices .......... 147 Chunk Jobs and Job Arrays......... 536 Managing LSF user groups ......... 161 Job Packs............... 548 External Host and User Groups ....... 166 Between-Host User Account Mapping ..... 170 Chapter 6. Energy Aware Scheduling 553 Cross-Cluster User Account Mapping ..... 175 About Energy Aware Scheduling (EAS)..... 553 UNIX/Windows User Account Mapping .... 180 Managing host power states ........ 553 CPU frequency management ........ 562 Chapter 2. Monitoring Your Cluster 189 Automatic CPU frequency selection ...... 565 Achieve performance and scalability...... 189 Event generation ............ 200 Chapter 7. Control job execution ... 575 Tuning the Cluster............ 201 Runtime Resource Usage Limits ....... 575 Authentication and authorization ....... 211 Load Thresholds ............ 592 External authentication .......... 217 Pre-execution and post-execution processing ... 596 Job file spooling ............ 225 Job starters .............. 615 Non-Shared File Systems ......... 230 Job Controls .............. 620 Error and event logging .......... 235 External job submission and execution controls .. 627 Troubleshooting LSF problems........ 244 Interactive jobs with bsub ......... 650 Interactive and remote tasks ........ 659 Chapter 3. Time-Based Configuration 261 Running Parallel Jobs........... 665 Time Configuration ........... 261 Advance Reservation ........... 267 Chapter 8. Appendices ....... 747 Submitting Jobs Using JSDL ........ 747 Chapter 4. Job Scheduling Policies 293 Using lstch .............. 757 Preemptive Scheduling .......... 293 Using Session Scheduler.......... 765 Specifying Resource Requirements ...... 307 Using lsmake ............. 779 Fairshare Scheduling ........... 352 Manage LSF on EGO ........... 785 Global Fairshare Scheduling ........ 384 LSF Integrations ............ 801 Resource Preemption ........... 400 Launching ANSYS Jobs .......... 838 Guaranteed resource pools ......... 405 PVM jobs............... 839 Goal-Oriented SLA-Driven Scheduling ..... 416 Exclusive Scheduling ........... 435 Notices .............. 841 Trademarks .............. 843 Chapter 5. Job scheduling and Terms and conditions for product documentation 843 dispatch ............. 437 Privacy policy considerations ........ 844 Share resources with application profiles .... 437 Job directories and data .......... 452 Index ............... 845 © Copyright IBM Corp. 1992, 2017 iii iv Administering IBM Spectrum LSF Chapter 1. Managing Your Cluster Work with your cluster Learn about LSF directories and files, commands to see cluster information, control workload daemons, and how to configure your cluster. LSF Terms and Concepts Before you use LSF for the first time, you should read the LSF Foundations Guide for a basic understanding of workload management and job submission, and the Administrator Foundations Guide for an overview of cluster management and operations. Job states IBM Spectrum LSF jobs have several states. PEND Waiting in a queue for scheduling and dispatch. RUN Dispatched to a host and running. DONE Finished normally with zero exit value. EXIT Finished with nonzero exit value. PSUSP Suspended while the job is pending. USUSP Suspended by user. SSUSP Suspended by the LSF system. POST_DONE Post-processing completed without errors. POST_ERR Post-processing completed with errors. UNKWN The mbatchd daemon lost contact with the sbatchd daemon on the host where the job runs. WAIT For jobs submitted to a chunk job queue, members of a chunk job that are waiting to run. ZOMBI A job becomes ZOMBI if the execution host is unreachable when a non-rerunnable job is killed or a rerunnable job is requeued. Host An LSF host is an individual computer in the cluster. Each host might have more than one processor. Multiprocessor hosts are used to run parallel jobs. A multiprocessor host with a single process queue is considered a single machine. A box full of processors that each have their own process queue is treated as a group of separate machines. © Copyright IBM Corp. 1992, 2017 1 Managing Your Cluster Tip: The names of your hosts should be unique. They cannot be the same as the cluster name or any queue that is defined for the cluster. Job An LSF job is a unit of work that runs in the LSF system. A job is a command that is submitted to LSF for execution, by using the bsub command. LSF schedules, controls, and tracks the job according to configured policies. Jobs can be complex problems, simulation scenarios, extensive calculations, anything that needs compute power. Job files When a job is submitted to a queue, LSF holds it in a job file until conditions are right for it run. Then, the job file is used to run the job. On UNIX, the job file is a Bourne shell script that is run at execution time. On Windows, the job file is a batch file that is processed at execution time. Interactive batch job An interactive batch job is a batch job that allows you to interact with the application and still take advantage of LSF scheduling policies and fault tolerance. All input and output are through the terminal that you used to type the job submission command. When you submit an interactive job, a message is displayed while the job is awaiting scheduling. A new job cannot be submitted until the interactive job is completed or terminated. Interactive task An interactive task is a command that is not submitted to a batch queue and scheduled by LSF, but is dispatched immediately. LSF locates the resources that are needed by the task and chooses the best host among the candidate hosts that has the required resources and is lightly loaded. Each command can be a single process, or it can be a group of cooperating processes. Tasks are run without using the batch processing features of LSF but still with the advantage of resource requirements and selection of the best host to run the task based on load. Local task A local task is an application or command that does not make sense to run remotely. For example, the ls command on UNIX. 2 Administering IBM Spectrum LSF Managing Your Cluster Remote task A remote task is an application or command that that can be run on another machine in the cluster. Host types and host models Hosts in LSF are characterized by host type and host model. The following example is a host with type X86_64, with host models Opteron240, Opteron840, Intel_EM64T, and so on. Host type: An LSF host type is the combination of operating system and host CPU architecture. All computers that run the same operating system on the same computer architecture are of the same type. These hosts are binary-compatible with each other. Each host type usually requires a different set of LSF binary files. Host model: An LSF host model is the host type of the computer, which determines the CPU speed scaling factor that is applied in load and placement calculations. The CPU factor is considered when jobs are being dispatched. Resources LSF resources are objects in the LSF system resources that LSF uses track job requirements and schedule jobs according to their availability on individual hosts. Resource usage: The LSF system uses built-in and configured resources to track resource availability and usage. Jobs are scheduled according to the resources available on individual hosts. Jobs that are submitted through the LSF system will have the resources that they use monitored while they are running. This information is used to enforce resource limits and load thresholds as well as fairshare scheduling. LSF collects the following kinds of information: v Total CPU time that is consumed by all processes in the job v Total resident memory usage in KB of all currently running processes in a job v Total virtual memory usage in KB of all currently running processes in a job v Currently active process group ID in a job Chapter 1. Managing Your Cluster 3 Managing Your Cluster v Currently active processes in a job On UNIX and Linux, job-level resource usage is collected through PIM. Load indices: Load indices measure the availability of dynamic,
Load more

Recommended publications
  • Performance of a Computer (Chapter 4) Vishwani D
    ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Performance of a Computer (Chapter 4) Vishwani D. Agrawal & Victor P. Nelson epartment of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 1 What is Performance? Response time: the time between the start and completion of a task. Throughput: the total amount of work done in a given time. Some performance measures: MIPS (million instructions per second). MFLOPS (million floating point operations per second), also GFLOPS, TFLOPS (1012), etc. SPEC (System Performance Evaluation Corporation) benchmarks. LINPACK benchmarks, floating point computing, used for supercomputers. Synthetic benchmarks. ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 2 Small and Large Numbers Small Large 10-3 milli m 103 kilo k 10-6 micro μ 106 mega M 10-9 nano n 109 giga G 10-12 pico p 1012 tera T 10-15 femto f 1015 peta P 10-18 atto 1018 exa 10-21 zepto 1021 zetta 10-24 yocto 1024 yotta ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 3 Computer Memory Size Number bits bytes 210 1,024 K Kb KB 220 1,048,576 M Mb MB 230 1,073,741,824 G Gb GB 240 1,099,511,627,776 T Tb TB ELEC 5200-001/6200-001 Performance Fall 2013 . Lecture 4 Units for Measuring Performance Time in seconds (s), microseconds (μs), nanoseconds (ns), or picoseconds (ps). Clock cycle Period of the hardware clock Example: one clock cycle means 1 nanosecond for a 1GHz clock frequency (or 1GHz clock rate) CPU time = (CPU clock cycles)/(clock rate) Cycles per instruction (CPI): average number of clock cycles used to execute a computer instruction.
    [Show full text]
  • 6IF Ver. 1.X MANUAL
    5SMT / 5SMTS SiS 530 ALL-IN-ONE AT MAINBOARD OPERATION MANUAL DOC NO. UM-SMT-E4 …………………………………………………………………………………………………………… PRINTED IN TAIWAN SiS530 AT MAINBOARD TABLE OF CONTENTS CHAPTER & SECTION PAGE 1. INTRODUCTION ................................................................................... 1-1 1.1 SYSTEM OVERVIEW ...................................................................................1-1 1.2 SYSTEM BOARD LAYOUT .........................................................................1-2 2. FEATURES .............................................................................................. 2-1 2.1 2.1 MAINBOARD SPECIFICATIONS ........................................................2-1 3. HARDWARE SETUP ............................................................................. 3-1 3.1 UNPACKING...................................................................................................3-1 3.2 HARDWARE CONFIGURATION...............................................................3-2 3.2.1 CONNECTORS...................................................................................3-2 3.2.2 JUMPERS ............................................................................................3-17 3.2.3 QUICK INSTALLATION OF POPULAR CPU..............................3-23 3.2.4 INSTALLATION OF DEVICE DRIVER ........................................3-26 4. AWARD BIOS SETUP ........................................................................... 4-1 4.1 GETTING STARTED.....................................................................................4-1
    [Show full text]
  • AMD's Early Processor Lines, up to the Hammer Family (Families K8
    AMD’s early processor lines, up to the Hammer Family (Families K8 - K10.5h) Dezső Sima October 2018 (Ver. 1.1) Sima Dezső, 2018 AMD’s early processor lines, up to the Hammer Family (Families K8 - K10.5h) • 1. Introduction to AMD’s processor families • 2. AMD’s 32-bit x86 families • 3. Migration of 32-bit ISAs and microarchitectures to 64-bit • 4. Overview of AMD’s K8 – K10.5 (Hammer-based) families • 5. The K8 (Hammer) family • 6. The K10 Barcelona family • 7. The K10.5 Shanghai family • 8. The K10.5 Istambul family • 9. The K10.5-based Magny-Course/Lisbon family • 10. References 1. Introduction to AMD’s processor families 1. Introduction to AMD’s processor families (1) 1. Introduction to AMD’s processor families AMD’s early x86 processor history [1] AMD’s own processors Second sourced processors 1. Introduction to AMD’s processor families (2) Evolution of AMD’s early processors [2] 1. Introduction to AMD’s processor families (3) Historical remarks 1) Beyond x86 processors AMD also designed and marketed two embedded processor families; • the 2900 family of bipolar, 4-bit slice microprocessors (1975-?) used in a number of processors, such as particular DEC 11 family models, and • the 29000 family (29K family) of CMOS, 32-bit embedded microcontrollers (1987-95). In late 1995 AMD cancelled their 29K family development and transferred the related design team to the firm’s K5 effort, in order to focus on x86 processors [3]. 2) Initially, AMD designed the Am386/486 processors that were clones of Intel’s processors.
    [Show full text]
  • AMD Geode™ NX Processors BIOS Considerations Application Note
    AMD Geode™ NX Processors BIOS Considerations Application Note PID: 32483 Rev: A Issue Date: October 2004 © 2004 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. (“AMD”) products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of mer- chantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Contacts www.amd.com Trademarks AMD, the AMD Arrow logo, AMD Athlon, AMD PowerNow!, and combinations thereof, and Geode are trademarks of Advanced Micro Devices, Inc. Microsoft and Windows are registered trademarks of Microsoft Corporation.
    [Show full text]
  • MARIE: an Introduction to a Simple Computer
    00068_CH04_Null.qxd 10/18/10 12:03 PM Page 195 “When you wish to produce a result by means of an instrument, do not allow yourself to complicate it.” —Leonardo da Vinci CHAPTER MARIE: An Introduction 4 to a Simple Computer 4.1 INTRODUCTION esigning a computer nowadays is a job for a computer engineer with plenty of Dtraining. It is impossible in an introductory textbook such as this (and in an introductory course in computer organization and architecture) to present every- thing necessary to design and build a working computer such as those we can buy today. However, in this chapter, we first look at a very simple computer called MARIE: a Machine Architecture that is Really Intuitive and Easy. We then pro- vide brief overviews of Intel and MIPs machines, two popular architectures reflecting the CISC and RISC design philosophies. The objective of this chapter is to give you an understanding of how a computer functions. We have, therefore, kept the architecture as uncomplicated as possible, following the advice in the opening quote by Leonardo da Vinci. 4.2 CPU BASICS AND ORGANIZATION From our studies in Chapter 2 (data representation) we know that a computer must manipulate binary-coded data. We also know from Chapter 3 that memory is used to store both data and program instructions (also in binary). Somehow, the program must be executed and the data must be processed correctly. The central processing unit (CPU) is responsible for fetching program instructions, decod- ing each instruction that is fetched, and performing the indicated sequence of operations on the correct data.
    [Show full text]
  • A Comparative Study of 64 Bit Microprocessors Apple, Intel and AMD
    Special Issue - 2016 International Journal of Engineering Research & Technology (IJERT) ISSN: 2278-0181 ICACT - 2016 Conference Proceedings A Comparative Study of 64 Bit Microprocessors Apple, Intel and AMD Surakshitha S Shifa A Ameen Rekha P M Information Science and Engineering Information Science and Engineering Information Science and Engineering JSSATE JSSATE JSSATE Bangalore, India Bangalore, India Bangalore, India Abstract- In this paper, we draw a comparative study of registers, even larger .The term may also refer to the size of microprocessor, using the three major processors; Apple, low-level data types, such as 64-bit floating-point numbers. Intel and AMD. Although the philosophy of their micro Most CPUs are designed so that the contents of a architecture is the same, they differ in their approaches to single integer register can store the address of any data in implementation. We discuss architecture issues, limitations, the computer's virtual considered an appropriate size to architectures and their features .We live in a world of constant competition dating to the historical words of the work with for another important reason: 4.29 billion Charles Darwin-‘Survival of the fittest ‘. As time passed by, integers are enough to assign unique references to most applications needed more processing power and this lead to entities in applications like databases. an explosive era of research on the architecture of Some supercomputer architectures of the 1970s and microprocessors. We present a technical & comparative study 1980s used registers up to 64 bits wide. In the mid-1980s, of these smart microprocessors. We study and compare two Intel i860 development began culminating in a 1989 microprocessor families that have been at the core of the release.
    [Show full text]
  • Athlon XP 2600+ Reviewed Athlon XP 2600+ Reviewed by Johan De Gelas – August 2002
    Ace’s Hardware Athlon XP 2600+ Reviewed Athlon XP 2600+ Reviewed By Johan De Gelas – August 2002 AMD Takes Up the Gauntlet with Flair The last few quarters have been pure agony for AMD. Sales and turnover figures plunged to terrible lows and AMD's results where written in bloody red ink. Thoroughbred, the 130 nanometer Athlon XP was limited to a 66 MHz increase over its older brother Palomino. The race with Intel was lost: Intel's 2.53 GHz Pentium 4 was arguably the fastest x86 processor in the world. After launching the Thoroughbred Athlon XP 2200+, many people on the Internet were forecasting doom scenarios for AMD. The disappointing initial clockspeeds were, however, no surprise for the hardware veterans among you. When Thoroughbred was launched, we stated: "Our sources indicate that AMD's yields at 0.13µ are pretty good, but the current bin splits have a lot of room for improvement. While 1.5V is good enough to get the Thoroughbred up to 1600 MHz, higher clockspeeds are only attained with some kind of overclocking. Now this is hardly of a reason for panic, as it is even sort of a "tradition" for AMD. With far fewer resources for debugging and tuning, new process technology almost always experiences some teething problems." Contrary to Intel, AMD has neither funds nor fabs for backup plans, so moves to new process technology or new processor layouts are always somewhat risky. New process technology or layout changes often initially result in yield, clock scaling, and/or binsplit problems, and the time that it takes to resolve these issues tends to be very variable.
    [Show full text]
  • EC Declaration of Conformity
    EC Declaration of Conformity We IWILL Corp. No. 10, Wu Chuan 3rd Rd., Hsin Chuang City, Taipei, Taiwan, R.O.C. Declare under sole responsibility that the XA100 Plus motherboard Meets the intent of Directive 89/336/ECC for Electromagnetic Compatibility. Compliance was demonstrated to the following specifications as listed in the official Journal of the European Communities: EN 50081-1 Emissions: EN 55022 Radiated, Class B EN 55022 Conducted, Class B EN 60555-2 Power Harmonics EN 50082-1 Immunity: IEC 801-2 Electrostatic Discharge IEC 801-3 RF Radiate IEC 801-4 Fast Transient V1.3C 1 About This Manual This manual introduces to the users how this XA100 PLUS Ultra ATA-2 ( Ultra DMA 33 ) and 100 MHz bus motherboard is manufactured. All useful information is described in later chapters. Keep this manual for future upgrades or system configuration changes. Chapter 0 Overview An overview of some special and basic features of the XA100 Plus motherboard Chapter 1 Features The detailed features and specifications of the XA100 Plus motherboard Chapter 2 Quick Installation The quick reference for experienced users Chapter 3 Hardware Installation The detailed information on jumper settings, connections, and hardware installation Chapter 4 AWARD BIOS Setup The detailed information of the system AWARD BIOS setup options Chapter 5 Software and Tools The detailed information for installing software and tools Warning Most of the features of this motherboard have passed strict testing, and are subject to change at any time without notice. IWILL assumes no responsibility or liability for any malfunction that occurs due to the future technical changes made by the respective component manufacturers.
    [Show full text]
  • AMD-K6-2® Processor Data Sheet
    Preliminary Information AMD-K6-2® Processor Data Sheet © 2000 Advanced Micro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD's Standard Terms and Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make changes to its products at any time without notice. Trademarks AMD, the AMD logo, K6, 3DNow!, and combinations thereof, K86, and Super7 are trademarks, and AMD-K6 and RISC86 are registered trademarks of Advanced Micro Devices, Inc. Microsoft, Windows, and Windows NT are registered trademarks of Microsoft Corporation. NetWare is a registered trademark of Novell, Inc.
    [Show full text]
  • Athlon XP 3200+ Versus Pentium 4 C by Johan De Gelas – May 2003
    Ace’s Hardware Gaming CPU Performance: Athlon XP 3200+ Versus 3 GHz Pentium 4 C Gaming CPU Performance: Athlon XP 3200+ Versus Pentium 4 C By Johan De Gelas – May 2003 Athlon XP 3200+ Reviewed As AMD feels that the Athlon 64 still isn't ready for prime time, the Athlon "Barton" core remains their flagship desktop processor that must face the fierce competition of Santa Clara. Today, AMD claims that a 2.2 GHz Athlon with 512 KB cache and a 400 MHz FSB should carry the 3200+ performance rating. Clockspeeds higher than 2.2 GHz seem to be a hurdle too high for the current Athlon. In our humble opinion, the primary limiting factor is power dissipation. The Athlon faces two problems: it is not capable of reaching high clockspeeds without a core voltage of 1.65V and it is hard to get rid of the heat of the resulting power dissipation when you have to dissipate it through a very small die without a heat-spreader. The carefully mounted heat-spreader and the SOI circuits on the Opteron show, however, that AMD has solved this problem with its next generation processors. But for now, eight months after the introduction of the 2.25 GHz AMD Athlon (2800+), the Athlon is still running at 2.2 GHz. Intel seems to face the same problem with the Pentium 4, as the 3 GHz P4 has been the fastest processor for 7 (!) months now. Nevertheless, when we knew that the new Athlon XP 3200+ was a 2.2 GHz part, we could not help but to be a bit disapointed.
    [Show full text]
  • Bapco Sysmark 25 White Paper
    SYSmark® 25 July 13th, 2020 Revision 1.1 Revision History: 1.0 – Initial version of the SYSmark 25 White Paper 1.1 – Corrected typo about RAM channels in Section 2.8, Corrected reference link names in Section 2.1, Updated APPENDIX A with information on licensing. BAPCo® SYSmark® 25 White Paper Page 1 of 34 About BAPCo Business Applications Performance Corporation (BAPCo) is a non-profit consortium with a charter to develop and distribute a set of objective performance benchmarks for personal computers based on popular computer applications and industry standard operating systems. For more information about BAPCo or a complete list of the current membership, see our website at http://www.bapco.com/. BAPCo® SYSmark® 25 White Paper Page 2 of 34 Table of Contents 1 Introduction .......................................................................................................................................... 4 2 BAPCo Development Process ................................................................................................................ 5 2.1 Milestone Overview ...................................................................................................................... 6 2.2 Usage Model, Sub Scenario, and Scenario Selection .................................................................... 7 2.3 Scenario Grouping ......................................................................................................................... 8 2.4 Application Selection ...................................................................................................................
    [Show full text]
  • Sysmark® 2002 Performance Benchmark: Analysis Presentation Benchmarks & Athlon XP Performance
    SYSmark® 2002 Performance Benchmark: Analysis Presentation Benchmarks & Athlon XP Performance • Benchmarks are currently the only way for business and home consumers to clearly measure the real-world performance of PCs. Benchmarks must accurately and objectively represent real-world application performance relevant to the end-user. •BAPCo® is a non-profit consortium, originally founded in 1995 by Intel, IBM, Dell and NCR. SYSmark® is BAPCo’s flagship application benchmark. • The AMD Athlon™ XP processor routinely outperformed comparable Intel Pentium® 4 processors using the SYSmark 2001 benchmark. • On January 31, 2002, BAPCo released SYSmark 2002. 2 SYSmark 2001 & 2002 Similarities Internet Content SYSmark Both SYSmark 2001 & SYSmark Creation 2002 Version 2002 are application-based Adobe Photoshop v6.0.1 benchmarks that attempt to Adobe Premier Same reflect usage patterns for end Macromedia Dreamweaver Same users in the areas of Internet Macromedia Flash Same Content Creation and Office Windows Media Encoder v7.01 Productivity. Office Productivity SYSmark 2002 Version The chart on the right explains Microsoft Word v2002 that SYSmark 2002 uses the same Microsoft Excel v2002 applications as SYSmark 2001 Microsoft Power Point v2002 with updated versions where Microsoft Outlook v2002 applicable. Microsoft Access v2002 Dragon Naturally Speaking Same McAfee VirusScan Same Netscape Communicator Same WinZip Computing Same 3 SYSmark 2002 Inconsistencies AMD tested SYSmark 2001 and 2002 on similarly configured systems based on the AMD Athlon XP 2000+ and the Intel Pentium 4 2.0A processors. When compared to the SYSmark 2001 benchmark results, the SYSmark 2002 benchmark results suggested a significant performance decline in the AMD Athlon XP 2000+ processor’s performance and a significant increase in Intel Pentium 4 2.0A processor’s performance.
    [Show full text]