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Challenges to EDA System from the View Point of Processor Design and Technology Drivers Mitsuo Saito Chief Fellow / VP Engineering Toshiba Corporation Semiconductor Company Copyright © 2009 Toshiba Corporation, All rights reserved. Contents Semiconductor Technology and Microprocessor Trend Our Processor Design Experiences ¾ Early Struggles for Processor Design ¾ Meet with Playstation • Development of Graphics and Emotion Engine for Playstation 2 ¾ Towards Cell Broadband Engine (Cell) • Development of Cell Processor • Targets of Cell Processor ¾ Towards SpursEngine • What is SpursEngine Makimoto’s Wave and What we have done? ¾ Historical Analysis of Development Today’s Situation and Challenge to EDA system ¾ What is necessary now? ¾ What will happen next? Summary Copyright © 2009 Toshiba Corporation, All rights reserved. 2 StillStill SemiconductorSemiconductor RoadmapRoadmap is is WorkingWorking :: MooreMoore’’ss LawLaw One Billion Transistors per Chip in 2010 (250Mgates) 1.E+10 1.E+09 1.E+08 1.E+07 1.E+06 1.E+05 # of Transistors / Chip 1.E+04 1.E+03 1980 1985 1990 1995 2000 2005 2010 From SEMATECH Data Copyright © 2009 Toshiba Corporation, All rights reserved. 3 First Micro Processor was born in 1971 Intel 4004 DIP16P, Address bus 12 bit, Data bus 4 bit Clock 741KHz P-MOS 10um Tr. 2300 11/15/1971 From : Wikipedia Copyright © 2009 Toshiba Corporation, All rights reserved. 4 ProcessorProcessor ClockClock RateRate perper YearYear 10000 6GHz 3.2GHz 5GHz 3.8GHz P4 PLAYSTATION3 2.93GHz Standard Processor Era 3.6GHz P4 2006/11/11 3.4GHz P4 Core2 Ext 4GHz Out of Order Execution 3.2GHz P4 3.0GHz P4 3GHz 2.0GHz 3.2GHz Pentium 4 XBox360 2GHz 1.4GHz 2005/12/10 Pentium 4 1GHz Athlon/PIII Multi core Era 1000 700MHz 800MHz Freq. ≠ Perf. RISC Era 600MHz 21264 Pentium III 733MHz 21164 XBox 500MHz Simpler the Better 600MHz 2001/11/15 21164 Pentium III 485MHz 300MHz 450MHz GameCube 275MHz 21164 Pentium II 2001/9/14 21064 200MHz 300MHz 300MHz Clock Rate (MHz) 187MHz 21064 Pentium II PlayStation2 21064 2000/3/4 200MHz 200MHz Pentium Pro Dreamecast 1998/11/24 100MHz 150MHz R4000 Pentium Pro 100 100MHz 100MHz Pentium Nintendo64 1996/6/18 Hiend Processor 66MHz Pentium x86 Processor 66MHz 33MHz 486DX2 PlayStation GAME console 1994/12/3 1999 SIA local clk(Hi-Perf.) 1999 SIA chip-across clk(Hi-Perf.) 10 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 991 992 993 994 995 996 997 998 999 000 001 002 003 004 005 006 007 Year (Chip or System Shipment) Copyright © 2009 Toshiba Corporation, All rights reserved. 5 Waves to Standardization and Customization Mass production (Standardization)：Factory efficiency S/W solution Enough performance with 10 million/month Performance became standard HW, SW Solution better than RISC + ASIC Severe competition Surplus supply Memory in Asia Price down Price slump X86 + MPU in US Standard Software PC Chipset Transistor, 1KDRAM(Intel) Memory, SPARC(SUN) Centric Emotion Tr Diode 4bit MPU(Intel) MPU R3000(MIPS) Design ('47) Engine Cell/B.E. Cell/B.E. 1957 1967 1977 1987 1997 2007 2017 TV, IC Invention CAD Revolution Power Consumption? Calculator, SW+HW Engine Killby patent Watch MOS GA ASIC System on a RISC Short life cycle Design crisis Chip New product development race Too much integration 100 design/month Co-design of dedicated H/W & S/W Various & small production (Customization)：Customer satisfaction Source : Makimoto’s Wave Copyright © 2009 Toshiba Corporation, All rights reserved. 6 AI Workstation (1986) Maybe the last paper and pencil based Design! Processor was a board based About 100 sets were sold, and reasonable revenue Copyright © 2009 Toshiba Corporation, All rights reserved. 7 AI Processor Chip (1988) •Silicon Compiler “Genesil” was Used Performance 12 MIPS @Dhrystone Registers 32bit × 32 Buses 32bit × 2 Bus Cycle 1 Clock min Clock Freq. 16MHz Max Process 1.2um 2 Layer Metal CMOS Tr.Cnt 113K Package 299pin PGA Copyright © 2009 Toshiba Corporation, All rights reserved. 8 First TRON Processor TX1 (1988) •Proprietary HDL (H2DL) was used Performance 5 MIPS Registers 32bit × 16 Buses 32bit × 2 Bus Cycle 2 Clock min Clock Freq. 25MHz Max Process 1.0um 2 Layer Metal CMOS Package 155-pin PGA Copyright © 2009 Toshiba Corporation, All rights reserved. 9 Incomplete GL Processor (1990) •Proprietary HDL (H2DL) was used Freq. 65MHz Inst. 4 Way SuperScalar Dhry. 100MIPS Linpack 66MFlops(Single) 35MFlops(Double) Power 3.3V/5~6W Process 0.5μmCMOS Package 448pin PGA Tr.cnt 2.5M Copyright © 2009 Toshiba Corporation, All rights reserved. 10 RISC Processor R8000 (1993) •Verilog was used Jointly developed with Silicon Graphics Inc. Copyright © 2009 Toshiba Corporation, All rights reserved. 11 R8000 Based Computer Board Designed by Silicon Graphics Inc. Copyright © 2009 Toshiba Corporation, All rights reserved. 12 Embedded RISC Processor TX39(1995) •Verilog was used •First Embedded RISC •32bit MIPS Architecture •40MHz/43MIPS •500mw •4KB I cache / 1KB D cache •4K page MMU (32 entry) Copyright © 2009 Toshiba Corporation, All rights reserved. 13 “GSP” in 1988 ・Gouraud Shading 10M Pixel/sec 30K Polygons/sec ・Flat Shading 160M Pixel/sec ・Lines 1M Lines/sec ・Clock 20MHz ・Technology 1.2μmCMOS ・Transistor Count 130K Transistors ・Chip size 11.5×11.3mm ・Package 144pin Flat Package Copyright © 2009 Toshiba Corporation, All rights reserved. 14 Molecular model image by GSP 5160 Polygons 6.4 frames/Sec 8 bit/pixel 16bit Z Buffer Copyright © 2009 Toshiba Corporation, All rights reserved. 15 First Generation Playstation Source : Wikipedia Copyright © 2009 Toshiba Corporation, All rights reserved. 16 Playstation Shipment History From: http://www.scei.co.jp/corporate/data/ 1000 16000 900 14000 800 12000 700 10000 600 500 8000 400 x10KTotal x10K/Quater 6000 300 4000 200 2000 100 0 0 96/3 97/3 98/3 99/3 00/3 01/3 02/3 03/3 04/3 05/3 06/3 07/3 08/3 PlayStation PlayStation 2 Playstation 3 Playstation Total 30 100 Playstation2 Total Playstation3 Total Copyright © 2009 Toshiba Corporation, All rights reserved. 17 Playstation was very successful, though Original business model was not making money from Hardware but Software license. In reality, could make money even from hardware, mainly because of semiconductor cost down. 3D graphics could get very good reputation. But It’s performance was not good enough yet. Emotion of the characters couldn’t be presented! By considering game console life cycle, hardware performance should be competitive at least for a few years An epoch-making graphic chip was the key for the next generation Embedded DRAM technology based graphics was employed Main processor had to have enough performance correspond to very high performance graphics. Special processor had to be developed Copyright © 2009 Toshiba Corporation, All rights reserved. 18 “Graphics Synthesizer ”(GS) 16.6mm×16.8mm 32Mbit Embedded DRAM 0.25μm 47.7 M transistors Designed by SONY, SCE and Toshiba Fabricated by SONY Copyright © 2009 Toshiba Corporation, All rights reserved. 19 Rendering performance Trend 100,000,000 Game Console Polygon/sec Personal Computer PS2 Graphics Work Station 10,000,000 Dream Cast 1,000,000 N64(?) PlayStation 100,000 1993 1994 1995 1996 1997 1998 1999 Copyright © 2009 Toshiba Corporation, All rights reserved. 20 How Emotion Engine was born? Toshiba could develop and provide the graphics chip for the first generation Playstaion. However, processor chip was provided by US company. Some engineers in Toshiba semiconductor division, began to consider to propose not only graphics but main processor for next generation Playstation, and it was called “Emotion Engine” afterwards. Started to approach to SCEI a few month after first generation Playstation was launched (12/3/1994). SCEI was interested in proposed Geometry Engine architecture, and started a joint technical investigation After main concept of Emotion Engine was accomplished, Toshiba team has started to develop the processor portion at the Silicon Valley office in 1996, before an agreement was done. Copyright © 2009 Toshiba Corporation, All rights reserved. 21 Emotion Engine Die Photo 15.02mm x 15.04mm Frequency : 300MHz Transistors : 13.5M Power : 18Watts Design Rule : 0.25um Gate Length : 0.18um Designed by SCE and Toshiba Fabricated by Toshiba Copyright © 2009 Toshiba Corporation, All rights reserved. 22 Emotion Engine Block Diagram COP2 E 128bit F COP1 VU1 Processor U FPU Core VU0 128 Inst. Data GIF Inst. Data Mem. Mem. to 16KB 16KB SP- Mem. Mem. Rendering I$ D$ 4KB 4KB Engine RAM (GS LSI) VIF0 VIF1 CPU VPU0 VPU1 System Bus 10ch 128-bit Memory I/O IPU DMAC Interface Interface External Memory Peripherals Copyright © 2009 Toshiba Corporation, All rights reserved. 23 Emotion Engine Peak Performance 7 Integer Performance(GIPS) 6 Bus Band width(Gbyte/Sec) Floating Point performance(GFLOPS) 5 4 3 2 1 0 Pentium2(400MHz) Pentium3(600MHz) EE(300MHz) Copyright © 2009 Toshiba Corporation, All rights reserved. 24 Emotion Engine Development History Spring 1997：Joint Development Agreement was done (Schedule was defined) Spring 1998 ：Design Completion has been delayed because of many Bugs of CPU and not enough speed ¾ Had to report Six month delay from the original schedule Spring 1998 ：Reorganize and enhance development team (82 engineers from Toshiba Japan), and Reset the Target date and specification ¾ #1 Design Completion 7/1998 ¾ Chip size=17x14.1mm2 Aug. 1998 ： EE#1 Design completion (8 month Delay) ¾ Relaxation of the target frequency（300MHz=>200MHz) ¾ Agreed to Relax voltage and temperature constraint Oct. 1998 ： Shipped the first sample and SCE started the system evaluation Dec. 31 1998 ： Shipped the software developable revised samples Feb. 1999 ： Presented at the conference（ISSCC）, fair reputation Mar. 1999 ： Next generation Playstation technical overview was presented at PlayStation Meeting 1999, and big impact on all over the world! EE#2 Design completed as scheduled and achieved 300MHz Target EE#3 Shrunken version(0.18um) development has been started Copyright © 2009 Toshiba Corporation, All rights reserved.
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