Microprocessors History of Computing Nouf Assaid
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Mipspro C++ Programmer's Guide
MIPSproTM C++ Programmer’s Guide 007–0704–150 CONTRIBUTORS Rewritten in 2002 by Jean Wilson with engineering support from John Wilkinson and editing support from Susan Wilkening. COPYRIGHT Copyright © 1995, 1999, 2002 - 2003 Silicon Graphics, Inc. All rights reserved; provided portions may be copyright in third parties, as indicated elsewhere herein. No permission is granted to copy, distribute, or create derivative works from the contents of this electronic documentation in any manner, in whole or in part, without the prior written permission of Silicon Graphics, Inc. LIMITED RIGHTS LEGEND The electronic (software) version of this document was developed at private expense; if acquired under an agreement with the USA government or any contractor thereto, it is acquired as "commercial computer software" subject to the provisions of its applicable license agreement, as specified in (a) 48 CFR 12.212 of the FAR; or, if acquired for Department of Defense units, (b) 48 CFR 227-7202 of the DoD FAR Supplement; or sections succeeding thereto. Contractor/manufacturer is Silicon Graphics, Inc., 1600 Amphitheatre Pkwy 2E, Mountain View, CA 94043-1351. TRADEMARKS AND ATTRIBUTIONS Silicon Graphics, SGI, the SGI logo, IRIX, O2, Octane, and Origin are registered trademarks and OpenMP and ProDev are trademarks of Silicon Graphics, Inc. in the United States and/or other countries worldwide. MIPS, MIPS I, MIPS II, MIPS III, MIPS IV, R2000, R3000, R4000, R4400, R4600, R5000, and R8000 are registered or unregistered trademarks and MIPSpro, R10000, R12000, R1400 are trademarks of MIPS Technologies, Inc., used under license by Silicon Graphics, Inc. Portions of this publication may have been derived from the OpenMP Language Application Program Interface Specification. -
Analytical Engine, 1838 ALLAN G
Charles Babbage’s Analytical Engine, 1838 ALLAN G. BROMLEY Charles Babbage commenced work on the design of the Analytical Engine in 1834 following the collapse of the project to build the Difference Engine. His ideas evolved rapidly, and by 1838 most of the important concepts used in his later designs were established. This paper introduces the design of the Analytical Engine as it stood in early 1838, concentrating on the overall functional organization of the mill (or central processing portion) and the methods generally used for the basic arithmetic operations of multiplication, division, and signed addition. The paper describes the working of the mechanisms that Babbage devised for storing, transferring, and adding numbers and how they were organized together by the “microprogrammed” control system; the paper also introduces the facilities provided for user- level programming. The intention of the paper is to show that an automatic computing machine could be built using mechanical devices, and that Babbage’s designs provide both an effective set of basic mechanisms and a workable organization of a complete machine. Categories and Subject Descriptors: K.2 [History of Computing]- C. Babbage, hardware, software General Terms: Design Additional Key Words and Phrases: Analytical Engine 1. Introduction 1838. During this period Babbage appears to have made no attempt to construct the Analytical Engine, Charles Babbage commenced work on the design of but preferred the unfettered intellectual exploration of the Analytical Engine shortly after the collapse in 1833 the concepts he was evolving. of the lo-year project to build the Difference Engine. After 1849 Babbage ceased designing calculating He was at the time 42 years o1d.l devices. -
Historical Perspective and Further Reading 162.E1
2.21 Historical Perspective and Further Reading 162.e1 2.21 Historical Perspective and Further Reading Th is section surveys the history of in struction set architectures over time, and we give a short history of programming languages and compilers. ISAs include accumulator architectures, general-purpose register architectures, stack architectures, and a brief history of ARMv7 and the x86. We also review the controversial subjects of high-level-language computer architectures and reduced instruction set computer architectures. Th e history of programming languages includes Fortran, Lisp, Algol, C, Cobol, Pascal, Simula, Smalltalk, C+ + , and Java, and the history of compilers includes the key milestones and the pioneers who achieved them. Accumulator Architectures Hardware was precious in the earliest stored-program computers. Consequently, computer pioneers could not aff ord the number of registers found in today’s architectures. In fact, these architectures had a single register for arithmetic instructions. Since all operations would accumulate in one register, it was called the accumulator , and this style of instruction set is given the same name. For example, accumulator Archaic EDSAC in 1949 had a single accumulator. term for register. On-line Th e three-operand format of RISC-V suggests that a single register is at least two use of it as a synonym for registers shy of our needs. Having the accumulator as both a source operand and “register” is a fairly reliable indication that the user the destination of the operation fi lls part of the shortfall, but it still leaves us one has been around quite a operand short. Th at fi nal operand is found in memory. -
MIPS IV Instruction Set
MIPS IV Instruction Set Revision 3.2 September, 1995 Charles Price MIPS Technologies, Inc. All Right Reserved RESTRICTED RIGHTS LEGEND Use, duplication, or disclosure of the technical data contained in this document by the Government is subject to restrictions as set forth in subdivision (c) (1) (ii) of the Rights in Technical Data and Computer Software clause at DFARS 52.227-7013 and / or in similar or successor clauses in the FAR, or in the DOD or NASA FAR Supplement. Unpublished rights reserved under the Copyright Laws of the United States. Contractor / manufacturer is MIPS Technologies, Inc., 2011 N. Shoreline Blvd., Mountain View, CA 94039-7311. R2000, R3000, R6000, R4000, R4400, R4200, R8000, R4300 and R10000 are trademarks of MIPS Technologies, Inc. MIPS and R3000 are registered trademarks of MIPS Technologies, Inc. The information in this document is preliminary and subject to change without notice. MIPS Technologies, Inc. (MTI) reserves the right to change any portion of the product described herein to improve function or design. MTI does not assume liability arising out of the application or use of any product or circuit described herein. Information on MIPS products is available electronically: (a) Through the World Wide Web. Point your WWW client to: http://www.mips.com (b) Through ftp from the internet site “sgigate.sgi.com”. Login as “ftp” or “anonymous” and then cd to the directory “pub/doc”. (c) Through an automated FAX service: Inside the USA toll free: (800) 446-6477 (800-IGO-MIPS) Outside the USA: (415) 688-4321 (call from a FAX machine) MIPS Technologies, Inc. -
IDT79R4600 and IDT79R4700 RISC Processor Hardware User's Manual
IDT79R4600™ and IDT79R4700™ RISC Processor Hardware User’s Manual Revision 2.0 April 1995 Integrated Device Technology, Inc. Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any respon- sibility for use of any circuitry described other than the circuitry embodied in an IDT product. ITD makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent, patent rights, or other rights of Integrated Device Technology, Inc. LIFE SUPPORT POLICY Integrated Device Technology’s products are not authorized for use as critical components in life sup- port devices or systems unless a specific written agreement pertaining to such intended use is executed between the manufacturer and an officer of IDT. 1. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accor- dance with instructions for use provided in the labeling, can be reasonably expected to result in a sig- nificant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. -
Appendix A: Microprocessor Data Sheets
Appendix A: Microprocessor Data Sheets Intel8085 Zilog Z80 MOS Technology 6502 Motorola 6809 Microcontrollers (Single-chip Microcomputers) Intel 8086 ( & 80186 & 80286) Zilog Z8000 Motorola 68000 32-bit Microprocessors lnmos Transputer 184 Appendix A 185 Intel 8085 Followed on from the 8080, which was a two-chip equivalent of the 8085. Not used in any home computers, but was extremely popular in early (late 1970s) industrial control systems. A15-A8 A B c D E Same register AD7-ADO H L set is used in SP 8080 PC ALE Flags Multiplexed d ata bus and lower half of address bus (require 8212 to split data and address buses) Start addresses of Interrupt P/Os Service Routines: 8155- 3 ports, 256 bytes RAM RESET-()()()(J 8255 - 3 ports TRAP- 0024 8355 - 2 ports, 2K ROM RST5.5- 002C 8755 - 2 ports, 2K EPROM RST6.5 - ()(J34 RST7.5- <XJ3C INTR - from interrupting device Other 8251- USART 8202 - Dynamic RAM controller support 8253- CTC (3 counters) 8257 - DMA controller devices: 8271 - FDC 8257 - CRT controller Intel DMA Control System Character CPU buses de-multiplexed Video signal to CRT 186 Microcomputer Fault-finding and Design Zilog Z80 Probably the most popular 8-bit microprocessor. Used in home computers (Spectrum, Amstrad, Tandy), office computers and industrial controllers. A F A' F' B c B' C' D E D' E' H L H' L' 8 data Interrupt Memory lines vector I refresh R Index register IX Index register IY (to refresh dynamic RAMI Stack pointer Based on the Intel 8085, but possesses second set of registers. -
Finding a Story for the History of Computing 2018
Repositorium für die Medienwissenschaft Thomas Haigh Finding a Story for the History of Computing 2018 https://doi.org/10.25969/mediarep/3796 Angenommene Version / accepted version Working Paper Empfohlene Zitierung / Suggested Citation: Haigh, Thomas: Finding a Story for the History of Computing. Siegen: Universität Siegen: SFB 1187 Medien der Kooperation 2018 (Working paper series / SFB 1187 Medien der Kooperation 3). DOI: https://doi.org/10.25969/mediarep/3796. Erstmalig hier erschienen / Initial publication here: https://nbn-resolving.org/urn:nbn:de:hbz:467-13377 Nutzungsbedingungen: Terms of use: Dieser Text wird unter einer Creative Commons - This document is made available under a creative commons - Namensnennung - Nicht kommerziell - Keine Bearbeitungen 4.0/ Attribution - Non Commercial - No Derivatives 4.0/ License. For Lizenz zur Verfügung gestellt. Nähere Auskünfte zu dieser Lizenz more information see: finden Sie hier: https://creativecommons.org/licenses/by-nc-nd/4.0/ https://creativecommons.org/licenses/by-nc-nd/4.0/ Finding a Story for the History of Computing Thomas Haigh University of Wisconsin — Milwaukee & University of Siegen WORKING PAPER SERIES | NO. 3 | JULY 2018 Collaborative Research Center 1187 Media of Cooperation Sonderforschungsbereich 1187 Medien der Kooperation Working Paper Series Collaborative Research Center 1187 Media of Cooperation Print-ISSN 2567 – 2509 Online-ISSN 2567 – 2517 URN urn :nbn :de :hbz :467 – 13377 This work is licensed under the Creative Publication of the series is funded by the German Re- Commons Attribution-NonCommercial- search Foundation (DFG). No Derivatives 4.0 International License. The Arpanet Logical Map, February, 1978 on the titl e This Working Paper Series is edited by the Collabora- page is taken from: Bradley Fidler and Morgan Currie, tive Research Center Media of Cooperation and serves “Infrastructure, Representation, and Historiography as a platform to circulate work in progress or preprints in BBN’s Arpanet Maps”, IEEE Annals of the History of in order to encourage the exchange of ideas. -
Milestones in Analog and Digital Computing
Milestones in Analog and Digital Computing Contributions to the History of Mathematics and Information Technology by Herbert Bruderer Numerous recent discoveries of rare historical analog and digital calculators and previously unknown texts, drawings, and pictures from Germany, Austria, Switzerland, Liechtenstein, and France. Worldwide, multilingual bibliography regarding the history of computer science with over 3000 entries. 12 step-by-step set of instructions for the operation of historical analog and digital calculating devices. 75 comparative overviews in tabular form. 200 illustrations. 20 comprehensive lists. 7 timelines of computer history. Published by de Gruyter Oldenbourg. Berlin/Boston 2015, xxxii, 820 pages, 119.95 Euro. During the 1970's mechanical calculating instruments and machines suddenly disappeared from the scene. They were replaced by electronic versions. Most of these devices developed since the 17th century – often very clever constructions – have been forgotten. Who can imagine today how difficult calculation was only a few decades ago? This book introduces the reader to selected milestones from prehistory and early history of computing. The Antikythera Mechanism This puzzling device was made around 200 BC. It was discovered around 1900 by divers off the Greek island of Antikythera. It is believed to be the oldest known analog (or rather hybrid) computing device. Numerous replicas have been built to unravel the mysteries of this calendar calculator. It is suspected that the machine came from the school of Archimedes. 1 Androids, Music Boxes, Chess Automatons, Looms This treatise also explores topics related to computing technology: automated human and animal figures, mecha- nized musical instruments, music boxes, as well as punched tape controlled looms and typewriters. -
On the Efficacy of Source Code Optimizations for Cache-Based Systems
On the efficacy of source code optimizations for cache-based systems Rob F. Van der Wijngaart, MRJ Technology Solutions, NASA Ames Research Center, Moffett Field, CA 94035 William C. Saphir, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 Abstract. Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize tem- poral and spatial locality of memory references by reusing data. and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive im- pact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates--as reported by a cache simulation tool, and con- firmed by hardware counters--only partially explain the results. By contrast, the compiler- generated assembly code provides more insight by revealing the importance of processor- specific instructions and of compiler maturity, both of which strongly, and sometimes unex- pectedly, influence performance. -
The History of Computing in the History of Technology
The History of Computing in the History of Technology Michael S. Mahoney Program in History of Science Princeton University, Princeton, NJ (Annals of the History of Computing 10(1988), 113-125) After surveying the current state of the literature in the history of computing, this paper discusses some of the major issues addressed by recent work in the history of technology. It suggests aspects of the development of computing which are pertinent to those issues and hence for which that recent work could provide models of historical analysis. As a new scientific technology with unique features, computing in turn can provide new perspectives on the history of technology. Introduction record-keeping by a new industry of data processing. As a primary vehicle of Since World War II 'information' has emerged communication over both space and t ime, it as a fundamental scientific and technological has come to form the core of modern concept applied to phenomena ranging from information technolo gy. What the black holes to DNA, from the organization of English-speaking world refers to as "computer cells to the processes of human thought, and science" is known to the rest of western from the management of corporations to the Europe as informatique (or Informatik or allocation of global resources. In addition to informatica). Much of the concern over reshaping established disciplines, it has information as a commodity and as a natural stimulated the formation of a panoply of new resource derives from the computer and from subjects and areas of inquiry concerned with computer-based communications technolo gy. -
Introduction to Cpu
microprocessors and microcontrollers - sadri 1 INTRODUCTION TO CPU Mohammad Sadegh Sadri Session 2 Microprocessor Course Isfahan University of Technology Sep., Oct., 2010 microprocessors and microcontrollers - sadri 2 Agenda • Review of the first session • A tour of silicon world! • Basic definition of CPU • Von Neumann Architecture • Example: Basic ARM7 Architecture • A brief detailed explanation of ARM7 Architecture • Hardvard Architecture • Example: TMS320C25 DSP microprocessors and microcontrollers - sadri 3 Agenda (2) • History of CPUs • 4004 • TMS1000 • 8080 • Z80 • Am2901 • 8051 • PIC16 microprocessors and microcontrollers - sadri 4 Von Neumann Architecture • Same Memory • Program • Data • Single Bus microprocessors and microcontrollers - sadri 5 Sample : ARM7T CPU microprocessors and microcontrollers - sadri 6 Harvard Architecture • Separate memories for program and data microprocessors and microcontrollers - sadri 7 TMS320C25 DSP microprocessors and microcontrollers - sadri 8 Silicon Market Revenue Rank Rank Country of 2009/2008 Company (million Market share 2009 2008 origin changes $ USD) Intel 11 USA 32 410 -4.0% 14.1% Corporation Samsung 22 South Korea 17 496 +3.5% 7.6% Electronics Toshiba 33Semiconduc Japan 10 319 -6.9% 4.5% tors Texas 44 USA 9 617 -12.6% 4.2% Instruments STMicroelec 55 FranceItaly 8 510 -17.6% 3.7% tronics 68Qualcomm USA 6 409 -1.1% 2.8% 79Hynix South Korea 6 246 +3.7% 2.7% 812AMD USA 5 207 -4.6% 2.3% Renesas 96 Japan 5 153 -26.6% 2.2% Technology 10 7 Sony Japan 4 468 -35.7% 1.9% microprocessors and microcontrollers -
Implications of Historical Trends in the Electrical Efficiency of Computing
[3B2-9] man2011030046.3d 29/7/011 10:35 Page 46 Implications of Historical Trends in the Electrical Efficiency of Computing Jonathan G. Koomey Stanford University Stephen Berard Microsoft Marla Sanchez Carnegie Mellon University Henry Wong Intel The electrical efficiency of computation has doubled roughly every year and a half for more than six decades, a pace of change compa- rable to that for computer performance and electrical efficiency in the microprocessor era. These efficiency improvements enabled the cre- ation of laptops, smart phones, wireless sensors, and other mobile computing devices, with many more such innovations yet to come. Valentine’s day 1946 was a pivotal date in trends in chip production.2 (It has also some- human history. It was on that day that the times served as a benchmark for progress in US War Department formally announced chip design, which we discuss more later on the existence of the Electronic Numerical in this article.) As Gordon Moore put it in Integrator and Computer (ENIAC).1 ENIAC’s his original article, ‘‘The complexity [of inte- computational engine had no moving parts grated circuits] for minimum component and used electrical pulses for its logical oper- costs has increased at a rate of roughly a fac- ations. Earlier computing devices relied on tor of two per year,’’3 where complexity is mechanical relays and possessed computa- defined as the number of components (not tional speeds three orders of magnitude just transistors) per chip. slower than ENIAC. The original statement of Moore’s law has Moving electrons is inherently faster than been modified over the years in several differ- moving atoms, and shifting to electronic digital ent ways, as previous research has estab- computing began a march toward ever-greater lished.4,5 The trend, as Moore initially defined and cheaper computational power that contin- it, relates to the minimum component costs ues even to this day.