Application Note AN-1067

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Application Note AN-1067 Application Note AN-1067 Design Considerations When Using Radiation- Hardened Small Signal Logic Level MOSFETs Table of Contents Page Introduction ...........................................................................................................1 Acronyms..............................................................................................................1 Maximum Rating and Electrical Characteristics....................................................2 Design Considerations..........................................................................................3 Temperature Effects .............................................................................................4 Radiation Performance .........................................................................................5 Output Transfer.....................................................................................................9 Switching Time....................................................................................................11 Design and Performance Benefits ......................................................................13 Lower Gate Drive and Power Requirements.......................................................13 Low Saturation Voltage.......................................................................................14 Faster Switching .................................................................................................14 Radiation Performance Test Report....................................................................15 Driving from Logic Gates and Linear Circuit Drives ............................................15 Conclusions ........................................................................................................22 Acknowledgements/References..........................................................................23 Balancing requirements when selecting materials and practices for production facilities is not an easy task. This application note provides more background information on thermal cycling and the potential impact of underfill, lead-free solder, insulated metal substrates (IMS) and conformal coatings when using MOSFETs in the DirectFET™ package. APPLICATION NOTE AN-1067 International Rectifier • 233 Kansas Street El Segundo CA 90245 USA Design Considerations When Using Radiation-Hardened Small Signal Logic Level MOSFETs By Tiva Bussarakons Introduction: Radiation hardened power MOSFETs have been used in space applications for many years. However, bipolar transistors have been the only design solutions for small signal and low power applications until recently. International Rectifier has just introduced its 4th generation radiation hardened MOSFET targeted for space design applications. The first of the series is a complimentary pair of low power N and P channel devices. They are designed for general-purpose, low power switching applications. With their low gate threshold voltage of sub 2V, these devices can be driven directly by standard logic gates, linear circuit devices, micro- controllers, or by most devices operating with a voltage source of approximately 3.3-5V with a very low energy requirement. For many design applications, these devices offer distinct performance benefits and simplify circuit designs typical of the industry’s standard logic level MOSFETs. In some applications they may directly replace the popular bipolar transistors 2N2222A and 2N2907A with little or no modification to the existing circuit designs and board layout as they are housed in the same surface-mount style package UB (3 LCC). The products are designed and fully characterized for use in commercial and military radiation design applications. Acronyms: A Amperes CTR Current Transfer Ratio BJT Bipolar Junction Transistor EOL End of life BVDSS Drain to source voltage breakdown fsw Switching frequency BVGSS Gate to source voltage breakdown gfs Transconductance Cdg Gate to drain capacitance ID Maximum drain current - continuous Cds Drain to source capacitance IDM Maximum drain current – pulsed Cgs Gate to source capacitance IDSS Drain to source leakage current Ciss Input capacitance IGSS Gate to source leakage current Coss Output capacitance Isink Sink current Crss Reverse transfer capacitance Isource Source current www.irf.com 1 AN1067 LET Linear Energy Transfer TID Total Ionizing Dose MOSFET Metal Oxide Substrate Field Effect Transistor Tj Junction temperature PD Power dissipation tr Rise time QCI Quality Conformance Inspection V Volts QG Total gate charge VCE(sat) Saturation voltage RDS(on) Drain to source on-resistance VDS(on) Drain to source on-voltage SEE Single Event Effect VGS(th) Gate threshold voltage SOA Safe Operating Area VOH High-level output voltage, TTL logic gate td(off) Turn-off delay time VOL Low-level output voltage, TTL logic gate td(on) Turn-on delay time VSD Source to drain body diode voltage tf Fall time W Watts Maximum Rating and Electrical Characteristics: The first of the series are low power devices housed in the 3-terminal UB LCC (leadless chip carrier) surface mount package. The part numbers are IRHLUB770Z4 and IRHLUB7970Z4 for N and P channels, respectively. These devices are also available in a TO-39 package and in die form. The die dimensions are.040”L x .040”W x 0.008”H. Some of the absolute maximum ratings and electrical characteristics are shown in Table 1 and 2, respectively. The current ratings increase with the TO-39 package. Please note that most of the electrical characteristics shown in the data sheet are for Tj of 25ºC. Normalized performance of key parameters under extreme temperatures can be found in the subsequent paragraphs. N-Channel P-Channel Parameter Symbol Unit UB TO-39 UB TO-39 Drain to Source BVDSS 60 60 -60 -60 V Breakdown Voltage Drain Current-Continuous ID 0.8 1.6 -0.53 -1.6 A Drain Current - Pulsed IDM 3.2 6.4 -2.12 -6.4 A Maximum Power PD 0.6 5 0.6 5 W Dissipation @25ºC Gate to Source Voltage BVGSS ±10 ±10 ±10 ±10 V Table 1 – Absolute Maximum Ratings 2 www.irf.com AN1067 N-Channel P-Channel Parameter Symbol Unit UB TO-39 UB TO-39 On-Resistance RDS(on) 0.55* 0.5* 1.2* 1.2* Ohms Gate Threshold Voltage VGS(th) 1 to 2 1 to 2 -1 to -2 -1 to -2 V Total Gate Charge QG 3.6 3.6 3.6 4 nC Turn-on Delay time td(on) 8 8 18 18 ns Rise Time tr 10 20 20 20 ns Turn-off Delay Time td(off) 26 20 15 15 ns Fall Time tf 10 15 25 25 ns * At the rated ID Table 2 – Electrical Characteristics at Tj = 25ºC Design Considerations: The radiation hardened logic level MOSFETs have performance characteristics over the temperature range and radiation environments similar to IR’s standard radiation hardened power MOSFET generations 2 (R5) and 3 (R6). The only notable difference is the gate threshold voltage, VGS(th) and the power handling capa- bility. These new devices have a lower gate threshold voltage of 1-2V as compared to 2-4V or 2.5-4.5V for the previous generations. While this feature requires lower gate drive voltage levels, the devices are more susceptible to spurious turn-on due to noise. Circuit layout and circuit noise management become one of the key design considerations. The BVGSS rating is also lower, ±10V for these new devices as compared to ±20V for the previous generations. These devices are well characterized under extreme temperatures and radiation environments. Test data and test reports are readily available. The shifts in key performance param- eters are included in this note. Designers should account for the shifts in parameters that may be critical to their design applications. The subsequent paragraphs are discussions of the effects that the tem- perature and radiation environments have on key parameters. These effects are also summarized in Table 3. All other design considerations for the standard MOSFETs apply when designing with these new devices. Refer to the referenced IR application notes for details. www.irf.com 3 AN1067 Temperature Effects: As with most semiconductors, temperature has some effect on the power and current rating of these transis- tors. Please refer to the corresponding data sheets of the devices and packages for parameter de-rating. Temperature has negligible effect on BVDSS, BVGSS, QG, and switching time. It has considerable effect on IDSS, IGSS, VGS(th), gfs, and RDS(on). However, the only parameters that may have a significant impact on most circuit designs are VGS(th) and RDS(on). These parameters are discussed below. VGS(th) - Temperature has a direct effect on the threshold voltage. The threshold voltage decreases with increasing temperature and increases with decreasing temperature. The magnitude of this temperature coef- ficient is inherent in the design and process used in the manufacture of these devices. The temperature coefficient of VGS(th) for these devices is approximately -.003V/ºC. Figures 1 and 2 are normalized VGS(th) with respect to temperature for N and P channel devices, respectively. 1.2 1.2 (th) 1.1 (th) 1.1 GS GS 1 1 0.9 0.9 0.8 0.8 Normalized V Normalized V 0.7 0.7 -55C +25C +125C -55C +25C +125C Junction Temperature, Deg C Junction Temperature, Deg C Figure 1 - Normalized VGS(th) vs. Figure 2 - Normalized VGS(th) vs. Temperature N Channel Temperature P Channel 4 www.irf.com AN1067 RDS(on) - The RDS(on) has a positive temperature coefficient because it is dependent on the silicon carrier mobility. The mobility decreases with temperature because there is more scattering by phonons at higher temperatures. This is mostly the issue in the lightly doped epi. In the source and
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