Advanced Stepper Lithography Technology to Enable Flexible AMOLED Displays

Total Page:16

File Type:pdf, Size:1020Kb

Advanced Stepper Lithography Technology to Enable Flexible AMOLED Displays Advanced Stepper Lithography Technology to Enable Flexible AMOLED Displays Keith Best Roger McCleary Elvino M da Silveira 5/19/17 Agenda • About Rudolph • JetStep® G System overview and performance • Display Market Trends - Migration to Flex • Flexible Display Lithography Challenges • Results • Conclusion 2 Process Solutions Across the Semiconductor Industry INSPECT MEASURE Macro Defects Silicon to Die On Product and In-die Dicing and Chipping Detection Multi-layer Film Stacks Interconnect Metrology UBM, RDL, PR, PI, Dielectrics 3D/2D Inspection Structure CD Residue Detection CORE COMPETENCIES IMAGE ANALYZE Lithography resolution ≤1.5µm Process Analysis Active Matrix Display Backplanes Process Control Fan-out and Cu Pillar Tool-centric and Fabwide Wafer and Panel FRONT-END BACK-END SILICON RUDOLPH SOLUTIONS APPLY ACROSS THE SEMICONDUCTOR VALUE CHAIN TEST 3 Lithography Experience Spanning >25 Years PanelPrinter Gen 6 High 9200 (G4.5) Resolution FPD PanelPrinter 5200HR PanelPrinter (G2.5) PanelPrinter JetStep W AP 5200 (G2) 6700 (G3.5) Wafer System JetStep S AP Panel System 1988 1992 1996 2000 2004 2008 2012 2016 2019 8010 GHI 8009 Lens G Lens 6218 GHI 8410 GHI Variable NA Lens 16001 Iline Lens Lens 8015GT Lens Godzilla Lens 4 Rudolph Lithography Family Advanced Packaging Display Lithography Systems Lithography Systems JetStep G Series JetStep W2300 JetStep S3500 JetStep G35 JetStep G45 (wafers) (panels) Resolution in µm 2.5 1.5 Field Size Ø in mm 80 200 Substrate size Gen 2 to 3.5 Gen 4.5 Specifically designed for mobile display and pilot production 5 Display Market Trends Changes Driven by Electronics Everywhere AMOLED displays are key differentiation and wearable enabler Panel makers are aggressively investing in flexible AMOLED to meet demand Bendable Foldable Rollable 6 Trends Driving Changes in Lithography AUTOMATION Lithography systems need to process G5 & 6 highly compliant substrate with warp PIXEL CREATION AMLCD Color Filter OLED Front Plane SUBSTRATE Glass PI on Glass up to Gen 5 & 6 DISPLAY PRODUCTS Rigid Curved Bendable Foldable Rollable NOW 2018 2019 2020 2021 Mobile/ Tablets END MARKET VR AR Automotive Wearables PPI 440 >500 800 1000 2000 TRANSISTOR TECH TFT LTPS LTPS with OLED LITHO 0.5µm Overlay-1.5µm 0.35µm Overlay - 1.35µm 0.25µm Overlay – 1.0µm Resolution PERFORMANCE Resolution Resolution Compiled by Simax Asia Pacific Limited May 2017 7 A Path to Flex Substrate Lithography Scaling to R2R Scaling Addressing dimensional Addressing handling and Instability JetStep G35 topography Variations Stage to accommodate R2R to support an 8” web an 8” Web Overcoming Flex Manufacturing Challenges 8 Addressing Topography Challenges On-the-fly auto focus • Allows lens to follow wafer contours • Addresses the challenges of imaging on warped substrates • Capability to measure and monitor wafer topography 9 Imaging on Thin Substrates Photoresist: DOW SPR955CM, 1.4µm FT on Si. Dose: 300 mJ Focus = 0 um Focus = +2 um Focus = +4 um Focus = -2 um Focus = +6 um 1.25 µm thru Focus, ≥ 8.0 µm DOF 10 Flexible Substrates Distortion Characteristics Compaction and Expansion • Environment Induced • Temperature Effects: ~2um over 100mm field per degree C • Relative Humidity Effects: ~ 1um over 100mm field per % change in RH • Mechanical Induced Strain • Substrate Tension Variations in the Web line • Process Induced Distortion Substrate No Substrate Distortion Distortion Good Overlay Poor Overlay Layer 1 Layer 2 Layer 1 Layer 2 11 Grid Measurement Front and backside alignment • Integrated with JetStep alignment system • Dual Head Off-axis alignment microscopes Optional IR • Real time auto-focus Visible Microscope Microscope • Entire wafer area accessible for alignment Visible scope IR scope Objective 10X 5X Wavelength 500-700nm 500-1050nm* Field of View 1.35 x 1.35 2.7 x 2.7 mm Resolved Feature Size 0.9 µm 5.3 µm DOF 4.4 µm 200 µm Align Precision (3σ) 0.15 µm 0.24 µm *Longer Wavelength Option Available Embedded IR Alignment Target Visible Top-side Alignment Target 12 Compensation Method • 6 DOF Reticle chuck compensation • Up to 400PPM Compensation • Minimize field distortion • Mag, Trap, and Local position displacements X 1, X 2,Y 1 X ,Y, Z 1, Z 2, Z 3 Z,x,y 13 Overlay on Thin Substrates Product B, Layer C, Overlay X (1x Stepper to 2x Stepper) Product B, Layer C, Overlay Y (1x Stepper to 2x Stepper) 1.5 1.5 1 1 0.5 0.5 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 -0.5 -0.5 -1 -1 -1.5 -1.5 X Overlay Y Overlay 250 250 200 200 150 150 100 100 Frequency 50 Frequency 50 0 0 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 Microns Microns Production Overlay Results – 28 Consecutive Substrates 14 Rudolph Flexible Lithography Systems . Gen 2.5 Lithography System . Flexible Lithography Sheets . Custom Flexible Display Manufacturing and Research Photo source: ASU monthly magazine Delivering Enabling Capabilities 15 Rudolph R2R Lithography Systems . 6600 Gen 3 R2R Lithography System . New highly improved R2R . Process development research Solution Through Collaboration 16 Functioning Flexible Displays Flex Map Conformal Display Concept Conformal Display Working with World Leading Researches to Turn Concepts in Reality Sources: Arizona State University (ASU) US Army Flexible Display Center & ASU Magazine, September 2013 volume 17 number 1 17 Beyond AMOLED Development results in technology to open new possibilities IP DEVELOPED ADVANCED OLED MOBILE Flexible DISPLAYS PACKAGING TWO CAMERA CU-PILLAR, C4, PCB LARGE FIELD LENS G6 FPD NEXT GEN FPD HR, HIGH THROUGHPUT & LOW COO HR, AP, PANEL STITCHING 18 Photolithography for flexible displays High Fidelity Imaging for Critical Layers 1.5um L/S resolution Overlay Through Active Compensation Real-time compensation while maintaining best focus Addressing the Real World Challenges of Display Manufacturing on Flexible Substrates 19 Thank You! [email protected] www.rudolphtech.com.
Recommended publications
  • China's Progress in Semiconductor Manufacturing Equipment
    MARCH 2021 China’s Progress in Semiconductor Manufacturing Equipment Accelerants and Policy Implications CSET Policy Brief AUTHORS Will Hunt Saif M. Khan Dahlia Peterson Executive Summary China has a chip problem. It depends entirely on the United States and U.S. allies for access to advanced commercial semiconductors, which underpin all modern technologies, from smartphones to fighter jets to artificial intelligence. China’s current chip dependence allows the United States and its allies to control the export of advanced chips to Chinese state and private actors whose activities threaten human rights and international security. Chip dependence is also expensive: China currently depends on imports for most of the chips it consumes. China has therefore prioritized indigenizing advanced semiconductor manufacturing equipment (SME), which chip factories require to make leading-edge chips. But indigenizing advanced SME will be hard since Chinese firms have serious weaknesses in almost all SME sub-sectors, especially photolithography, metrology, and inspection. Meanwhile, the top global SME firms—based in the United States, Japan, and the Netherlands—enjoy wide moats of intellectual property and world- class teams of engineers, making it exceptionally difficult for newcomers to the SME industry to catch up to the leading edge. But for a country with China’s resources and political will, catching up in SME is not impossible. Whether China manages to close this gap will depend on its access to five technological accelerants: 1. Equipment components. Building advanced SME often requires access to a range of complex components, which SME firms often buy from third party suppliers and then assemble into finished SME.
    [Show full text]
  • Annual Report 2004
    Annual Report 2004 Annual Report 2004 Contents 4 About ASML 5 ASML Corporate Achievements 2004 7 Message to Our Shareholders 10 Report of the Supervisory Board 17 Corporate Governance 34 Information and Investor Relations 35 ASML Worldwide Contact Information 37 Form 20-F In this report the expression “ASML” is sometimes used for convenience in contexts where reference is made to ASML Holding N.V. and/or any of its subsidiaries in general. The expression is also used where no useful purpose is served by identifying the particular company or companies. “Safe Harbor” Statement under the U.S. Private Securities Litigation Reform Act of 1995: the matters discussed in this document may include forward-looking statements that are subject to risks and uncertainties including, but not limited to, economic conditions, product demand and semiconductor equipment industry capacity, worldwide demand and manufacturing capacity utilization for semiconductors (the principal product of our customer base), competitive products and pricing, manufacturing efficiencies, new product development, ability to enforce patents, the outcome of intellectual property litigation, availability of raw materials and critical manufacturing equipment, trade environment, and other risks indicated in ASML’s Annual Report on Form 20-F and other filings with the U.S. Securities and Exchange Commission. © 2005, ASML Holding N.V. All Rights Reserved About ASML ASML is the world’s leading provider of lithography advanced scanners, enabling the delivery of complete systems for the semiconductor industry, manufacturing and integrated mask design to wafer imaging solutions. complex machines critical to the production of integrated circuits or chips. ASML Optics provides precision optical modules for the PAS 5500 and TWINSCAN lithography systems.
    [Show full text]
  • Patent Dispute Settlement; Financial Results Forecast Revision
    September 29, 2004 Patent Dispute Settlement; Financial Results Forecast Revision On September 28, 2004 (Japan time), Nikon Corporation (Nikon), ASML Holding N.V. (ASML) and Carl Zeiss SMT AG (SMT) signed a Memorandum of Understanding which provides for a comprehensive settlement of legal proceedings and cross- license of patents between Nikon, ASML and SMT. Accordingly, we have revised the forecast of Financial Results for the Year ending March2005 (April 1, 2004 – March 31, 2005) that was issued on May 10, 2004 (refer to item 4 in this document for a detailed breakdown). 1. Details regarding disputes (prior to settlement) The major events in the disputes between Nikon (and subsidiaries) and ASML (and subsidiaries/affiliates) are as outlined below. On December 21, 2001, Nikon filed a complaint against ASML with the U.S. International Trade Commission (ITC) requesting an exclusion order to prevent any further importation by ASML of infringing stepper and scanner equipment (used in manufacture of semiconductor devices) in the U.S. Since the ITC denied Nikon’s request, Nikon appealed to the Court of Appeals for the Federal Circuit (CAFC) on May 12, 2003. Nikon also pursued patent infringement cases against ASML with the Federal District Court for the Northern District of California (NDCA), with the Tokyo District Court and in Korea as well. As a result of several settlement discussions, Nikon basically agreed to settle the case since it concluded that its goal has been accomplished in principle. The NDCA allowed SMT to join in the case, and therefore, they are party to the Memorandum of Understanding.
    [Show full text]
  • New Approaches in Optical Lithography Technology for Subwavelength Resolution
    Rochester Institute of Technology RIT Scholar Works Theses 5-2005 New approaches in optical lithography technology for subwavelength resolution Hoyoung Kang Follow this and additional works at: https://scholarworks.rit.edu/theses Recommended Citation Kang, Hoyoung, "New approaches in optical lithography technology for subwavelength resolution" (2005). Thesis. Rochester Institute of Technology. Accessed from This Dissertation is brought to you for free and open access by RIT Scholar Works. It has been accepted for inclusion in Theses by an authorized administrator of RIT Scholar Works. For more information, please contact [email protected]. NEW APPROACHES IN OPTICAL LITHOGRAPHY TECHNOLOGY FOR SUBW A VELENGTH RESOLUTION by Hoyoung Kang M.S. Hanyang University (1987) A dissertation submitted in partial fulfillment of the requirements for the degree of Ph.D. in the Chester F. Carson Center for Imaging Science of the College of Science Rochester Institute of Technology May 2005 Author HoyoungKang Hoyoung Kang . Accepted by CHESTER F. CARLSON CENTER FOR IMAGING SCIENCE COLLEGE OF SCIENCE ROCHESTER INSTITUTE OF TECHNOLOGY ROCHESTER, NEW YORK CERTIFICATE OF APPROVAL Ph. D. DEGREE DISSERTATION The Ph.D. Degree Dissertation of Hoyoung Kang has been examined and approved by the dissertation committee as satisfactory for the dissertation requirement for the Ph.D. degree in Imaging Science Bruce W. Smith Dr. Bruce W. Smith, Thesis Advisor Zoran Ninkov Dr. Zoran Ninkov M. Kotlarchyk Dr. Michael Kotlarchyk Paul Michaloski Paul Michaloski, Date Thesis/Dissertation Author Permission Statement Title of thesis or dissertation: ________________---;- ____ N eu.l I'>.pproecb 1'0 OptIc 0..0 (!'t-b03k=A.phJ Te.cb'Y>C)lo~ y Nrumeofauthor: ____H_D~y~o_U_~ __ ~~ __~~~~~~~~ ___________~ ____ Degree: ph.
    [Show full text]
  • Lithography Reading: Jaeger, Chap
    EE143 – Fall 2016 Microfabrication Technologies Lecture 3: Lithography Reading: Jaeger, Chap. 2 Prof. Ming C. Wu [email protected] 511 Sutardja Dai Hall (SDH) 1-1 The lithographic process 1-2 1 Photolithographic Process (a) Substrate covered with silicon dioxide barrier layer (b) Positive photoresist applied to wafer surface (c) Mask in close proximity to surface (d) Substrate following resist exposure and development (e) Substrate after etching of oxide layer (f) Oxide barrier on surface after resist removal (g) View of substrate with silicon dioxide pattern on the surface 1-3 Photomasks - CAD Layout • Composite drawing of the masks for a simple integrated circuit using a four-mask process • Drawn with computer layout system • Complex state-of-the- art CMOS processes may use 25 masks or more 1-4 2 Photo Masks • Example of 10X reticle for the metal mask - this particular mask is ten times final size (10 µm minimum feature size - huge!) • Used in step-and-repeat operation • One mask for each lithography level in process 1-5 Lithographic Process 1-6 3 Printing Techniques Contact Proximity Projection • Contact printing printing printing printing damages the mask and the wafer and limits the number of times the mask can be used • Proximity printing eliminates damage • Projection printing can operate in reduction mode with direct step- on-wafer 1-7 Contact Printing hv Photo photoresist Mask Plate wafer Resolution R < 0.5µm mask plate is easily damaged or accumulates defects 1-8 4 Proximity Printing Light g ~ 20µm Photoresist Wafer Exposed Resolution � ∝ & �� �: wavelength of the light source �: g ~ 1µm for visible photons, much smaller for X-ray lithography 1-9 Projection Printing hv De-Magnification: nX 10X stepper 4X stepper lens 1X stepper focal plane P.R .
    [Show full text]
  • Laser-Plasma Sources for Extreme-Ultraviolet Lithography
    Laser-Plasma Sources for Extreme-Ultraviolet Lithography BJÖRN A. M. HANSSON Doctoral Thesis Stockholm, Sweden 2003 TRITA FYS 2003-56 ISSN 0280-316X KTH ISRN KTH/FYS/--03:56--SE SE-100 44 Stockholm ISBN 91-7283-658-X SWEDEN Akademisk avhandling som med tillstånd av Kungl Tekniska högskolan framlägges till offentlig granskning för avläggande av teknologie doktorsexamen fredagen den 19 december 2003 kl. 10.00 i Kollegiesalen, Administrationsbyggnaden, Kungl Tekniska högskolan, Valhallavägen 79, Stockholm. °c Björn A. M. Hansson, november 2003 Tryck: Universitetsservice US AB iii Abstract This thesis describes the development and characterization of a liquid- xenon-jet laser-plasma source for extreme-ultraviolet (EUV) radiation. It is shown how this source may be suitable for production-scale EUV lithography (EUVL). EUVL is one of the main candidates to succeed deep-ultraviolet (DUV) lithography for large-scale manufacturing of integrated circuits (IC). However, a major obstacle towards the realization of EUVL is the current unavailability of a source meeting the tough requirements on especially power and clean- liness for operation in an EUVL stepper. The liquid-xenon-jet laser-plasma concept has key advantages that may make it suitable for EUVL since, e.g., its plasma consists only of the inert noble gas xenon and since the liquid- jet target technology enables plasma operation at large distances from the source-hardware thereby reducing sputtering and to allowing for high-power operation. At the beginning of the work described in this thesis, a spatial insta- bility of the liquid-xenon-jet made stable operation of a plasma at practical distances from the nozzle orifice difficult.
    [Show full text]
  • Chapter 6 Future 422626 ASML 29-10-2004 10:16 Pagina 180
    422626_ASML 29-10-2004 10:16 Pagina 179 Chapter 6 Future 422626_ASML 29-10-2004 10:16 Pagina 180 Technology Twenty years of progress Looking to the future Ever since we produced our first PAS Following the logic that caused us to 2500 stepper in 1986, we have been explore the use of light with increasingly pushing optical lithography forward at shorter wavelengths, we also experimented a rapid pace. We have brought the with F2 (fluorine) DUV, which has a wave- line-width level down from 0.9 microns length of 157 nm. But this effort ran into to 0.065 microns (900 nm to 65 nm). two main problems. Not only were we We have seen the wavelength of the unable to find a suitable photoresist, we light used in our machines drop from were also confronted with the problem 436 nm to 193 nm. And we have that light of such short wavelength begins improved the number of good wafers to be absorbed by the glass lenses that per unit of time. are supposed to focus it — a problem that could only be overcome through a The question now is: What next? The radical redesign of the equipment. answer will affect more than just ASML. The entire semiconductor industry, and At the other end of the scale, we have indeed the world, has become also explored extending the use of accustomed to the relentless pace of electron beam lithography. Already used progress that the microlithography industry in creating masks, electron beams have a has set. But can it be maintained? very high resolution (0.1 microns and below).
    [Show full text]
  • Inverse Lithography (ILT) Input = Design, Output = Mask + Source
    EUV: The Computational Landscape Vivek Singh Intel Fellow Director, Computational Lithography Technology Manufacturing Group Intel Corporation EUVL Workshop, 2014 Outline What the world wants (hint: 3D transistors) Lithography: Choices for 14 nm and 10 nm – Inverse lithography and SMO – “Double” patterning – EUV lithography Computational techniques for EUV – Flare – Shadowing – Out of band radiation V. Singh EUVL Workshop, 2014 2 Outline What the world wants (hint: 3D transistors) Lithography: Choices for 14 nm and 10 nm – Inverse lithography and SMO – “Double” patterning – EUV lithography Computational techniques for EUV – Flare – Shadowing – Out of band radiation V. Singh EUVL Workshop, 2014 3 The World Ahead Connecting People to a World of Opportunity Access Connectivity Education Healthcare Making Extending Transforming Delivering Technology Broadband Education To Innovative Available To Connections Improve Teaching Healthcare More People And Learning Solutions V. Singh EUVL Workshop, 2014 4 Needs a Continuum of Personal Computing Experiences Desktops Laptops Ultrabook™ Tablets Smartphones Intelligent Systems V. Singh EUVL Workshop, 2014 5 And that needs leading edge technology Every new node: more performance on more features at lower power 65nm 45nm 32nm 22nm 1x 0.1x 0.01x Lower Lower Transistor Leakage 0.001x * projected Higher Transistor Performance (Switching Speed) Source: Intel V. Singh EUVL Workshop, 2014 6 Such as… 3D transistors! Intel 22nm technology introduces revolutionary 3-D Tri-Gate transistors V. Singh EUVL Workshop,
    [Show full text]
  • The New, New Limits of Optical Lithography
    Copyright 2004 by the Society of Photo-Optical Instrumentation Engineers. This paper was published in the proceedings of Emerging Lithographic Technologies VIII, SPIE Vol. 5374, pp. 1-8. It is made available as an electronic reprint with permission of SPIE. One print or electronic copy may be made for personal use only. Systematic or multiple reproduction, distribution to multiple locations via electronic or other means, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper are prohibited. The New, New Limits of Optical Lithography Chris A. Mack*, KLA-Tencor ABSTRACT The end of optical lithography has been so often predicted (incorrectly) that such predictions are now a running joke among lithographers. Yet optical lithography does have real, physical limitations and even more real economic limits, and an accurate estimation of these limits is essential for planning potential next generation lithography (NGL) efforts. This paper will review the two types of resolution limits in optical lithography: the pitch resolution, governed by the amount of spatial frequency information that can pass through an imaging lens, and the feature size resolution, limited by our ability to control feature size. Projecting the trends in these resolution limits, the capabilities of 193nm immersion lithography will be explored. Keywords: Resolution Enhancement, Resolution Limits, Optical Lithography 1. Introduction Optical lithography has been the mainstay of semiconductor patterning since the early days of integrated circuit production. The continual reduction of the dimensions of the features used to construct transistors has allowed these transistors to become ever smaller, faster, lower power-consuming, and cheaper.
    [Show full text]
  • Control in Semiconductor Wafer Manufacturing
    Control in Semiconductor Wafer Manufacturing Abbas Emami-Naeini and Dick de Roover have turned to single-wafer processes which require precise Abstract: A semiconductor wafer undergoes a wide range of processes before it is transformed from a bare silicon wafer to one control. Interestingly, the processes that make the chip are populated with millions of transistor circuits. Such processes now beginning to use controllers which require the include Physical or Chemical Vapor Deposition, (PVD, CVD), computational power of the chips being fabricated. Another Chemical-Mechanical Planarization (CMP), Plasma Etch, Rapid trend is to conduct several related steps in a “cluster” Thermal Processing (RTP), and photolithography. As feature sizes comprising of several chambers integrated into a single keep shrinking, process control plays an increasingly important machine. role in each of these processes. A model-based control approach is an effective means of designing commercial controllers for The processes that deal with producing the integrated advanced semiconductor equipment. We will give an overview of circuit (IC) on the wafer are commonly referred to as “front- the applications of advanced control in the semiconductor industry. end” processes, whereas “back-end” processes deal with It is our experience that the best models for control design borrow wire bonding and packaging the IC. In this paper, we will heavily from the physics of the process. The manner in which focus on the “front-end” processes that produce the IC on these models are used for a specific control application depends on the silicon wafer, and the increasingly important role of the performance goals. In some cases such as RTP and lithography, the closed-loop control depends entirely on having control.
    [Show full text]
  • Computational Lithography
    Computational Lithography XU MA AND GONZALO R. ARCE Computational Lithography WILEY SERIES IN PURE AND APPLIED OPTICS Founded by Stanley S. Ballard, University of Florida EDITOR: Glenn Boreman, University of Central Florida, CREOL & FPCE BARRETT AND MYERS · Foundations of Image Science BEISER · Holographic Scanning BERGER-SCHUNN · Practical Color Measurement BOYD · Radiometry and The Detection of Optical Radiation BUCK · Fundamentals of Optical Fibers, Second Edition CATHEY · Optical Information Processing and Holography CHUANG · Physics of Optoelectronic Devices DELONE AND KRAINOV · Fundamentals of Nonlinear Optics of Atomic Gases DERENIAK AND BOREMAN · Infrared Detectors and Systems DERENIAK AND CROWE · Optical Radiation Detectors DE VANY · Master Optical Techniques ERSOY · Diffraction, Fourier Optics and Imaging GASKILL · Linear Systems, Fourier Transform, and Optics GOODMAN · Statistical Optics HOBBS · Building Electro-Optical Systems: Making It All Work, Second Edition HUDSON · Infrared System Engineering IIZUKA · Elements of Photonics, Volume I: In Free Space and Special Media IIZUKA · Elements of Photonics, Volume II: For Fiber and Integrated Optics JUDD AND WYSZECKI · Color in Business, Science, and Industry, Third Edition KAFRI AND GLATT · The Physics of Moire Metrology KAROW · Fabrication Methods for Precision Optics KLEIN AND FURTAK · Optics, Second Edition MA AND ARCE · Computational Lithography MALACARA · Optical Shop Testing, Third Edition MILONNI AND EBERLY · Lasers NASSAU · The Physics and Chemistry of Color: The Fifteen
    [Show full text]
  • Subwavelength Lithography (PSM,OPC) Tsuneo Terasawa
    Subwavelength Lithography (PSM,OPC) Tsuneo Terasawa Central Research Laboratory, Hitachi Ltd. 1-280 Higashi-Koigakubo, Kokubunji-shi Tokyo 185-8601 Japan Tel: +81-42-323-1111 Fax: +81-42-327-7771 e-mail: [email protected] Abstract - Fabrication of fine features of smaller 0.15um is vital for future ultra-large scale integrated (ULSI) devices. An area of II. REQUIREMENT FOR LITHOGRAPHY TECHNIQUES particular concern is whether and how optical lithography can delineate such feature sizes, i.e., smaller than the exposure The trend of minimum feature sizes of ULSI devices wavelength. Resolution enhancement techniques for achieving and lithographic performances is shown in Fig. 1. The subwavelength optical lithography are presented. Various types integration level has increased fourfold every two or three of phase shift mask (PSM) techniques and their imaging year. Because advances in optics and resist materials, optical characteristics are discussed and compared to conventional lithography is still the most important lithographic binary mask technique. To apply these masks effectively to technologies in the industrial environment. However, the practical patterns, optical proximity effect correction (OPC) minimum feature size of ULSI devices becomes smaller than technique and a phase shifter pattern design tool must be wavelength of exposure light used in the optical system. In established. These techniques offer the capability to improve fact, 64M bit DRAMs have been developed with a minimum resolution to exceed the wavelength limitation and to increase feature size of 0.19um which is smaller than exposure depth of focus. wavelength of KrF excimer laser light (0.248um). Ways to obtain high resolution and better alignment accuracy with minimal increase in cost and minimal reduction I.
    [Show full text]