Wright State University CORE Scholar Browse all Theses and Dissertations Theses and Dissertations 2018 A Robust Low Power Static Random Access Memory Cell Design A. V. Rama Raju Pusapati Wright State University Follow this and additional works at: https://corescholar.libraries.wright.edu/etd_all Part of the Electrical and Computer Engineering Commons Repository Citation Pusapati, A. V. Rama Raju, "A Robust Low Power Static Random Access Memory Cell Design" (2018). Browse all Theses and Dissertations. 2005. https://corescholar.libraries.wright.edu/etd_all/2005 This Thesis is brought to you for free and open access by the Theses and Dissertations at CORE Scholar. It has been accepted for inclusion in Browse all Theses and Dissertations by an authorized administrator of CORE Scholar. For more information, please contact
[email protected]. A ROBUST LOW POWER STATIC RANDOM ACCESS MEMORY CELL DESIGN A Thesis in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering by A.V. RAMA RAJU PUSAPATI B.TECH., JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA, 2016 2018 Wright State University WRIGHT STATE UNIVERSITY GRADUATE SCHOOL JULY 25, 2018 I HEREBY RECOMMEND THAT THE THESIS PREPARED UNDER MY SUPERVISION BY A.V. Rama Raju Pusapati ENTITLED A Robust Low Power Static Random Access Memory Cell Design BE ACCEPTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF Master of Science in Electrical Engineering. __________________________ Saiyu Ren, Ph.D. Thesis Director __________________________ Brian D. Rigling Ph.D. Chair, Department of Electrical Engineering Committee on Final Examination: ________________________________ Saiyu Ren, Ph.D. ________________________________ Ray Siferd, Ph.D.