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TuU1 (Invited) 1:30 PM – 2:00 PM

Silicon Nanophotonic Circuits and Devices

Wim Bogaerts, Pieter Dumon, Shankar Kumar Selvaraja, Dries Van Thourhout and Roel Baets IMEC - Ghent University, Department of Information Technology, 9000 Gent, Belgium Email: [email protected]

Abstract— on is an ideal platform for large- scale nanophotonic integration. We show that tight process 50µm 1 control is needed for well-functioning filters, and discuss a channel number of devices based on these filters. 8 I.INTRODUCTION (SOI) has already proven itself as a very suitable material for integrated [1]. Not only because of the high contrast, which allows for submicron and sharp bends with radii of 3 µm or less [2], but also because the material can be processed with the same tool set as used for manufacturing. This 0 1.1 combination, a small footprint and an a potential industrial 1.3 manufacturing base, gives silicon photonics the scalability 12345678 needed for low-cost, large-volume applications. -10 We use these photonic wires to implement a variety of -selective components. These include ring res- -20 onators, but also arrayed waveguide gratings scaled to very small footprints. However, the submicron dimensions of the photonic wires make these filters exceptionally sensitive to

AWG transmission [dB] -30 process variations. While in the end there will always be the need for a tuning mechanism, good process control can already bring the device very close to its desired specification. This, in -40 1545 1550 1555 1560 1565 1570 1575 1580 turn, reduces the power consumption required for tuning. We wavelength [nm] show that this is possible with classical CMOS technology. Finally, we also discuss a number of device concepts which Fig. 1. Compact 8-channel arrayed waveguide grating can only become viable through SOI , because of cost and volume considerations.

II.PASSIVE WAVELENGTH-SELECTIVECOMPONENTS a similar channel spacing. Also, by using a combination of deep and shallow etch layers [2], the insertion loss of the The high contrast photonic wires in SOI allow for very entire AWG is only 1.1 dB. sharp bends, which in turn reduces the footprint of many common waveguide components. Because of that, wavelength III.PROCESS CONTROL selective elements such as ring resonators can be made very compact, thus they can have a very large free spectral range With waveguide dimensions of 500 nm, photonic wires fall [2]. Also, the relatively strong of photonic wires well within the fabrication capabilities of high-end CMOS (ng 4.0) allows for shorter delay lines. This, in combination manufacturing tools. However, the fabrication tolerances of with acceptable propagation losses of a few dB/cm [3], [1], photonic components are much more strict that for electronics, makes photonic wires ideal to construct wavelength selective where margins of 5% or 10% are acceptable. For wavelength- components. selective filters, a deviation of waveguide width of 1 nm will A result of this is shown in Fig. 1. This 8 × 400GHz correspond to approximately 1 nm wavelength shift. While arrayed waveguide grating (AWG) has a footprint of only such a shift can be compensated for by thermal or other tuning 200×350 µm2. Because of the tight process control (discussed mechanisms, the acceptable tolerances are still of the order in the next section) the path length difference in the arms is of 1%. However, we have demonstrated that with reasonable well controlled, resulting in a low crosstalk level of −25 dB; process control, these tolerances can be met with standard the lowest reported in a demultiplexer device of this size with CMOS fabrication tools [4].

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