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An Introduction to the Illiac Iv System LIBRARY OF THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN 510.84 I£63c no.1-10 j s U~&Pi$F ^T®&/;r£ AUG 51976 The person charging this material is re- sponsible for its return to the library from which it was withdrawn on or before the Latest Date stamped below. Theft, mutilation, and underlining of books are reasons for disciplinary action and may result in dismissal from the University. UNIVERSITY OF ILLINOIS LIBRARY AT URBANA-CHAMPAIGN ^ j»s» r?* $»» 1 ft «£ 8 ! I tn jul ovFFcn m ° 4 ^ L161 — O-1096 Digitized by the Internet Archive in 2012 with funding from University of Illinois Urbana-Champaign http://archive.org/details/introductiontoilOOdene . Engirt HNGINEER/NG LISRABV UN ' VE f S°"' INFERENCE ROD X° ,ced Computation UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAK URBANA, ILLINOIS 61801 CAC Document No. 10 AN INTRODUCTION TO THE ILLIAC D7 SYSTEM by Stewart A. Denenberg July 15, 1971 (revised November 1, 1972) CAC Document No. 10 AN INTRODUCTION TO THE ILLIAC IV SYSTEM by Stewart A. Denenberg Center for Advanced Computation University of Illinois at Urbana- Champaign Urban a, Illinois 6l801 ILLIAC IV Document No. 225 Department of Computer Science File No. 850 July 15, 1971 (revised November 1, 1972) This work was supported by the Advanced Research Projects Agency, as implemented initially by the Rome Air Development Center, Research and Technology Division, Air Force Systems Command, Griffiss Air Force Base, New York under Contract No. USAF 30(602)-klkk, and beginning January 17, 1972, by the NASA Ames Research Center, Moffett Field, California. To Claire " HB How to Read this Book This book was written for an applications programmer who would like a tutorial description of the ILLIAC IV System before attempting to read the reference manual. As a tutorial, the level of detail presented in this book is fairly general; particular information can be found in the Burroughs Reference Manual "ILLIAC IV Systems Characteristics and Programming Manual . In order to use this book most effectively, the Chapters should be read in order. The reader who wants a very quick look at the capabil- ities of ILLIAC IV may skim just the summaries of parts A, B and C of Chapter I and begin reading on page 1-52. He may then read pages II-l through 11-20, skipping the detailed description of the ILLIAC IV Array (pages 11-21 to II-Ul) . Pages 11-1*1 through 11-73 are optional; the reader should at least look at them and decide for himself. As much of Chapter III as possible should be read—the instruction repertoire, more than anything else, defines the capabilities of a computer. A valid answer to the question "What is ILLIAC IV?" would be to hand the questioner a description of each instruction in the repertoire. For a more complete understanding, however, the reader should come back and read the sections he skipped on the first pass . It is the nature of ILLIAC IV, to a degree much greater than the conventional computers, that its hardware structure is bound up very closely with its capabilities. It is therefore necessary that the reader spend the time necessary to understand the architecture of ILLIAC IV. The Table of Contents in the front of the book is in an abbreviated format while each chapter will be preceded by a finer Table of Contents. A Hardware Glossary which is essentially a glossary for Chapter II is at the end of the book. Chapter I presents the background concepts necessary for an understanding of ILLIAC IV. A short section is devoted to the historical development of digital computers and their evolution is described in terms of the problems that had to be solved. After conventional computer organizations are described, unconventional ones are presented as design options to speed up the operation of a computer. Two design philosophies, overlap and replication, represent two major methods used to increase the computer's operational speed. Overlap is effected by the buffer and pipeline mechanism and replication is embodied in the general multi- processor. ILLIAC IV is shown to be a variant of a general multiprocessor using buffering and a modified pipeline mechanism in the instruction execution section. Chapter II describes the architecture or the hardware structure of ILLIAC IV. The ILLIAC IV Array is discussed in broad terms followed by some illustrative problems which point out some of the similarities and differences between problem-solving on sequential and parallel machines. The problems also serve to illustrate how the hardware components are tied 11 . , together. Following is a more detailed description of the ILLIAC IV Array, then another illustrative problem (Laplace's equation describing steady- state temperature distribution in two-dimensions) followed by some data allocation considerations; the ILLIAC IV I/O System is discussed briefly, and some conclusions and opinions end the chapter. Chapter III presents the Assembly Language ASK in a functional and pragmatic way: a problem is described and then only those ASK instructions necessary for the solution are described. In this way the five problems introduce forty ASK instructions and the flavor of the assembly language which, from a programmer's standpoint, is an indication of the capabilities of ILLIAC IV itself. The five problems are: Summing an array of numbers , Finding the maximum value in an array of numbers Matrix multiplication, Matrix transpose, and Laplace's equation described in Chapter II 111 Abstract Written specifically for an applications programmer, the book presents a tutorial description of the ILLIAC IV System. There are three chapters -- Background, Hardware Structure, and The Assembly Language-ASK, as well as a Hardware Glossary. Many illustrative problems are used to educate the beginner in the use of the ILLIAC IV System. IV TABLE OF CONTENTS Chapter I Background 6k pages Chapter II Hardware Structure . 74 pages Chapter III The Assembly Language--ASK 90 pages Hard-ware Glossary 10 pages Appendix k pages Foreword This book is "based upon the many reports and documents generated at the University of Illinois and the Burroughs Corporation during the design and development of the ILLIAC IV computer. In addition, much of the content of the hook was influenced by the material offered in the graduate level computer science course, CS ^91, "Architecture, Applications, and Languages for a Parallel Computer" as well as the many one-day, two-day and one-week seminars on ILLIAC IV. I learned a great deal from my "students". I would like particularly to thank Professor Daniel Slotnick and my friend Mr. George Westlund who provided the overall guidance for this book and whose idea it was to create it in the first place. Much specific help was given me by Walt Heimerdinger in the area of hardware structure, and Jim Stevens and John McMillan in the area of ASK. Mike Sher and Cal Corbin helped proofread and make final suggestions before this book went to press . I am also very grateful to Joyce Fasnacht who cheerfully typed and retyped the many versions of the text with incredible accuracy, and who drafted the original versions of all of the figures from my pencil scratchings. Stewart A. Denenberg Urbana, Illinois 1971 VI CHAPTER I — BACKGROUND TABLE OF CONTENTS Page A. Summary 1-1 B. A Review of Digital Computing Machines 1-2 1. Summary 1-2 2. Babbage's Difference Engine and Analytical Engine ... 1-3 a. The Difference Engine 1-3 b. The Analytical Engine 1-7 3. Automatic Sequence Controlled Calculator (Mark I). 1-11 k. Electronic Numerical Integrator and Calculator (ENIAC) . I-lU 5. Electronic Delay Storage Automatic Calculator (EDSAC). I-l6 6. University of Manchester Computers 1-20 7. Electronic Discrete Variable Automatic Calculator (EDVAC) 1-22 C. Unconventional Digital Computer Organizations 1-25 1. Summary 1-25 2. Overlap Mechanisms 1-30 a. Buffer 1-30 b. Pipeline 1-36 i . Summary 1-36 ii. Background 1-37 iii. A Pipeline Adder 1-40 iv. A Pipeline Instruction Execution Unit .... I-k6 3. Replication—The Multiprocessor 1-48 a. Centralize Memory 1-^-9 b. Centralize the Arithmetic and Logic Unit (ALU) . 1-50 c. Centralize the Control Unit (CU) 1-52 h. ILLIAC IV 1-55 References I-6l I-i LIST OF FIGURES Figure Page 1-1. Transmission of Data in Babbage's Machine 1-9 1-2. Mercury Delay Line or Ultrasonic Store 1-17 1-3. Functional Relations within a Conventional Computer 1-26 1-4. Process Execution with and without Buffer 1-35 1-5- Two Inputs Transformed to Two Outputs via a Three-Stage Sequential Process 1-37 1-6. Two Inputs Transformed to Two Outputs via a Three-Stage Pipeline where P is the Maximum of P , P , and P 1-38 1-7. Seven Pairs of Numbers being Added in a Four-Stage Pipeline Adder 1-45 1-8. Functional Relations within a General Multiprocessor 1-48 1-9- Multiprocessor with Common (Lumped) Memory 1-49 1-10. Functional Block Diagram of Intrinsic Multiprocessor 1-51 1-11. Serial CPU vs. Parallel CPU 1-53 1-12. A Vector or Array Processor 1-54 1-13. Functional Block Diagram of SOLOMON I-56 I-l4. Functional Block Diagram of ILLIAC IV I-58 TABLES Table Page 1-1. Difference Method for Evaluating Polynomial Function X2 + X + 1 1-4 I-ii CHAPTER I BACKGROUND A. Summary Chapter I traces out some of the background concepts necessary for an understanding of ILLIAC IV. A short section is devoted to the historical development of digital computers, indicating how computer systems evolved to the Von Neumann state of organization. Also discussed is the tendency computers have had in creating problems themselves.
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