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Ultra-Wideband Bias-Tee Design Using Distributed Network Synthesis

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Ultra-Wideband Bias-Tee Design Using Distributed Network Synthesis LETTER IEICE Electronics Express, Vol.10, No.15, 1–8 Ultra-wideband bias-tee design using distributed network synthesis Nam-Tae Kima) Department of Electronic Engineering, Inje University, Gimhae 621–749, Korea a) [email protected] Abstract: This paper presents a design methodology for ultra- wideband bias tees, using a distributed network synthesis considering both RF and DC performance. For the design of bias tees, transfer functions of distributed circuits are offered using equal ripple approximation, and DC current-handling capacity is incorporated into the network synthesis by calculating capacity in terms of the characteristic impedance of a transmission line. A bias-tee circuit with the desired characteristics can be synthesized by properly adjusting the minimum insertion loss (MIL) and ripple of the transfer function with reference to the required performance. As an example, a distributed network synthesis is applied to design a bias tee for ultra-wideband applications. Keywords: bias tee, network synthesis, ultra-wideband Classification: Microwave and millimeter wave devices, circuits, and systems References [1] G. Aiello and G. Rogerson: IEEE Microwave Mag. 4 (2003) 36. [2] B. Minnis: IEEE Trans. Microw. Theory Tech. 35 (1987) 597. [3] P. Bell, N. Hoivik, V. Bright and Z. Popovic: IEEE MTT-S Int. Microwave Symp. Dig. (2003) 491. [4] E. Cullens, K. Vanhille and Z. Popovic: Proc. 40th European Microwave Conf. (2010) 413. [5] M. Mokari-Bolhassan and W. Ku: IEEE Trans. Microw. Theory Tech. 25 (1977) 837. [6] R. Levy: IEEE Trans. Microw. Theory Tech. 20 (1972) 223. [7] J. Helszajn: Synthesis of lumped element distributed and planar filters (McGraw-Hill, New York, 1990) 286. [8] Rogers Corporation Design 3.3.2, “Temperature rise estimation in Rogers high frequency circuit boards carrying direct or RF current,” Publication no. 92-332, 2012. [9] J. Hong: Microstrip filters for RFmicrowave applications 2nd Ed. (John Wiley & Sons, 2011) 75. [10] M. Uhm, K. Kim and D. Filipovic: IEEE Microw. Wireless Compon. Lett. 18 (2008) 668. [11] Agilent Technologies, Palo Alto, CA, U.S.A., 2005. © IEICE 2013 DOI: 10.1587/elex.10.20130472 Received June 18, 2013 Accepted July 17, 2013 Publicized July 25, 2013 Copyedited August 10, 2013 1 IEICE Electronics Express, Vol.10, No.15, 1–8 1 Introduction Ultra-wideband components need to be designed for applications including instrumentation, electronic warfare (EW), and software-defined radio (SDR). Additionally, as the Federal Communications Commission (FCC) allocates the frequency spectrum in the range 3.1–10.6 GHz for ultra- wideband systems, ultra-wideband wireless components are increasingly needed [1]. In these applications, bias tees are essential components that provide DC power and control signals to ultra-wideband components. Several studies have focused on designing ultra-wideband bias tees that achieve a desired performance. Bias tees have been designed as a combined structure of band-pass, low-pass, and high-pass networks, and synthesized to provide a decade of bandwidth using commercially available software [2]. Because it uses a microstrip structure, this methodology is compatible with low-cost production methods. In Ref. [3], a bias tee was reported using a micro-machined suspended inductor to reduce its circuit area and parasitic capacitance associated with a substrate. The current handling capability of the bias tee is small, however, due to the reduced size of the inductor. Miniature bias tees have been designed using distributed micro-coaxial lines to accommodate a wide range of system impedances [4]. These bias tees can handle more DC current than those fabricated using MEMS technology. Despite these developments, bias tee design methodologies that consider both RF performance and DC current-handling capacity have not been described. In this paper, we propose a design methodology for ultra-wideband bias tees, using distributed network synthesis considering both RF and DC performance. For the synthesis of wideband bias tees, transfer functions of distributed circuits are provided using equal ripple approximation, and the DC current-handling capacity of a transmission line is calculated using the characteristic impedance for use in distributed network synthesis. A bias tee that meets the required RF and DC performance can be synthesized by setting the appropriate MIL and ripple parameters of a distributed circuit. As an example, we applied a distributed network synthesis to the design of an ultra-wideband bias tee, and used the findings to assess the effectiveness of the methodology. 2 Distributed network synthesis Distributed network synthesis is an effective design methodology for ultra- wideband bias tees because it allows versatility in the synthesis procedure. Because bias-tee circuits should include at least one shunt shorted stub for DC bias injection, in this section we consider a distributed network synthesis for band-pass and high-pass circuits. A transfer function of a distributed network, which consists of commensurate transmission lines, is given in Ref. [5]: 2 m 2 n 2 KðÞÀS ðÞ1 À S jS21ðÞjS ¼ (1) PnþrþmðÞS2 ; © IEICE 2013 where there are n transmission line elements (TLEs), r low-pass elements DOI: 10.1587/elex.10.20130472 2 Received June 18, 2013 (LPEs), and m high-pass elements (HPEs). Here, Pnrm(S ) is a strictly Accepted July 17, 2013 2 Publicized July 25, 2013 Hurwitz polynomial of the order nrm in S , and must provide the desired Copyedited August 10, 2013 2 IEICE Electronics Express, Vol.10, No.15, 1–8 type of approximation. K is a gain parameter and the Rechards’ variable, S, is equal to Æj . When the transfer function of a distributed network exhibits equal ripple and band-pass characteristics, equation (1) can be re-written as: K jS j2 ¼ 21 "2 ; (2) 1 þ ½1 þ cosðÞnb þ r þ m 2 1 2 where " is a ripple parameter of the function and the network order nrm must be even. In equation (2), the expressions for b and 1 are derived from quasi-low-pass mapping, as follows [6]: ÀÁÀÁ 2 2 2 2 2 2 2 1 þ 2 þ 2 À 1 þ 2 þ 21 2 cos b ¼ ÀÁ (3) 2 2 2 ; 2 À 1 ðÞ1 þ 22 À 2 À 2 ¼ 1 2 (4) cos 1 2 2 ; 2 À 1 where = tan = tan l, 1 = tan1, and 2 = tan2. The angles 1 and 2 are the electrical lengths of transmission lines at the lower and upper band-edge frequencies, respectively. To obtain an equation for 2, we assume cos2 = / 2+ for high-pass elements from (4). Solving for the constants and by constraining that cos2 = À1at1 and cos2 = +1 at 2, we have: ÀÁ 2 2 þ 2 À 2 2 2 cos ¼ 1 ÀÁ2 1 2 (5) 2 2 2 2 : 2 À 1 Additionally, when a distributed circuit exhibits equal ripple and high- pass characteristics, equation (1) is reduced to [7]: 2 K jS21j ¼ (6) 1 þ "2cos2ðÞnh þ mh ; pffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 1 þ c cos h ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffi (7) 1 þ 2 ; c cos h ¼ (8) ; where c = tanc. The angle c is the electrical length of the transmission lines at the cut-off frequency of a high-pass network. Reflection coefficients for equations (2) and (6) are determined by the unitary condition for a lossless network, and a corresponding impedance function is given by: þ S ðÞS zSðÞ¼1 11 ; (9) 1 À S11ðÞS where S11(S) is an input reflection coefficient and z(S) is a normalized input impedance of distributed circuits. By choosing appropriate MIL and ripple parameters of a transfer function at a specific electrical length, we can © IEICE 2013 synthesize ultra-wideband bias tees that meet the desired performance DOI: 10.1587/elex.10.20130472 Received June 18, 2013 criteria. Accepted July 17, 2013 Publicized July 25, 2013 Copyedited August 10, 2013 3 IEICE Electronics Express, Vol.10, No.15, 1–8 3 DC current handling capacity The DC performance of a bias tee using a microstrip structure is determined by the microstrip line that has the highest level of impedance along its DC path. The maximum DC current that a microstrip line can handle for the line width of W is given by [8]: sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi AtÁT I ¼ W (10) h ; where I is the current required to raise the trace temperature by ÁT above ground plane temperature. In equation (10), h and t are the dielectric and strip thicknesses, respectively, A is the thermal conductivity of the dielectric substrate, and is the resistivity of the conductor. To incorporate the DC performance of a bias tee into a distributed network synthesis, current capacity is related to the characteristic impedance of a microstrip line. DC current-handling capacity of a microstrip line can be calculated in terms of the characteristic impedance by using equation (10) and closed-form expressions for a microstrip line [9]. Figure 1 presents DC performance versus the characteristic impedance of a microstrip line. Fig. 1. DC current-handling capacity of a microstrip line o with ÁT = 100 C (substrate: "r = 2.5, h = 0.254 mm, t = 0.018 mm, = 0.17 × 10À7 m, and A = 0.19 W/mK). 4 Ultra-wideband bias-tee In this section we describe a design example to illustrate bias-tee applications in a distributed network synthesis. For ultra-wideband applications, a bias tee should have an insertion loss of less than 1.0dB and a reflection loss greater than 16.0 dB over the range 3.1–10.6 GHz. It should also have a DC current-handling capacity of 1.9A. 4.1 Network synthesis for a desired bias tee Although bias-tee networks can include several shunt shorted stubs for DC current injection [10], bias tees that contain one shunt shorted stub are © IEICE 2013 preferred because shorted stubs are not easy to implement over wide DOI: 10.1587/elex.10.20130472 Received June 18, 2013 frequency ranges.
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