Ultra-Wideband Bias-Tee Design Using Distributed Network Synthesis

LETTER IEICE Electronics Express, Vol.10, No.15, 1–8 Ultra-wideband bias-tee design using distributed network synthesis

Nam-Tae Kima) Department of Electronic Engineering, Inje University, Gimhae 621–749, Korea a) [email protected]

Abstract: This paper presents a design methodology for ultra- wideband bias tees, using a distributed network synthesis considering both RF and DC performance. For the design of bias tees, transfer functions of distributed circuits are offered using equal ripple approximation, and DC current-handling capacity is incorporated into the network synthesis by calculating capacity in terms of the characteristic impedance of a transmission line. A bias-tee circuit with the desired characteristics can be synthesized by properly adjusting the minimum insertion loss (MIL) and ripple of the transfer function with reference to the required performance. As an example, a distributed network synthesis is applied to design a bias tee for ultra-wideband applications. Keywords: bias tee, network synthesis, ultra-wideband Classification: Microwave and millimeter wave devices, circuits, and systems References

[1] G. Aiello and G. Rogerson: IEEE Microwave Mag. 4 (2003) 36. [2] B. Minnis: IEEE Trans. Microw. Theory Tech. 35 (1987) 597. [3] P. Bell, N. Hoivik, V. Bright and Z. Popovic: IEEE MTT-S Int. Microwave Symp. Dig. (2003) 491. [4] E. Cullens, K. Vanhille and Z. Popovic: Proc. 40th European Microwave Conf. (2010) 413. [5] M. Mokari-Bolhassan and W. Ku: IEEE Trans. Microw. Theory Tech. 25 (1977) 837. [6] R. Levy: IEEE Trans. Microw. Theory Tech. 20 (1972) 223. [7] J. Helszajn: Synthesis of lumped element distributed and planar filters (McGraw-Hill, New York, 1990) 286. [8] Rogers Corporation Design 3.3.2, “Temperature rise estimation in Rogers high frequency circuit boards carrying direct or RF current,” Publication no. 92-332, 2012. [9] J. Hong: Microstrip filters for RFmicrowave applications 2nd Ed. (John Wiley & Sons, 2011) 75. [10] M. Uhm, K. Kim and D. Filipovic: IEEE Microw. Wireless Compon. Lett. 18 (2008) 668. [11] Agilent Technologies, Palo Alto, CA, U.S.A., 2005. © IEICE 2013 DOI: 10.1587/elex.10.20130472 Received June 18, 2013 Accepted July 17, 2013 Publicized July 25, 2013 Copyedited August 10, 2013

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1 Introduction

Ultra-wideband components need to be designed for applications including instrumentation, electronic warfare (EW), and software-defined radio (SDR). Additionally, as the Federal Communications Commission (FCC) allocates the frequency spectrum in the range 3.1–10.6 GHz for ultra- wideband systems, ultra-wideband wireless components are increasingly needed [1]. In these applications, bias tees are essential components that provide DC power and control signals to ultra-wideband components. Several studies have focused on designing ultra-wideband bias tees that achieve a desired performance. Bias tees have been designed as a combined structure of band-pass, low-pass, and high-pass networks, and synthesized to provide a decade of bandwidth using commercially available software [2]. Because it uses a microstrip structure, this methodology is compatible with low-cost production methods. In Ref. [3], a bias tee was reported using a micro-machined suspended inductor to reduce its circuit area and parasitic capacitance associated with a substrate. The current handling capability of the bias tee is small, however, due to the reduced size of the inductor. Miniature bias tees have been designed using distributed micro-coaxial lines to accommodate a wide range of system impedances [4]. These bias tees can handle more DC current than those fabricated using MEMS technology. Despite these developments, bias tee design methodologies that consider both RF performance and DC current-handling capacity have not been described. In this paper, we propose a design methodology for ultra-wideband bias tees, using distributed network synthesis considering both RF and DC performance. For the synthesis of wideband bias tees, transfer functions of distributed circuits are provided using equal ripple approximation, and the DC current-handling capacity of a transmission line is calculated using the characteristic impedance for use in distributed network synthesis. A bias tee that meets the required RF and DC performance can be synthesized by setting the appropriate MIL and ripple parameters of a distributed circuit. As an example, we applied a distributed network synthesis to the design of an ultra-wideband bias tee, and used the findings to assess the effectiveness of the methodology.

2 Distributed network synthesis

Distributed network synthesis is an effective design methodology for ultra- wideband bias tees because it allows versatility in the synthesis procedure. Because bias-tee circuits should include at least one shunt shorted stub for DC bias injection, in this section we consider a distributed network synthesis for band-pass and high-pass circuits. A transfer function of a distributed network, which consists of commensurate transmission lines, is given in Ref. [5]:

2 m 2 n 2 KðÞS ðÞ1 S jS21ðÞjS ¼ (1) PnþrþmðÞS2 ;

© IEICE 2013 where there are n transmission line elements (TLEs), r low-pass elements DOI: 10.1587/elex.10.20130472 2 Received June 18, 2013 (LPEs), and m high-pass elements (HPEs). Here, Pnrm(S ) is a strictly Accepted July 17, 2013 2 Publicized July 25, 2013 Hurwitz polynomial of the order nrm in S , and must provide the desired Copyedited August 10, 2013

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type of approximation. K is a gain parameter and the Rechards’ variable, S, is equal to j. When the transfer function of a distributed network exhibits equal ripple and band-pass characteristics, equation (1) can be re-written as: K jS j2 ¼ 21 "2 ; (2) 1 þ ½1 þ cosðÞnb þ r þ m 2 1 2 where " is a ripple parameter of the function and the network order nrm

must be even. In equation (2), the expressions for b and 1 are derived from quasi-low-pass mapping, as follows [6]: 2 2 2 2 2 2 2 1 þ 2 þ 2 1 þ 2 þ 21 2 cos b ¼ (3) 2 2 2 ; 2 1 ðÞ1 þ

22 2 2 ¼ 1 2 (4) cos 1 2 2 ; 2 1

where = tan = tanl, 1 = tan1, and 2 = tan2. The angles 1 and 2 are the electrical lengths of transmission lines at the lower and upper band-edge

frequencies, respectively. To obtain an equation for 2, we assume cos2 = /2+ for high-pass elements from (4). Solving for the constants and

by constraining that cos2 = 1at1 and cos2 = +1 at 2, we have: 2 2 þ 2 2 2 2 cos ¼ 1 2 1 2 (5) 2 2 2 2 : 2 1 Additionally, when a distributed circuit exhibits equal ripple and high- pass characteristics, equation (1) is reduced to [7]:

2 K jS21j ¼ (6) 1 þ "2cos2ðÞnh þ mh ; pffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 1 þ c cos h ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffi (7) 1 þ 2 ;

c cos h ¼ (8) ;

where c = tanc. The angle c is the electrical length of the transmission lines at the cut-off frequency of a high-pass network. Reflection coefficients for equations (2) and (6) are determined by the unitary condition for a lossless network, and a corresponding impedance function is given by: þ S ðÞS zSðÞ¼1 11 ; (9) 1 S11ðÞS

where S11(S) is an input reflection coefficient and z(S) is a normalized input impedance of distributed circuits. By choosing appropriate MIL and ripple parameters of a transfer function at a specific electrical length, we can © IEICE 2013 synthesize ultra-wideband bias tees that meet the desired performance DOI: 10.1587/elex.10.20130472 Received June 18, 2013 criteria. Accepted July 17, 2013 Publicized July 25, 2013 Copyedited August 10, 2013

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3 DC current handling capacity

The DC performance of a bias tee using a microstrip structure is determined by the microstrip line that has the highest level of impedance along its DC path. The maximum DC current that a microstrip line can handle for the line width of W is given by [8]: sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi AtT I ¼ W (10) h ;

where I is the current required to raise the trace temperature by T above ground plane temperature. In equation (10), h and t are the dielectric and strip thicknesses, respectively, A is the thermal conductivity of the dielectric substrate, and is the resistivity of the conductor. To incorporate the DC performance of a bias tee into a distributed network synthesis, current capacity is related to the characteristic impedance of a microstrip line. DC current-handling capacity of a microstrip line can be calculated in terms of the characteristic impedance by using equation (10) and closed-form expressions for a microstrip line [9]. Figure 1 presents DC performance versus the characteristic impedance of a microstrip line.

Fig. 1. DC current-handling capacity of a microstrip line o with T = 100 C (substrate: "r = 2.5, h = 0.254 mm, t = 0.018 mm, = 0.17 × 107 m, and A = 0.19 W/mK).

4 Ultra-wideband bias-tee

In this section we describe a design example to illustrate bias-tee applications in a distributed network synthesis. For ultra-wideband applications, a bias tee should have an insertion loss of less than 1.0dB and a reflection loss greater than 16.0 dB over the range 3.1–10.6 GHz. It should also have a DC current-handling capacity of 1.9A.

4.1 Network synthesis for a desired bias tee Although bias-tee networks can include several shunt shorted stubs for DC current injection [10], bias tees that contain one shunt shorted stub are © IEICE 2013 preferred because shorted stubs are not easy to implement over wide DOI: 10.1587/elex.10.20130472 Received June 18, 2013 frequency ranges. This section describes distributed band-pass and high- Accepted July 17, 2013 Publicized July 25, 2013 pass circuits synthesized with five zero-reflection points to find a structure Copyedited August 10, 2013

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suitable for ultra-wideband bias tees. The frequency margin in the synthesis is chosen as 0.5 GHz from the band-edge frequencies. First, to design a bias tee, it is necessary to calculate the characteristic impedance of the transmission lines that can handle the required DC current. For a microstrip structure, the line impedance that can handle a DC current of 1.9 A is calculated as 94.2, as shown in Fig. 1. Therefore, the bias tee should be synthesized to include transmission lines with an impedance of less than 94.2 along the DC current path. To synthesize a band-pass network that contains one high-pass element o (HPE), we choose n = 4, r = 5, m = 1, and 2 = 60 in equation (2) over the frequency range 2.6–11.1 GHz, and then adjust the MIL to 0 dB and the ripple to 0.11 dB to create a circuit with transmission-line impedances of 2 less than 94.2. Using this procedure,|S21(S)| can be obtained from 2 equation (2) and |S11(S)| can be determined from the unitary condition of a 2 lossless network. If we select zeros for |S11(S)| in the left-half of the S-plane, S11(S) can be calculated from the poles and zeros in the left-half plane (LHP). The impedance function can be obtained from equation (9). If we extract the distributed elements in a symmetric topology, a band-pass network is obtained with a shunt shorted stub with an impedance of 94.1, as shown in Fig. 2(a). In this circuit, the insertion loss is less than 0.11 dB and the reflection loss is greater than 16.07 dB, as shown Fig. 2(b).

Fig. 2. (a) Synthesized band-pass network (n = 4, r = 5, o m = 1, and 2 = 60 ). (b) Insertion and reflection losses.

Additionally, a high-pass network is designed to include one HPE, using - . © IEICE 2013 the same procedure as the band pass circuit The synthesis begins by DOI: 10.1587/elex.10.20130472 n = , m = , = . o . . Received June 18, 2013 choosing 4 1 and c 34 16 at a frequency of 2 6 GHz By setting Accepted July 17, 2013 . 3 ,|S S |2 Publicized July 25, 2013 the MIL to 0 dB and the ripple to 4 13 10 dB 21( ) can be obtained Copyedited August 10, 2013

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2 from equation (6) and |S11(S)| can be calculated from the unitary condition. 2 When we select zeros for |S11(S)| in the LHP, S11(S) can be determined from 2 the poles and zeros of |S11(S)| in the LHP, and the impedance function can be calculated from equation (9). Symmetric element extraction from the function yields the distributed network shown in Fig. 3(a), which also includes a shunt shorted stub with a characteristic impedance of 94.1. The circuit has an insertion loss of less than 0.005 dB and a reflection loss greater than 30.22 dB, as shown Fig 3(b). The high-pass network exhibits band-pass characteristics with a center frequency of 6.85 GHz at = 90o, due to the periodic characteristics of commensurate transmission lines.

Fig. 3. (a) Synthesized high-pass network (n = 4, m = 1, o and c = 34.16 ). (b) Insertion and reflection losses.

Compared with the network shown in Fig. 2, the high-pass circuit exhibits better RF performance than that of the band-pass network for the same DC performance. Therefore, the high-pass circuit shown in Fig. 3 provides an appropriate structure for the desired bias-tee network.

4.2 Design and experiments Figure 4 shows an ultra-wideband bias tee constructed using the high-pass network shown in Fig. 3. It includes a capacitor for DC blocking and a capacitor for an RF short of the shunt shorted stub and DC bias injection. The bias-tee network was realized on a TLX-9 copper-clad substrate (Taconic); see Fig. 1 for its characteristics. The capacitors used in the bias tee were 545L-series ultra-wideband capacitors from ATC. The 50- microstrip lines were added to accommodate board connectors for the measurements. , © IEICE 2013 To take into account the effect of microstrip discontinuities dielectric DOI: 10.1587/elex.10.20130472 , , Received June 18, 2013 loss and conductor loss circuit simulations were carried out using a Accepted July 17, 2013 Publicized July 25, 2013 commercial microwave CAD software package (Agilent Technologies Copyedited August 10, 2013

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Fig. 4. Circuit diagram of the ultra-wideband bias tee designed using a distributed network synthesis.

Advanced Design System 2005A [11]). In the simulations, the capacitors for DC blocking and an RF short were replaced with ideal capacitors because their device models were not available. Figure 5 presents the simulated performance of the bias tee; the insertion loss is less than 0.28 dB and the reflection loss greater than 28.54 dB in the range 3.1–10.6 GHz. The predicted DC current handling capacity is 1.9A.

Fig. 5. Simulated and measured performance of the designed bias tee: (a) insertion loss; (b) reflection loss.

Figure 5 also presents the measured results of the fabricated bias tee. The maximum insertion loss is 0.8 dB and the minimum reflection loss is 26.1 dB across the operating frequency range. The distortions in the insertion and reflection losses are caused mainly by capacitor losses and interactions between the discontinuities of the coaxial-to-stripline transi- tions at the two ends of the bias tee. Additionally, the measured DC current handling capacity is 2.3A. The difference between the predicted and measured DC performance is largely due to etching tolerances and tin- plating during the fabrication process. The measured performance of the ultra-wideband bias tee satisfies the required design goals.

5 Conclusion

A design methodology for ultra-wideband bias tees was developed, using a distributed network synthesis considering RF and DC performance. Transfer functions of distributed circuits using the equal ripple approximation were used to synthesize an ultra-wideband bias tee, and the DC current-handling capacity of a transmission line was integrated into the © IEICE 2013 DOI: 10.1587/elex.10.20130472 network synthesis by calculating the capacity based on the characteristic Received June 18, 2013 Accepted July 17, 2013 impedance. Publicized July 25, 2013 Copyedited August 10, 2013

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As an example, an ultra-wideband bias tee was designed, and experiments were carried out to assess the effectiveness of the methodology. The experimental results demonstrated that the bias tee designed using a distributed network synthesis met all design criteria.

Acknowledgments

This work was supported by the 2012 Inje University research grant.