Z13 Capacity Planning

EPV Technologies z13 Capacity Planning Fabio Massimo Ottaviani – EPV Technologies April 2015 1 Introduction On January 14th IBM announced its new generation of the mainframe. The new system is simply called IBM z13 while the family model is 2964. Experienced capacity planners know that every new generation of machines provides a major challenge to their skills. They also know that their best friends are the IBM LSPR benchmarks, the IBM zPCR tool, the Measurement Facility counters provided in SMF 113 and an up to date performance database. At the time of writing this paper the only thing available are the IBM LSPR benchmarks so in the first part of this paper, after a quick look at the most important capacity characteristics of the IBM z13, we will start from them to calculate the MIPS capacity of each IBM z13 processor model. We will also compare z13 single CP capacity and workload variability with previous machine generations. z13 Capacity Planning 1 EPV Technologies 2 z13 capacity highlights It’s interesting to note that, for some aspects, the z13 is more an evolution of the zBC12 than the zEC12. As the zBC12 it uses CPC drawers, instead of books, and single chip modules (SCM), instead of multi chip modules (MCM). The processor speed is slightly less than in the previous machine generations but thanks to the new processor architecture the single processor capacity has increased. See next chapter. System z13 zEC12 z196 Type 2964 2827 2817 N30, N63, N96, H20, H43, H66, M15, M32, M49, HW Models NC9, NE1 H88, HA1 M66, M80 Cycle rate (Ghz) 5,0 5,5 5,2 Max CP 141 101 80 Max LPARs 85 60 60 zAAP support N Y Y Subcapacity models 4xx, 5xx, 6xx 4xx, 5xx, 6xx 4xx, 5xx, 6xx Entry MIPS 250 240 240 Max MIPS 111.556 78.426 52.286 Entry MSU 31 30 30 Max MSU 13.078 9.194 6.140 Entry Memory (GB) 64 32 32 Max Memory (GB) 10.000 3.000 3.000 Figure 1 In the table above we compare some of the most important capacity characteristics of z13, zEC12 and z196 machines. From the point of view of CP capacity the magic number is 40%. Compared to zEC12 the z13 provides: About 40% more CPs; About 40% more total capacity; About 40% more LPARs. Memory is a different story; the minimum size is 64 GB while the maximum size is 10 TB, versus a maximum of 3 TB available with zEC12. The message behind this is that memory is a critical factor in order to improve response time and reduce CPU consumption of modern applications. First rumours say that IBM will be very aggressive on memory pricing. As usual, subcapacity models (4xx, 5xx and 6xx) are available. The entry point is not very different from zEC12, about 250 MIPS (31 MSU). As expected zAAP are not supported anymore. Finally the announced SMT (Symmetric Multi-Thread) revolution has only partially started. IBM decided in fact to provide SMT for zIIP and IFL but not for the standard CPU. z13 Capacity Planning 2 EPV Technologies The reason is that SMT will increase the overall throughput but it will introduce very big challenges from the point of view of single address space performance, variability, measurement and accounting. IBM wisely chose a gentle approach which will allow them and their customers to gain experience with these much less critical resources first. z13 Capacity Planning 3 EPV Technologies 3 IBM LSPR benchmarks and MIPS values On the same day as the announcement a new set of IBM LSPR benchmarks for z/OS 2.1 has been published on the web. These benchmarks are available for all the IBM machines including z13. However for all the machines, except z13, the published values are exactly the same as those already available in the z/OS 1.13 benchmark table. As usual benchmarks for three workload categories are provided: LOW RNI (Relative Nest Intensity): this category represents workloads lightly using the memory nest (shared processor caches and memory). This would be similar to past high scaling primitives. AVERAGE RNI (Relative Nest Intensity): this category represents workloads with an average use of the memory nest (shared processor caches and memory) hierarchy. This would be similar to the past LoIO-mix workload and is expected to represent the majority of production workloads. HIGH RNI (Relative Nest Intensity): this category represents workloads heavily using the memory nest (shared processor caches and memory). This would be similar to the past DI-mix workload. Benchmark values are the ITR ratio between the capacity of each processor model and the capacity of a reference processor model which, as in the z/OS 1.13 table, is the 2094-701. Starting from the published values, shown in the columns with a dark blue header in the Figure below, we calculated the capacity of each processor model, in MIPS, by multiplying the benchmark values by the suggested “capacity scaling factor”1. Only the starting and ending rows of the table are shown here. You can find the full list of z13 processor models in Appendix A. You can note that a PCI value is also provided. It is very close to the AVG MIPS capacity. The difference is due to the lack of precision, only 2 decimals, of the published benchmarks. Processor #CP PCI MSU Low* Average* High* Low MIPS AVG MIPS High MIPS 2964-401 1 250 31 0,47 0,45 0,41 263,1 251,9 229,5 2964-402 2 478 60 0,92 0,85 0,75 515,0 475,8 419,8 2964-403 3 697 88 1,35 1,25 1,09 755,7 699,7 610,2 2964-404 4 910 114 1,78 1,63 1,42 996,4 912,5 794,9 2964-405 5 1118 140 2,20 2,00 1,74 1.231,5 1.119,6 974,0 2964-406 6 1321 165 2,61 2,36 2,05 1.461,1 1.321,1 1.147,6 ………… ….. ……… …….. ……… ……… ……… ……… ……… ……… 2964-7D6 136 108593 12731 251,21 193,99 161,99 140.625,3 108.594,1 90.680,7 2964-7D7 137 109188 12800 252,65 195,05 162,75 141.431,4 109.187,4 91.106,1 2964-7D8 138 109782 12870 254,08 196,11 163,49 142.232,0 109.780,8 91.520,4 2964-7D9 139 110375 12940 255,52 197,17 164,22 143.038,1 110.374,2 91.929,0 2964-7E0 140 110966 13009 256,95 198,23 164,95 143.838,6 110.967,6 92.337,7 2964-7E1 141 111556 13078 258,38 199,28 165,66 144.639,1 111.555,3 92.735,1 Figure 2 1 More information at https://www-304.ibm.com/servers/resourcelink/lib03060.nsf/pages/lsprindex?OpenDocument z13 Capacity Planning 4 flatat8.5(f rises uptobecome The ratioisalsoverystable.Itstartsfrom discounts. MSUcapacitytomake machine z13 Capacity Planning ofthegraphsisvery You canseethattheshape generations. mainframe In thenextfigureyoucanfindMIPStoMSUra EPV Technologies 1,0 2,0 3,0 4,0 5,0 6,0 7,0 8,0 9,0 - 2817-704 2817-710 2817-716 2817-722 2817-728 2817-734 2817-740 2817-746 2817-752 2817-758 2817-764 2817-770 2817-776 2827-705 a capacityofabout26.000MIPS). rom 2827-711 2827-717 2827-723 2827-729 2827-735 2827-741 2827-747 8,1 (8,0 for z196) for single CP processor models and 8,1 (8,0 forz196)singleCPprocessormodels 2827-753 MIPS/MSU Figure 3 Figure 3 2827-759 2827-765 2827-771 2827-777 similar. SoIBMdefin similar. 2827-783 2827-789 2827-795 ofthelast3 tio ofeveryprocessormodel 2827-7A1 2964-703 2964-709 2964-715 2964-721 2964-727 2964-733 2964-739 2964-745 2964-751 2964-757 2964-763 itely stoppedusingthe 2964-769 2964-775 2964-781 2964-787 2964-793 2964-799 2964-7A5 2964-7B1 2964-7B7 2964-7C3 2964-7C9 2964-7D5 5 2964-7E1 EPV Technologies 4 Single CP capacity The graph below shows the maximum capacity of the single CP processor model of each of the last five mainframe generations. Uniprocessor Capacity Full speed modes 1.800 1695 1.600 1514 1.400 1202 1.200 M 1.000 I 902 P 800 S 600 560 400 z9 z10 z196 zEC12 z13 200 0 2094-701 2097-701 2817-701 2827-701 2964-701 Figure 4 You can see that the relative single CP capacity improvement is continuing to decline: from z9 to z10 it improved by 61% from z10 to z196 it improved by 33% from z196 to zEC12 it improved by 26% from zEC12 to z13 it improved by 12%. So it really seems that Moore’s Law is approaching its limits for current commercial technologies. Capacity growth is therefore based on an increasing number of processors and, in the near future, on SMT exploitation. z13 Capacity Planning 6 EPV Technologies 5 Capacity variability The following graph shows a comparison between the last 5 mainframe generations of a variability index calculated using the workload MIPS capacity as follows: Low RNI MIPS – High RNI MIPS ------------------------------------------ Average RNI MIPS You can see that capacity variability grows very quickly with the number of processors then flattens. You can also note that, with the z10 exception, workload variability is increasing with every new generation. Capacity variability by processor family 50% 45% 40% 35% 30% 25% 20% z9 z10 z196 zEC12 z13 15% 10% 5% 0% 2964-7E0 2094-701 2094-711 2094-721 2094-731 2094-741 2094-751 2097-704 2097-714 2097-724 2097-734 2097-744 2097-754 2097-764 2817-707 2817-717 2817-727 2817-737 2817-747 2817-757 2817-767 2817-777 2827-704 2827-714 2827-724 2827-734 2827-744 2827-754 2827-764 2827-774 2827-784 2827-794 2964-710 2964-720 2964-730 2964-740 2964-750 2964-760 2964-770 2964-780 2964-790 2964-7C0 2964-7B0 2964-7A0 2964-7D0 Figure 5 Very big z13 processor models show a variability higher than 45%.

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