IEEE-SA and How Standardization Can Enhance Your Business and Career Case Study in Electronic Design Automation

Yatin Trivedi Member, Board of Governors, IEEE-SA Member, Standards Board, IEEE-SA Member, Education Activities Board, IEEE

Director of Standards and Interoperability, Vienna, March 2015

Contents

Standards and EDA

Impact of EDA standards

Case Study: Successful Standards

Standards as Innovation Platform

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1 IEEE Technical Societies/Councils Top-class technical expert base

. Aerospace & Electronic Systems . Instrumentation & Measurement . Antennas & Propagation . Lasers & Electro-Optics . Broadcast Technology . Magnetics . Circuits & Systems . Microwave Theory & Techniques . Communications . Nanotechnology Council . Components, Packaging, & Manufacturing . Nuclear & Plasma Sciences Technology . Oceanic Engineering Computer . . Power Electronics Computational Intelligence . . Power & Energy Consumer Electronics . . Product Safety Engineering Control Systems . . Professional Communication Council on Electronic Design Automation . . Reliability Council on Superconductivity . . Robotics & Automation Dielectrics & Electrical Insulation . . Sensors Council Education . . Signal Processing Electromagnetic Compatibility . . Social Implications of Technology Electron Devices . . Solid-State Circuits . Engineering in Medicine & Biology . Systems Council . Geosciences & Remote Sensing . Systems, Man, & Cybernetics . Industrial Electronics . Technology Management Council . Industry Applications . Ultrasonics, Ferroelectrics, & Frequency Control Information Theory . . Vehicular Technology . Intelligent Transportation Systems

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IEEE Standards Span a broad spectrum of technologies

Examples: . Aerospace Electronics . Nanotechnology . Broadband Over Power Lines . National Electrical Safety Code . Broadcast Technology . Organic Components . Clean Technology . Portable Battery Technology . Cognitive Radio . Power Electronics . Design Automation . Power & Energy . Electromagnetic Compatibility . Radiation/Nuclear . Green Technology . Reliability . Ethernet/Wi-Fi . Transportation Technology . Medical Device Communications . Test Technology

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2 Technology is Opening the World

© Synopsys 2015 5

And Now…. 1961 – 2011 Apollo Guidance Once Upon A Time… Computer, A 100,000,000X Improvement… ~100 Microns, MIT

S-1 Supercomputer, ~3 Microns, LLNL 4004, 10 Microns,

1961 – 1981 A 10,000X Improvement…

EDA Back Then…

Alpha 21064, Itanium, 180 Ivy Bridge, 22 0.75 Microns Nanometers, Intel Nanometers, Intel

Sources: MIT, 1961; D.E. Weisberg, The Engineering Design Revolution, 2008; 4004, Intel, 1971; Lawrence Livermore National Lab., 1983; Wikimedia Commons; Courtesy of A. Domic; Intel 2001; M. Bohr, Intel, IDF 2011; S. Siers, Intel, ISSCC 2012; Sandra 2011

3 Helping Design the Chips Inside

Mobile Smart Everything Data Center & Networking Digital Home Cloud Infrastructure

Computing & Peripherals Medical Automotive Industrial Military / Aerospace Other

A 100,000,000X Improvement… The Role of EDA & IP

Electronic Smart Everything

Design Increasingly Complex

Automation More Sophisticated

4 EDA: Where Electronics Begins

. Software “tools” for chip design – Architecture design – Functional design and verification – Physical design and verification – Various logic, physical and electrical analyses  . Standards improve productivity – Tool interoperability – Data exchange, sharing, and consistency

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As Technologies Evolve …

. Semiconductor Process: MicronsSubMicronsNanometer

. Transistor/Gate Count: ThousandsMillionsBillions

. Design Methodologies: FlatBlock Hierarchy IP based SoC

. Verification: VectorsTest benchesEnvironments

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5 … So Do Standards

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… and Standards Organizations

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6 EDA Standards Under IEEE

IEEE Std # Description 1076 VHDL 1149 JTAG (Test) 1364 HDL 1450 Standard Test Interface Language (STIL) 1481 Delay & Power Calculation System (DPCS) 1647 Functional Verification Language ‘e’ 1666 System C LRM 1685 IP-XACT 1734 Standard for Electronic Design Intellectual Property (IP) Quality 1735 IP Encryption and Rights Management 1800 System Verilog 1801 Unified Power Format (UPF) 1850 Property Specification Language (PSL)

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IEEE Standards Access at No Charge

Relationship with IEEE-SA: “IEEE Get” program – http://standards.ieee.org/about/get/

Cummulative Downloads 2010-2015 20000

18000

16000

14000

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10000

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0 2010 2011 2012 2013 Jan-14 Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Jan-15 Feb

1666 1685 1800 1801

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7 Example Design Flow: Synopsys Tools

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TestbenchBlah blah blah InitialBlah blah blah yadaBlah yada blah blah yadaBlah yada blah blah Blah blahyada blah yada constraintsBlah blahyada blah yada yidie yadieBlah blah blah yidie yadieBlah blah blah SystemVeril Blah blahyada blah yada Blah blahyada blah yada So on andyidie so yadie forth So on andyidie so yadie forth on andBlah on blah blah on andBlah on blah blah og So on andyidie so yadie forth So on andyidie so yadie forth Jibber jabberon and jibber on Jibber jabberon and jibber on Library Compiler justSo jawing on and so forth justSo jawing on and so forth Jibber jabberon and jibber on Jibber jabberon and jibber on Yacketyjust yackjawing Yacketyjust yackjawing Ya'llJibber com back jabber jibber Ya'llJibber com back jabber jibber Yacketyjust yackjawing RTL Gates Yacketyjust yackjawing Models / IP DesignWare IP Ya'llYackety com back yack Ya'llYackety com back yack Ya'll com back Ya'll com back

Design Compiler RTL Verification Power Compiler Synthesis VCS-MX DFT Compiler Links-to- JupiterXT Design Planning Layout VCS-MX Magellan Design Formality Gate-level ATPG Constraints PrimeTime netlist TetraMAX Gate-level verification IC Compiler Mask Writer Post-Route Place & Route CATS Verification Blah blah blah yadaBlah yada blah blah Blah blahyada blah yada Proteus yidie yadieBlah blah blah PrimeTime STAR- Blah blahyada blah yada So on andyidie so yadie forth on andBlah on blah blah RCXT So on andyidie so yadie forth Jibber jabberon and jibber on NanoSim justSo jawing on and so forth Physical Design Physical Data Jibber jabberon and jibber on Yackety yack Jibberjust jawing jabber jibber GDSII Ya'll com back Hercules Yacketyjust yackjawing HSPICE Ya'llYackety com back yack Checks Creation Ya'll com back

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EDA Community and Standards

Design Verification Engineers Engineers

Tool Design Developers Standards Service Providers

Semiconductor Semiconductor IP Foundry Developers

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8 SystemVerilog Journey

. Ratified as IEEE Std. 1800-2005 – Started with SystemVerilog 3.1a from Accellera – Less than one year from transfer to ratification – More than 200 products support the standard – Rapid adoption across design and verification community . Ratified as IEEE Std. 1800-2009 – Verilog IEEE 1364 completely integrated – Large user community looking for design and verification productivity improvement . Ratified as IEEE Std. 1800-2013 with more enhancements . Free tutorial on IEEE Standards Education website

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SystemVerilog Spawned an Entirely New Business Segment

. Enabled/accelerated IP (design blocks) market segment – One language to write complex design blocks – Same language to verify design blocks – Make IP once, sell many times . Many IP providers for design and verification reuse – Networking, wireless, and consumer applications . Verification IPs as much in demand as design IPs – New methodologies invented • UVM, Assertion based verification, testbench automation . Clear inflection point in the industry to deal with large System-on-Chips

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9 Case Study: IEEE 1801/UPF A Low-Power IC Standard . Ever-growing need for low-power ICs in mobile/portable devices and data centers . Industry recognized need for low-power IC standard – Common way for design and verification engineers to describe IC’s low-power properties . EDA users and vendors came together to develop a format and methodology – Effort started in 2006 under Accellera – Merged 6 technology donations for multi-faceted requirements – Unified Power Format (UPF) created in 6 months . Ratified as IEEE Std. 1801-2009 – Less than 18 months under entity process

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Case Study: IEEE 1685 IP-XACT

. Meta-data about semiconductor IP . Composing systems using/reusing IP – consistent, complete . Originally developed under The SPIRIT Consortium . Ratified as SPIRIT standard in 2007 (version 1.0, 1.5) . XML Schemas published . IP-XACT 1.5 donated to IEEE P1685 . Ratified as IEEE Std. 1685-2010

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10 Standards: Foundation for Research

. Describe new designs/architectures using existing standards – SystemVerilog, SystemC . New algorithms for design optimization, transformation – SystemC  SystemVerilog . New methodologies – Low power, System verification . Power optimization with better testability . 3D design, verification and test methods (new standards?) . Analog/mixed-signal automation . IP integration and validation . Software development using virtual hardware

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New Standards: Area for Research

. What makes a good EDA standard? – Language/format – API (Procedural Interface) – Open Source Implementation – More … . Application specific standards? – EDA for Automotive applications, Health Devices, … . Patents and IP Rights

. Make your research ‘industry-relevant’ . Demonstrate use through formal or de facto standards

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11 Importance of Standards Education

. Standards education recognizes the key role standards play within the engineering, technology and computing fields. . Knowledge of standards can help facilitate the transition from classroom to professional practice by aligning educational concepts with real-world applications. . Incorporating standards into the curriculum … – Benefits students and faculty mentors as they face challenging design processes – Provides tools for use in learning about standards and their impact on design and development . Visit standardseducation.org – Grants for standards based projects

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Summary

 EDA users and vendors have embraced IEEE standards for three decades.  Large user community active in development of standards along with vendors.  Standards help broaden infrastructure for the entire industry and academia.  Education of EDA standards in engineering curriculum is highly significant.  Standards based research accelerate innovation.

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12 Thank you!

Speaker: Yatin Trivedi [email protected] [email protected]

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