Digital Design of a Forward Error Correction System for IEEE 802.15.7
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Prostep Ivip CPO Statement Template
CPO Statement of Mentor Graphics For Questa SIM Date: 17 June, 2015 CPO Statement of Mentor Graphics Following the prerequisites of ProSTEP iViP’s Code of PLM Openness (CPO) IT vendors shall determine and provide a list of their relevant products and the degree of fulfillment as a “CPO Statement” (cf. CPO Chapter 2.8). This CPO Statement refers to: Product Name Questa SIM Product Version Version 10 Contact Ellie Burns [email protected] This CPO Statement was created and published by Mentor Graphics in form of a self-assessment with regard to the CPO. Publication Date of this CPO Statement: 17 June 2015 Content 1 Executive Summary ______________________________________________________________________________ 2 2 Details of Self-Assessment ________________________________________________________________________ 3 2.1 CPO Chapter 2.1: Interoperability ________________________________________________________________ 3 2.2 CPO Chapter 2.2: Infrastructure _________________________________________________________________ 4 2.3 CPO Chapter 2.5: Standards ____________________________________________________________________ 4 2.4 CPO Chapter 2.6: Architecture __________________________________________________________________ 5 2.5 CPO Chapter 2.7: Partnership ___________________________________________________________________ 6 2.5.1 Data Generated by Users ___________________________________________________________________ 6 2.5.2 Partnership Models _______________________________________________________________________ 6 2.5.3 Support of -
Power Reduction of a CMOS High-Speed Interface Using Power Gating
FACULDADE DE ENGENHARIA DA UNIVERSIDADE DO PORTO Power reduction of a CMOS high-speed interface using power gating Luís Miguel Granja Gomes FOR JURY EVALUATION Mestrado Integrado em Engenharia Eletrotécnica e de Computadores FEUP Supervisor: Prof. João Canas Ferreira Synopsys Supervisor: Engineer Hélder Araújo June 25, 2013 c Luís Gomes, 2013 Resumo A indústria de circuitos VLSI sofreu uma série de revoluções na forma como os chips eletrónicos são projetados. Começou com o uso de linguagens de descrição de hardware e de avançadas ferramentas de trabalho, com o objetivo de diminuir os tempos de projeto e de produção, ao mesmo tempo que circuitos mais rápidos e pequenos eram construídos. A produção de dispos- itivos eletrónicos aumentou significativamente, de tal modo que, hoje, são usados biliões todos os dias. Atualmente, o maior desafio não é só projetar circuitos integrados mais pequenos e rápidos, mas manter esses acréscimos de velocidade e diminuição de tamanho, reduzindo simultaneamente o consumo de potência. Com a diminuição do tamanho da tecnologia e o uso de transístores com tensões de threshold cada vez mais reduzidas, o consumo de potência dinâmica e estática atingiu níveis insuportáveis. Chegou-se a um ponto em que, tanto económica como ambientalmente fa- lando, é obrigatório projetar para reduzir a potência. Synopsys, uma das maiores empresas desta indústria, apresentou um projeto com o objetivo de implementar Power Gating numa das suas interfaces de alta velocidade, como técnica mais eficaz na redução da potência estática. Esta dissertação apresenta as adaptações necessárias para a implementação de Power Gating us- ando ferramentas Synopsys, aplicando-as a um caso de estudo complexo. -
Powerpoint Template
Accellera Overview February 27, 2017 Lu Dai | Accellera Chairman Welcome Agenda . About Accellera . Current news . Technical activities . IEEE collaboration 2 © 2017 Accellera Systems Initiative, Inc. February 2017 Accellera Systems Initiative Our Mission To provide a platform in which the electronics industry can collaborate to innovate and deliver global standards that improve design and verification productivity for electronics products. 3 © 2017 Accellera Systems Initiative, Inc. February 2017 Broad Industry Support Corporate Members 4 © 2017 Accellera Systems Initiative, Inc. February 2017 Broad Industry Support Associate Members 5 © 2017 Accellera Systems Initiative, Inc. February 2017 Global Presence SystemC Evolution Day DVCon Europe DVCon U.S. SystemC Japan Design Automation Conference DVCon China Verification & ESL Forum DVCon India 6 © 2017 Accellera Systems Initiative, Inc. February 2017 Agenda . About Accellera . Current news . Technical activities . IEEE collaboration 7 © 2017 Accellera Systems Initiative, Inc. February 2017 Accellera News . Standards - IEEE Approves UVM 1.2 as IEEE 1800.2-2017 - Accellera relicenses SystemC reference implementation under Apache 2.0 . Outreach - First DVCon China to be held April 19, 2017 - Get IEEE free standards program extended 10 years/10 standards . Awards - Thomas Alsop receives 2017 Technical Excellence Award for his leadership of the UVM Working Group - Shrenik Mehta receives 2016 Accellera Leadership Award for his role as Accellera chair from 2005-2010 8 © 2017 Accellera Systems Initiative, Inc. February 2017 DVCon – Global Presence 29th Annual DVCon U.S. 4th Annual DVCon Europe www.dvcon-us.org 4th Annual DVCon India www.dvcon-europe.org 1st DVCon China www.dvcon-india.org www.dvcon-china.org 9 © 2017 Accellera Systems Initiative, Inc. -
Powerplay Power Analysis 8 2013.11.04
PowerPlay Power Analysis 8 2013.11.04 QII53013 Subscribe Send Feedback The PowerPlay Power Analysis tools allow you to estimate device power consumption accurately. As designs grow larger and process technology continues to shrink, power becomes an increasingly important design consideration. When designing a PCB, you must estimate the power consumption of a device accurately to develop an appropriate power budget, and to design the power supplies, voltage regulators, heat sink, and cooling system. The following figure shows the PowerPlay Power Analysis tools ability to estimate power consumption from early design concept through design implementation. Figure 8-1: PowerPlay Power Analysis From Design Concept Through Design Implementation PowerPlay Early Power Estimator Quartus II PowerPlay Power Analyzer Higher Placement and Simulation Routing Results Results Accuracy Quartus II Design Profile User Input Estimation Design Concept Design Implementation Lower PowerPlay Power Analysis Input For the majority of the designs, the PowerPlay Power Analyzer and the PowerPlay EPE spreadsheet have the following accuracy after the power models are final: • PowerPlay Power Analyzer—±20% from silicon, assuming that the PowerPlay Power Analyzer uses the Value Change Dump File (.vcd) generated toggle rates. • PowerPlay EPE spreadsheet— ±20% from the PowerPlay Power Analyzer results using .vcd generated toggle rates. 90% of EPE designs (using .vcd generated toggle rates exported from PPPA) are within ±30% silicon. The toggle rates are derived using the PowerPlay Power Analyzer with a .vcd file generated from a gate level simulation representative of the system operation. © 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. -
November, 2006 Doc.: IEEE 802.11-06/1740R0 IEEE P802.11 Wireless Lans Tentative
November, 2006 doc.: IEEE 802.11-06/1740r0 IEEE P802.11 Wireless LANs Tentative Minutes of the IEEE P802.11 Full Working Group Date: 2006-11-13 Author(s): Name Company Address Phone Email Tim Godfrey Freescale +1-913-814-7883 Abstract Minutes of the 802.11 full working group. Notice: This document has been prepared to assist IEEE 802.11. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE 802.11. Patent Policy and Procedures: The contributor is familiar with the IEEE 802 Patent Policy and Procedures <http:// ieee802.org/guides/bylaws/sb-bylaws.pdf>, including the statement "IEEE standards may include the known use of patent(s), including patent applications, provided the IEEE receives assurance from the patent holder or applicant with respect to patents essential for compliance with both mandatory and optional portions of the standard." Early disclosure to the Working Group of patent information that might be relevant to the standard is essential to reduce the possibility for delays in the development process and increase the likelihood that the draft publication will be approved for publication. -
2.4/5 Ghz Dual-Band 1X1 Wi-Fi 5 (802.11Ac) and Bluetooth 5.2 Solution Rev
88W8987_SDS 2.4/5 GHz Dual-band 1x1 Wi-Fi 5 (802.11ac) and Bluetooth 5.2 Solution Rev. 2 — 21 May 2021 Product short data sheet 1 Product overview The 88W8987 is a highly integrated Wi-Fi (2.4/5 GHz) and Bluetooth single-chip solution, specifically designed to support the speed, reliability, and quality requirements of next generation Very High Throughput (VHT) products. The System-on-Chip (SoC) provides both simultaneous and independent operation of the following: • IEEE 802.11ac (Wave 2), 1x1 with data rates up to MCS9 (433 Mbit/s) • Bluetooth 5.2 (includes Bluetooth Low Energy (LE)) The SoC also provides: • Bluetooth Classic and Bluetooth LE dual (Smart Ready) operation • Wi-Fi indoor location positioning (802.11mc) For security, the device supports high performance 802.11i security standards through implementation of the Advanced Encryption Standard (AES)/Counter Mode CBC- MAC Protocol (CCMP), AES/Galois/Counter Mode Protocol (GCMP), Wired Equivalent Privacy (WEP) with Temporal Key Integrity Protocol (TKIP), AES/Cipher-Based Message Authentication Code (CMAC), and WLAN Authentication and Privacy Infrastructure (WAPI) security mechanisms. For video, voice, and multimedia applications, 802.11e Quality of Service (QoS) is supported. The device also supports 802.11h Dynamic Frequency Selection (DFS) for detecting radar pulses when operating in the 5 GHz range. Host interfaces include SDIO 3.0 and high-speed UART interfaces for connecting Wi-Fi and Bluetooth technologies to the host processor. The device is designed with two front-end configurations to accommodate Wi-Fi and Bluetooth on either separate or shared paths: • 2-antenna configuration—1x1 Wi-Fi and Bluetooth on separate paths (QFN) • 1-antenna configuration—1x1 Wi-Fi and Bluetooth on shared paths (eWLP) The following figures show the application diagrams for each package option. -
Time-Sensitive Networking Technologies for Industrial Automation in Wireless Communication Systems
energies Review Time-Sensitive Networking Technologies for Industrial Automation in Wireless Communication Systems Yoohwa Kang 1 , Sunwoo Lee 2, Songi Gwak 2 , Taekyeong Kim 2 and Donghyeok An 2,* 1 Electronics and Telecommunications Research Institute, Daejeon 34129, Korea; [email protected] 2 Department of Computer Engineering, Changwon National University, Changwon 51140, Korea; [email protected] (S.L.); [email protected] (S.G.); infi[email protected] (T.K.) * Correspondence: [email protected]; Tel.: +82-55-213-3814 Abstract: The fourth industrial revolution is accelerating industrial automation. In industrial net- works, manufacturing processes require hard real-time communication where the latency is less than 1ms. Time-sensitive networking (TSN) technology over Ethernet already supports deterministic de- livery for real-time communication. However, TSN technologies over wireless networks are currently in their initial development stage. Therefore, this study presents an overview of TSN research trends in wireless communications. This paper focuses on 5G networks and IEEE 802.11. We summarize standardization trends for TSN in 5G networks and introduce the TSN technologies for 802.11-based WLAN. Then, we introduce the integration scenario of 5GS with WLAN. This study provides insights into wireless communication technologies for wireless TSN. Keywords: time-sensitive networking (TSN); 5G; 802.11; low latency; reliability; industrial automation Citation: Kang, Y.; Lee, S.; Gwak, S.; Kim, T.; An, D. Time-Sensitive Networking Technologies for 1. Introduction Industrial Automation in Wireless Industrial automation is a representative system attracting attention in the fourth Communication Systems. Energies industrial revolution. In the industrial automation system, data and controls are exchanged 2021, 14, 4497. -
IEEE-SA and How Standardization Can Enhance Your Business and Career Case Study in Electronic Design Automation
IEEE-SA and How Standardization Can Enhance Your Business and Career Case Study in Electronic Design Automation Yatin Trivedi Member, Board of Governors, IEEE-SA Member, Standards Board, IEEE-SA Member, Education Activities Board, IEEE Director of Standards and Interoperability, Synopsys Vienna, March 2015 Contents Standards and EDA Impact of EDA standards Case Study: Successful Standards Standards as Innovation Platform Standards, Business and Career © 2015 IEEE Standards Association Vienna, March 2015 2 1 IEEE Technical Societies/Councils Top-class technical expert base . Aerospace & Electronic Systems . Instrumentation & Measurement . Antennas & Propagation . Lasers & Electro-Optics . Broadcast Technology . Magnetics . Circuits & Systems . Microwave Theory & Techniques . Communications . Nanotechnology Council . Components, Packaging, & Manufacturing . Nuclear & Plasma Sciences Technology . Oceanic Engineering Computer . Power Electronics Computational Intelligence . Power & Energy Consumer Electronics . Product Safety Engineering Control Systems . Professional Communication Council on Electronic Design Automation . Reliability Council on Superconductivity . Robotics & Automation Dielectrics & Electrical Insulation . Sensors Council Education . Signal Processing Electromagnetic Compatibility . Social Implications of Technology Electron Devices . Solid-State Circuits . Engineering in Medicine & Biology . Systems Council . Geosciences & Remote Sensing . Systems, Man, & Cybernetics . Industrial Electronics . Technology Management Council -
Balance De Tráfico Y Provisión De Qos En Redes IEEE 802.11
View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Repositorio Universidad de Zaragoza Trabajo Fin de Grado Balance de tráfico y provisión de QoS en redes IEEE 802.11 Autor Javier García Fortún Director Ángela Hernández Solana Escuela de Ingeniería y Arquitectura 2015 Repositorio de la Universidad de Zaragoza – Zaguan http://zaguan.unizar.es Balance de tráfico y provisión de QoS en redes IEEE 802.11 RESUMEN El espectro radioeléctrico empleado por los dispositivos que funcionan bajo los estándares IEEE 802.11, englobados baja la marca comercial Wi-Fi, es un medio compartido con otros estándares como Bluetooth o ZigBee y con otros equipos del mismo sistema de forma que los recursos disponibles son muy limitados y se encuentran saturados. Además, los despliegues de redes Wi-Fi en edificios y entornos públicos y privados para proporcionar un servicio de acceso a internet a clientes y usuarios son cada vez más habituales. En estos despliegues planificados en modo infraestructura, la gestión de los recursos radio a través de una adecuada planificación de frecuencias, pero también de mecanismos lo más eficientes posibles de ajuste/reajuste de cobertura, selección inteligente de puntos de acceso, algoritmos de balanceo de carga lo más efectivos posibles y de adaptación de tasa en función del estado de la red, se antoja fundamental para conseguir satisfacer las elevadas exigencias que los usuarios presentan en la actualidad. Por otra parte, la demanda de servicios con mayores tasas de descarga y de transmisión para servicios best-effort y de servicios de bajo retardo (VoIP o videojuegos en línea) es cada vez más habitual. -
Volume 10, Issue 1 — March 2014
A PUBLICATION OF MENTOR GRAPHICS — VOLUME 10, ISSUE 1 — MARCH 2014 WHAT’S ON Whether It’s Fixing a Boiler, or Getting THE HORIZON? to Tapeout, It’s Productivity that Matters. By Tom Fitzpatrick, Editor and Verification Technologist The Little Things that Can Make Verification Easier Make verification more As I write this, we’re experiencing yet another winter storm here in New England. It started this productive by keeping your focus on verifying your design’s functionality...page 4 morning, and the timing was fortuitous since my wife had scheduled a maintenance visit by the oil company to fix a minor problem with the pipes before it really started snowing heavily. While the kids were sleeping in due to school being cancelled, the plumber worked in our basement to make The advantages of using the Unified Power Format (UPF) sure everything was working well. It turned out that he had to replace the water feeder valve on the standard with Questa See how Questa was able to model the behaviors boiler, which was preventing enough water from circulating in the heating pipes. Aside from being from their UPF specification...page 8 inefficient, this also caused the pipes to make a gurgling sound, which was the key symptom that led to the service call in the first place. As I see the snow piling Pre-silicon validation of IEEE 1149.1-2013 based Silicon up outside my window (6-8 inches and counting), it’s easy to Instruments Verify the functionality picture the disaster that this could have become had we not of the actual chip through what Intellitech calls “silicon instruments.”...page 13 identified the problem early and gotten it fixed. -
802.11 Arbitration
802.11 Arbitration White Paper September 2009 Version 1.00 Author: Marcus Burton, CWNE #78 CWNP, Inc. [email protected] Technical Reviewer: GT Hill, CWNE #21 [email protected] Copyright 2009 CWNP, Inc. www.cwnp.com Page 1 Table of Contents TABLE OF CONTENTS ............................................................................................................................... 2 EXECUTIVE SUMMARY ............................................................................................................................. 3 Approach / Intent ................................................................................................................................... 3 INTRODUCTION TO 802.11 CHANNEL ACCESS ................................................................................... 4 802.11 MAC CHANNEL ACCESS ARCHITECTURE ............................................................................... 5 Distributed Coordination Function (DCF) ............................................................................................. 5 Point Coordination Function (PCF) ...................................................................................................... 6 Hybrid Coordination Function (HCF) .................................................................................................... 6 Summary ................................................................................................................................................ 7 802.11 CHANNEL ACCESS MECHANISMS ........................................................................................... -
Escuela Politécnica De Ingeniería De Gijón
ESCUELA POLITÉCNICA DE INGENIERÍA DE GIJÓN MÁSTER UNIVERSITARIO EN INGENIERÍA DE TELECOMUNICACIÓN TRABAJO FIN DE MÁSTER Nº 202008 EVALUACIÓN E IMPLEMENTACIÓN DE LTE-A/5G-NR PARA APLICACIONES INDUSTRIALES TIME-CRITICAL GUILLERMO LACALLE MARCOS TUTORES: RAFAEL GONZÁLEZ AYESTARÁN IÑAKI VAL BEITIA JULIO 2020 AGRADECIMIENTOS: A la EPI de Gijón y en especial a Rafael González Ayestarán mi tutor de este TFM y a Samuel Ver Hoeye, por sus conocimientos, por su ayuda y por la formación recibida. A Ikerlan y a todo su personal por la acogida y la enorme oportunidad de integrarme en la Empresa. Mil gracias. Muy especialmente a Iñaki y a Óscar que siempre han estado ahí e hicieron que todo fluyera con naturalidad, por su disposición constante y por todo lo que me enseñaron y me apoyaron. No hay palabras para expresar este agradecimiento. A mi madre y a mi padre. UNIVERSIDAD DE OVIEDO Escuela Politécnica de Ingeniería de Gijón Índice 1 Introducción.................................................................................................. 1 1.1. Motivación ......................................................................................................... 1 1.2. Estado del arte ................................................................................................... 2 1.2.1. La primera generación (1G) ......................................................................... 3 1.2.2. La segunda generación (2G) ........................................................................ 3 1.2.3. La tercera generación (3G) .........................................................................