Pentium® Processor Flexible Motherboard Design Guidelines
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Pentium Processors Have Slightly Different Requirements to Enable and Disable Paging
D Pentium® Processor Family Developer’s Manual Volume 1: Pentium® Processors NOTE: The Pentium® Processor Family Developer’s Manual consists of three books: Pentium® Processors, Order Number 241428; the 82496/82497/82498 Cache Controller and 82491/82492/82493 Cache SRAM, Order Number 241429; and the Architecture and Programming Manual, Order Number 241430. Please refer to all three volumes when evaluating your design needs. 1995 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. The Pentium® processor may contain design defects or errors known as errata. Current characterized errata are available on request. *Third-party brands and names are the property of their respective owners. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 7641 Mt. -
Ultrascale Architecture PCB Design User Guide (UG583)
UltraScale Architecture PCB Design User Guide UG583 (v1.21) June 3, 2021 Revision History The following table shows the revision history for this document. Date Version Revision 06/03/2021 1.21 Chapter 1: Added Recommended Decoupling Capacitor Quantities for Zynq UltraScale+ Devices in UBVA530 Package. In Table 1-13, added row for 1.0 µF. Chapter 2: Added PCB Routing Guidelines for LPDDR4 Memories in High-Density Interconnect Boards. 02/12/2021 1.20 Chapter 1: Added XCKU19P to Table 1-4. Added XCVU23P-FFVJ1760 to Table 1-5. Added XCVU57P-FSVK2892 to Table 1-7. Added VU57P to Table 1-8. Updated first sentence in VCCINT_VCU Plane Design and Power Delivery. Chapter 2: Updated item 13 in General Memory Routing Guidelines. Updated first paragraph in PCB Guidelines for DDR4 SDRAM (PL and PS). Added Routing Rule Changes for Thicker Printed Circuit Boards. Chapter 3: Added XCZU42DR to Table 3-1. Added paragraph about clock forwarding capability in Gen 3 RFSoC devices to Recommended Clocking Options. Added Table 3-11. Updated Powering RFSoCs with Switch Regulators. Added Power Delivery Network Design for Time Division Duplex. Chapter 4: Added bullet about device without DQS pin to DDR Mode (100 MHz). In SD/SDIO, added note about external pull-up resistor after fifth bullet, and added two bullets about level shifters. Chapter 11: Replaced I/O with I/O/PSIO in Unconnected VCCO Pins. 09/02/2020 1.19 Chapter 1: In Table 1-4, updated packages for XQKU5P and XCVU7P, added row for XCVU23P-VSVA1365, and updated note 3. In Table 1-9, updated packages for XCZU3CG, XCZU6CG, XCZU9CG, XCZU3EG, XCZU6EG, XCZU9EG, and XCZU15EG. -
Facebook Server Intel Motherboard V3.0
Facebook Server Intel Motherboard v3.0 Author: Jia Ning, Engineer, Facebook Contents Contents .......................................................................................................................................... 2 1 Scope ......................................................................................................................................... 5 2 Overview ................................................................................................................................... 5 2.1 License ............................................................................................................................. 5 3 Efficient Performance Motherboard v3 Features ..................................................................... 6 3.1 Block Diagram .................................................................................................................. 6 3.2 Placement and Form Factor ............................................................................................ 6 3.3 CPU and Memory ............................................................................................................. 7 3.4 Platform Controller Hub .................................................................................................. 8 3.5 Printed Circuit Board Stackup (PCB) ................................................................................ 8 4 Basic Input Output System (BIOS) ........................................................................................... 10 -
The Intel X86 Microarchitectures Map Version 2.0
The Intel x86 Microarchitectures Map Version 2.0 P6 (1995, 0.50 to 0.35 μm) 8086 (1978, 3 µm) 80386 (1985, 1.5 to 1 µm) P5 (1993, 0.80 to 0.35 μm) NetBurst (2000 , 180 to 130 nm) Skylake (2015, 14 nm) Alternative Names: i686 Series: Alternative Names: iAPX 386, 386, i386 Alternative Names: Pentium, 80586, 586, i586 Alternative Names: Pentium 4, Pentium IV, P4 Alternative Names: SKL (Desktop and Mobile), SKX (Server) Series: Pentium Pro (used in desktops and servers) • 16-bit data bus: 8086 (iAPX Series: Series: Series: Series: • Variant: Klamath (1997, 0.35 μm) 86) • Desktop/Server: i386DX Desktop/Server: P5, P54C • Desktop: Willamette (180 nm) • Desktop: Desktop 6th Generation Core i5 (Skylake-S and Skylake-H) • Alternative Names: Pentium II, PII • 8-bit data bus: 8088 (iAPX • Desktop lower-performance: i386SX Desktop/Server higher-performance: P54CQS, P54CS • Desktop higher-performance: Northwood Pentium 4 (130 nm), Northwood B Pentium 4 HT (130 nm), • Desktop higher-performance: Desktop 6th Generation Core i7 (Skylake-S and Skylake-H), Desktop 7th Generation Core i7 X (Skylake-X), • Series: Klamath (used in desktops) 88) • Mobile: i386SL, 80376, i386EX, Mobile: P54C, P54LM Northwood C Pentium 4 HT (130 nm), Gallatin (Pentium 4 Extreme Edition 130 nm) Desktop 7th Generation Core i9 X (Skylake-X), Desktop 9th Generation Core i7 X (Skylake-X), Desktop 9th Generation Core i9 X (Skylake-X) • Variant: Deschutes (1998, 0.25 to 0.18 μm) i386CXSA, i386SXSA, i386CXSB Compatibility: Pentium OverDrive • Desktop lower-performance: Willamette-128 -
Premiere/PCI II Baby-AT Board & Expandable Desktop
Premiere/PCI II Baby-AT Board & Expandable Desktop Technical Product Summary Version 2.0 December, 1994 Order Number 281626-002 ® Premiere/PCI II Technical Product Summary Table of Contents Introduction............................................................................................................................................ 3 Board Level Features ............................................................................................................................. 4 CPU Performance Upgrade Second Level Cache System Memory Expansion Slots Peripheral Component Interconnect (PCI) Chip Set SMC 37C665 Super I/O Controller Keyboard Interface Dallas DS12887 Real Time Clock, CMOS RAM And Battery System BIOS Connectors System Level Features............................................................................................................................ 10 Chassis Peripheral Bays Fan Expansion Slots Front and Back Panel Power Supply and Power Consumption Floppy Drive Speaker Chassis Color Appendix A - User-Installable Upgrades............................................................................................... 12 Appendix B - Jumpers........................................................................................................................... 13 Appendix C - Connectors ...................................................................................................................... 14 Appendix D - Memory Map ................................................................................................................. -
Parasitic Component Analysis and Acoustic Noise Evaluation in Voltage Regulator Modules (Vrms)
Parasitic Component Analysis and Acoustic noise evaluation in Voltage Regulator Modules (VRMs) A THESIS SUBMITTED TO THE FACULTY OF UNIVERSITY OF MINNESOTA BY PRANIT JANNAWAR IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF SCIENCE Ned Mohan, Adviser June, 2015 © Pranit Jannawar 2015 Acknowledgements I would like to thank my adviser Prof. Ned Mohan for his support and advice. I appreciate his patience in guiding me throughout the period. I have learnt what kind of effort is put into the research and what kind of attitude is required to address a technical issue. I would like to mention the efforts of my fellow mates in the lab who helped me obtaining components and hardware in timely manner. Finally, I express my gratitude to my parents for their emotional support and encouragement. i Abstract Stable and regulated supply voltage has been an important topic of discussion in a consumer electronic products. Every chip and device requires specified voltages with small margins. Voltage regulated modulators (VRMs) have always been proven to provide a solution to this problem. Building a power stage using point of load method helps overcome variability issue in the signal but introduces a converter with lot of supporting components. Multiple combination of capacitors and resistors of different material composition are required to obtain an optimal design for the product. PCB parasitic comes into play and due to high current slew rate physical stress builds up in the caps which tend to come out in form of acoustic noise. This thesis deals with such issues which can improve the product quality but keeping the cost low by utilizing and analyzing components the proper way. -
Intel: 3002, 4004, 4040, 8008, 8080, 8085, MCS48, MCS51, 80X86 up To
Intel: 3002, 4004, 4040, 8008, 8080, 8085, MCS-48, MCS-51, 80x86 up to 80386, 80860, 80960, SA-110 Intel 80486: 80486, 80486 overdrive Intel Pentium: Pentium, Pentium MMX, Pentium Overdrive, Mobile Pentium Intel Pentium II: Boxed Pentium II, Boxed Pentium Pro, Mobile Pentium II and Celeron modules Intel Pentium III: Pentium III markings, Mobile Pentium III and Celeron modules Intel modern CPUs: Pentium II, Pentium III, Pentium 4, Core Duo, Core Solo, Core 2 Duo, Core 2 Quad, Core 2 Extreme, Xeon, Pentium Dual Core, Celeron, Celeron D, Celeron Dual Core Intel 287 adapter Intel 3002 Intel 478-pin FC-PGA Thermal Sample Intel 80188 Intel 80486 Mech sample Intel 8080A Intel 80P23T-25 Intel A100 UM80536UC600512 Intel A110 UM80536UC800512 Intel A80186 Intel A80186-10 Intel A80188 Intel A80188-10 Intel A80286-10 Intel A80286-12 Intel A80286-8 Intel A80376-16 Intel A80376-20 Intel A80386-16 Intel A80386-20 Intel A80386-25 Intel A80386DX-16 Intel A80386DX-16 IV Intel A80386DX-20 Intel A80386DX-20 IV Intel A80386DX-25 Intel A80386DX-25 IV Intel A80386DX-33 IV Intel A80386DX16 Intel A80386EXI Intel A80387-16 Intel A80387-20 Intel A80387-20B Intel A80387-25 Intel A80387DX-16 (with logo) Intel A80387DX-16-33 Intel A80387DX-20 Intel A80387DX-25 Intel A80387DX-33 Intel A80486DX-33 Intel A80486DX-50 Intel A80486DX2-50 Intel A80486DX2-66 Intel A80486DX4-100 Intel A80486DX4-75 Intel A80486SX-16 Intel A80486SX-20 Intel A80486SX-25 Intel A80486SX-33 Intel A80486SX2-50 Intel A80487SX Intel A80860XP-40 Intel A80860XP-50 Intel A80860XR-25 Intel A80860XR-33 Intel -
Pentium® Processor Family Developer's Manual
D Pentium® Processor Family Developer’s Manual Volume 1: Pentium® Processors NOTE: The Pentium® Processor Family Developer’s Manual consists of three books: Pentium® Processors, Order Number 241428; the 82496/82497/82498 Cache Controller and 82491/82492/82493 Cache SRAM, Order Number 241429; and the Architecture and Programming Manual, Order Number 241430. Please refer to all three volumes when evaluating your design needs. 1995 PATENT NOTICE Through its investment in computer technology, Intel Corporation (Intel) has acquired numerous proprietary rights, including patents issued by the U.S. Patent and Trademark Office. Intel has patents covering the use or implementation of processors in combination with other products, e.g., certain computer systems. System and method patents or pending patents, of Intel and others, may apply to these systems. A separate license may be required for their use (see Intel Terms and Conditions for details). Specific Intel patents include U.S. patent 4,972,338. Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in this document nor does it make a commitment to update the information contained herein. Intel retains the right to make changes to these specifications at any time, without notice. Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order. -
Premiere/PCI Baby-AT Board & Expandable Desktop
Premiere/PCI Baby-AT Board & Expandable Desktop Technical Product Summary Final Review Copy Version 2.0 March, 1994 Order Number 281604-002 ® Premiere/PCI Baby-AT Technical Product Summary · Page 2 Intel Corporation disclaims all warranties and liabilities for the use of this document and the information contained herein, and assumes no responsibility for any errors which may appear in this document. Intel makes no commitment to update the information contained herein, and may make changes at any time without notice. There are no express or implied licenses granted hereunder to any intellectual property rights of Intel Corporation or others to design or fabricate Intel integrated circuits or integrated circuits based on the information in this document. Contact your local sales office to obtain the latest specifications before placing your order. The following are trademarks of Intel Corporation and may only be used to identify Intel products: AboveÔ ICEä LANDeskÔ ActionMediaâ iCOMPä MCSâ DVIâ Indeoä NetPortÔ EtherExpressÔ Insight960™ NetportExpress™ ExCAÔ Intel287Ô OverDriveÔ FlashFileÔ Intel386Ô ParagonÔ i287Ô Intel387Ô PentiumÔ i386Ô Intel486Ô RapdiCADä i387Ô Intel487Ô SatisFAXtionâ i486Ô Intel Insideâ Solutions960™ i487Ô IntelDX2™ StorageExpressä i750â IntelDX4™ TokenExpressÔ i860ä iPSCâ i960â iRMX® The Indeo, OverDrive and Pentium logos are trademarks and the Intel and Intel Inside logos are registered trademarks of Intel Corporation. Intel Corporation and Intel’s FASTPATH are not affiliated with Kinetics, a division of Excelan, Inc. or its FASTPATH trademark or products. MDS is an ordering code only and is not used as a product name or trademark. MDS is a trademark or registered trademark of its respective owner. Additional copies of Intel literature may be obtained from: Intel Corporation Literature Sales P.O. -
Pentium® Processor Family Developer's Manual
D Pentium® Processor Family Developer’s Manual 1997 12/19/96 9:12 AM Front.doc Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Pentium® processor may contain design defects or errors known as errata. Current characterized errata are available on request. MPEG is an international standard for video compression/decompression promoted by ISO. Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses from various entities, including Intel Corporation. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. -
Xeon™ Processor Voltage Regulator Down (VRD) Design Guidelines
® Dual Intel® Xeon Processor Voltage Regulator Down (VRD) Design Guidelines July 2003 Order Number 298644-003 Dual Intel® Xeon Processor Voltage Regulator Down (VRD) Guidelines THIS DOCUMENT AND RELATED MATERIALS AND INFORMATION ARE PROVIDED "AS IS" WITH NO WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NON- INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION, OR SAMPLE. INTEL ASSUMES NO RESPONSIBILITY FOR ANY ERRORS CONTAINED IN THIS DOCUMENT AND HAS NO LIABILITIES OR OBLIGATIONS FOR ANY DAMAGES ARISING FROM OR IN CONNECTION WITH THE USE OF THIS DOCUMENT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked reserved or undefined. Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. This document contains information on products in the design phase of development. Do not finalize a design with this information. Revised information will be published when the product is available. -
Analysis of Low Voltage Regulator Efficiency Based
ANALYSIS OF LOW VOLTAGE REGULATOR EFFICIENCY BASED ON FERRITE INDUCTOR by MRIDULA KOTHAKONDA A THESIS Submitted in partial fulfillment of the requirements for the degree of Master of Science in the Department of Electrical and Computer Engineering in the Graduate School of The University of Alabama TUSCALOOSA, ALABAMA 2010 Copyright Mridula Kothakonda 2010 ALL RIGHTS RESERVED ABSTRACT Low voltage regulator based on ferrite inductor, using single- and two-phase topologies, were designed and simulated in MATLAB. Simulated values of output voltage and current were used to evaluate the buck converter (i.e., low voltage regulator) for power efficiency and percentage ripple reduction at frequencies between 1 and 10 MHz with variable loads from 0.024 to 4 Ω. The parameters, such as inductance of 20 nH, quality factor of 15 of fabricated ferrite inductor and DC resistance (DCR) of 8.3 mΩ, were used for efficiency analysis of the converter. High current around 40 A was achieved by the converter at low load values. Low output voltage in the range of 0.8-1.2 V was achieved. The simulated results for the single- and two- phase converter were compared for maximum efficiency and lowest ripple in output voltage and current. The maximum efficiency of 97 % with load of 0.33 Ω and the lowest ripple current of about 2.3 mA were estimated for the two-phase converter at 10 MHz. In summary, the two- phase converter showed higher efficiency and lower ripple voltage and current than those of the single-phase converter. In addition, the efficiency of single- and two-phase converters based on ferrite inductor was compared to single- and two-phase converters based on air-core inductor.