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Loi De Moore, Loi D'amdhal, Quel Futur? La Vision D'intel

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Loi De Moore, Loi D'amdhal, Quel Futur? La Vision D'intel LOI DE MOORE, LOI D’AMDHAL, QUEL FUTUR? LA VISION D’INTEL Philippe Thierry SrSrStaff Engineer Intel Corp. Marc Dollfus Responsable HPC secteur public et recherche Intel France Idris --88 janvier 2009 1 Copyright © 2008, Intel Corporation Legal Disclaimers Performance tests and ratings are measured using specific computer systems and/or components and reflect the approximate performance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performance. Buyers should consult other sources of information to evaluate the performance of systems or components they are considering purchasing. For more information on performance tests and on the performance of Intel products, visit http://www.intel.com/performance/resources/limits.htm or call (U.S.) 1-800-628-8686 or 1-916-356-3104. Results were derived using simulations run on an architecture simulator or model. Any difference in system hardware or software design or configuration may affect actual performance* All dates and products specified are for planning purposes only and are subject to change without notice Relative performance is calculated by assigning a baseline value of 1.0 to one benchmark result, and then dividing the actual benchmark result for the baseline platform into each of the specific benchmark results of each of the other platforms, and assigning them a relative performance number that correlates with the performance improvements reported. SPEC, SPECint2000, SPECfp2000, SPECint2006, SPECfp2006, SPECjbb, are trademarks of the Standard Performance Evaluation Corporation. See http://www.spec.org for more information. Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor series, not across different processor sequences. See http://www.intel.com/products/processor_number for details. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. All dates and products specified are for planning purposes only and are subject to change without notice Intel, Intel Xeon, Intel Core microarchitecture, and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. * Other names and brands may be claimed as the property of others. Copyright © 2008 Intel Corporation. 2 Copyright © 2008, Intel Corporation 1 Intel in High Performance Computing : the big picture Leading Process Manufacturing Leading performance, performance/watt Advanced HPC R&D Dedicated, Broad SW renowned tools expertise portfolio Large scale clusters for test & optimization Defined HPC Platform application building platform blocks A long term commitment to HPC 3 Copyright © 2008, Intel Corporation Agenda: from the micromicro--archarch to the end users 4 Copyright © 2008, Intel Corporation 2 Agenda: from the micromicro--archarch to the end users 5 Copyright © 2008, Intel Corporation Agenda: from the micromicro--archarch to the end users 6 Copyright © 2008, Intel Corporation 3 What G. Moore predicted ?? • 1971 Intel® 4004 : 4/8 bits, 108 kHz, 2300 transistors • 1972 Intel® 8008 : 8 bits, 200 kHz, 3500 transistors • 1974 Intel® 8080 : 8 bits, 2 Mhz, 4500 transistors • 1978 Intel® 8086-8088 : 16 bits, 5 MHz, • 1982 Intel® 80286 : 16/32 bits, plus de 100.000 transistors • 1985 Intel® 80386 : 32 bits, 275.000 transistors • 1989 Intel® 80486 : 32 bits, 25 à 66 MHz, 1,6 millions de transistors • 1993 Intel® Intel® Pentium® : 32 bits, 75 à 133 MHz, 3,1 millions de transistors • 1995 Intel® Pentium® Pro : 32 bits, 150 à 200 MHz, 5,5 millions de transistors • 1997 Intel® Intel® Pentium® II : 32 bits, 7,5 millions de transistors • 1999 Intel® Pentium® III : 32 bits, 450 à 600 MHz, 9,5 millions de transistors • 1999 Intel® Celeron® : 32 bits, 9,5 millions de transistors • 2000 Intel® Pentium® 4 : 32 bits, 1,5 GHz, 42 millions de transistors 7 Copyright © 2008, Intel Corporation Not a simple linear function !! 8 Copyright © 2008, Intel Corporation 4 FOR simple circuits, the cost per component is nearly inversely proportional to the number of components, the result of the equivalent piece of semiconductor in the equivalent package containing more components. But as components are added , decreased yields more than compensate for the increased complexity, tending to raise the cost per component. Thus, there is a minimum cost at any given time in the evolution of the technology. … If we look ahead five years, a plot of costs suggests that the minimum cost per component might be expected in circuits with about 1,000 components per circuit In 1970, the manufacturing cost per component can be expected to be onlya tenth of the present cost. The complexityfor minimum component costs has increased at a rate of roughly a factor of two per year . Certainlyover the short termthis rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years. That means by 1975, the number of components per integrated circuit for minimum cost will be 65,000. I believe that such a large circuit can be built on a single wafer. Electronics, Volume 3838,, Number 88,, April 1919,, 1965 9 Copyright © 2008, Intel Corporation Conclusion intermédiaire 11 • La loi de Moore n’a jamais signifiée – plus de performance – plus de hpc, plus de //ism, plus de scalabilité Juste « il existe un tjs un bon rapport prix / nb de transitor sur un circuit !! » Implicitement , le nb de transistor augmente et les capacités du dit circuit aussi ;-) Mais la seule (?) loi qui domine en HPC reste la loi d’Amdhal et assimilée 10 Copyright © 2008, Intel Corporation 5 However … 11 Copyright © 2008, Intel Corporation Latest steps nb transitor freq (khz) 1000 3,50E+03 100 3,00E+03 10 2,50E+03 1 0,1 2,00E+03 0,01 1,50E+03 0,001 1,00E+03 0,0001 0,00001 5,00E+02 0,000001 0,00E+00 1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007 2009 12 Copyright © 2008, Intel Corporation 6 2007 Latest steps 2005 2003 2000 45nm 300mm 65nm 300mm 9090nmnm Dual Core 1000 300300mmmm 3,50E+03 100 130130nmnm 200200mmmm 3,00E+03 10 2,50E+03 1 0,1 2,00E+03 0,01 1,50E+03 0,001 1,00E+03 0,0001 0,00001 5,00E+02 0,000001 0,00E+00 1971 1973 1975 1977 1979 1981 1983 1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007 2009 13 Copyright © 2008, Intel Corporation 45 nm HiHi--kk Intel Processor Quad core Intel ® Xeon ® 53xx (Clovertown) Quad core Intel ® Xeon ® 54xx (Harpertown) 65 nm 45 nm Hi-k 22** 22** 22** 22** 143 mm 143 mm 107 mmmm 107 mmmm 582582mm Transistors 820820mm Transistors 8 MB Cache 12 MB Cache 14 *Source: Intel Note: die picture sizes are approximate Copyright © 2008, Intel Corporation 7 Industry’s First 45 nm HighHigh--KK + Metal Gate TransistTransistoror Improved Transistor Density ~~22xx Improved Transistor Switching Speed >>2200%% Reduced Transistor Switching Power ~~3300%% Reduction in gate oxide leakage power >>1100xx 65 nnmm 45 nm 15 Copyright © 2008, Intel Corporation HighHigh--kk + metal gate transistors 16 Copyright © 2008, Intel Corporation 8 High-k + metal gate transistors « The implementation of high-k and metal gate materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s », G. Moore, 2007 17 Copyright © 2008, Intel Corporation Intel Driving Moore’s Law into the Future 90nm Node 2003 6655nmnm Node Node 2005 4455nmnm Node Node 2007 3322nmnm Node Node 2009 2222nmnm Node Node 2011 1166nmnm Node Node 2013 25 nnmm 1111nmnm Node Node 2015 88nmnm Node 1155nnmm 2017 77nnmm 55nnmm 3nm 18 Copyright © 2008, Intel Corporation 9 Tick --TockTock Intel ®® Sandy Core™ Penryn Nehalem Westmere Bridge NEW Compaction/ NEW Compaction/ NEW Microarchitecture Derivative Microarchitecture Derivative Microarchitecture 65nm 45nm 4545nmnm 3232nmnm 3232nmnm Tock Tick Tock Tick Tock Montecito/ Montvale Tukwila Poulson 90 nm NEW NEW Microarchitecture Microarchitecture Forecast Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United StateStates as andnd other countries. All 19 products, dates, and figures are preliminary and are subject to change without notice. Copyright © 2008, Intel Corporation Intel® HPC Roadmap 2008 2009 2010 2011 1H 2H 1H 2H 1H 2H 1H 2H Montvale (2C/4T) Tukwila New u-arch Critical Mission Tigerton (4C) Dunnington (6C) Nehalem-EX Caneland w/ Clarksboro chipset EXpandable Harpertown (4C) Derivative New u-arch Wolfdale-DP (2C) Nehalem-EP Efficient Bensley w/Blackford Tylersburg-EP Performance Stoakley w/Seaburg Nehalem-EP Derivative Harpertown (4C) Wolfdale-DP (2C) Tylersburg-EN New u-arch ENtry 20 Copyright © 2008, Intel Corporation 10 Nehalem--EPEP ••44 cores ••8M8M onon--chipchip Shared Cache • 3-level cache hierarchy • 32k I-Cache + 32k D-cache • New 256k L2 cache per core Nehalem-EP • New shared last level cache • Inclusive Cache Policy Core Core Core Core ••SimultaneousSimultaneous MultiMulti--ThreadingThreading capability (SMT) ••QuickPathQuickPath interconnect 8M Shared Cache • Point-to-Point Memory Link • 2 links per CPU socket Controller Controller • 1 for connection to other socket • 1 for connection to chipset • Up to 6.4 GT/sec (12.8 GB/sec) in 3 DDR3 Two each direction per link ( Fully duplex) channels QuickPath ••IntegratedIntegrated
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