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Logic Devices Logic Devices Contents of Part III Introduction to Part III 323 13 Silicon MOSFETs – Novel Materials and Alternative Concepts 359 14 Ferroelectric Field Effect Transistors 387 15 Quantum Transport Devices Based on Resonant Tunneling 407 16 Single-Electron Devices for Logic Applications 425 17 Superconductor Digital Electronics 445 18 Quantum Computing Using Superconductors 461 19 Carbon Nanotubes for Data Processing 473 20 Molecular Electronics 501 Introduction III Introduction to Part III Contents 1 Fundamentals of Logic Devices 324 1.1 Requirements for Logic Devices 324 1.2 Dynamic Properties of Logic Gates 327 1.3 Threshold Gates 327 2 Physical Limits to Computation 328 3 Concepts of Logic Devices 332 3.1 Classifications 332 3.2 Two-Terminal Devices 332 3.3 Field Effect Devices 333 3.4 Coulomb Blockade Devices 334 3.5 Spintronics 335 3.6 Quantum Cellular Automata 337 3.7 Quantum Computing 339 3.8 DNA Computer 340 4 Architectures 340 4.1 Flexibility of Systems for Information Processing 340 4.2 Parallel Processing and Granularity 343 4.3 Teramac – A Case Study 344 5 Performance of Information Processing Systems 345 5.1 Basic Binary Operations 345 5.2 Measures of Performance 347 5.3 Processing Capability of Biological Neurons 348 5.4 Performance Estimation for the Human Brain 350 6 Ultimate Computation 353 6.1 Power Dissipation Limit 353 6.2 Dissipation in Reversible Computation 354 6.3 The Ultimate Computer 355 In the General Introduction, we briefly looked at information processing and logic in an abstract manner, i.e. without considering the physical realization. Chap. 7 gave a short survey of the two-valued digital logic, realized by conventional CMOS technology – from individual gates to microprocessors. Here, we will broaden our viewpoint again. Firstly, we will discuss the fundamental requirements for logic devices. These are requirements which are valid for CMOS devices, as well as for biological neurons, superconducting logic devices, and any other conceivable physical implementation of logic. Subsequently, we will review the physical limitations of computing and we will give an overview of physical implementation concepts. Here, we will also introduce those concepts which are – for various reasons – not covered by individual chapters in this textbook. We will then briefly report on some major aspects of architecture and we will present general estimations of the performance of information processing systems. Finally, we will try to sketch the ultimate computer. 323 III Logic Devices 1 Fundamentals of Logic Devices 1.1 Requirements for Logic Devices In order to perform information processing in the real, physical world, the logical states must be mapped onto physical properties. This mapping may take place •on the amplitude of physical properties, as e.g. the voltage levels in the CMOS cir- cuits, or •on the time evolution, i.e. the timing of pulses of a physical property. This is employed, for example, in the RSFQ logic (Chap. 17), and, in some aspects, in bio- Figure 1: As an example, the voltage level repre- logical neurons (Chap. 6). sentation of 2-valued logical states is shown, as The physical properties mentioned here can be selected without much restrictions, as realized in conventional digital CMOS circuits. long as the devices fabricated fulfill the requirements below. The mapping of logical Since the high values (H) correspond to the “1” and states will always be on intervals of physical properties (for example, the voltage) in the low values (L) to the “0”, this is an example of order to build up interference resistance, i.e. immunity against noise and signal scatter positive logic. In negative logic, the relationships (Figure 1). are mutually exchanged. There is a range of indispensable requirements for logic devices which make it possi- ble to assemble sequential switching circuits (including processors of any kind) of, in prin- ciple, unlimited size. Some of the requirements may be relaxed, if the size of the circuit, i.e. the number of gates, is kept within certain limits. In order to demonstrate the general applicability of these requirements, we will discuss them using the Si-based CMOS tech- nology on the one hand and biological neurons on the other hand as examples. Requirement #1: Non-linear characteristics Logic gates need to show a non-linear transfer characteristic (Figure 2). This is required to maintain a sufficient signal-to-noise ratio even in unlimited long chains of gates. The output signal intervals are smaller than the input signal intervals, i.e. the difference between “0” and “1” is increased, because the output signal intervals must fit into the input signal intervals also in the presence of noise and signal scatter. To achieve this, the gate will amplify the signal (i. e. ! > 1) in the center region. The noise is reduced since it occurs in the region of the characteristics with ! < 1, leading to a compression of the intervals. In principle, it is possible to create logic processing systems also from linear ampli- fiers [1]. These systems are called analog computers and can be used to solve e.g. differ- ential equations up to a certain size. However, since every amplifying stage inherently adds to the noise, the signal-to-noise ratio decreases in long concatenated chains of stages, if no non-linear element is build in. The non-linearity of digital CMOS gates stems from the output characteristics of Figure 2: Transfer characteristic of a logic gate the MOSFETs in combination with the external circuit in these gates (Figure 3). In the showing the non-linear characteristic. Due to the case of neurons, one important non-linearity is obtained by the threshold function which center region of v > 1, and signal level region of guarantees that only signal voltages exceeding the threshold voltage trigger action v < 1, the allowed input signal window (between potential pulses which are then transferred along the axon. This threshold gate operation xL,min and xL,max as well as xH,min and xH,max) are will be described in some more detail in Sec. 1.3. There are many additional non-linear- mapped onto smaller windows on the output signal ities in biological neurons, as for example the transfer function of signals across the syn- axis. This improves the signal-to-noise ratio. apses, which play an important controle in neuronal information processing. Remark: for educational reasons, this simple unity gate is shown here, although it is not performing a Requirement #2: Power amplification logic operation. It may only used as a buffer. An In order to maintain the signal level during logic processes over long concatenated inversion of the characteristics leads to a NOT gate. chains of gates, power amplification is necessary. This amplification balances signal losses which are unavoidable during processing. It is not sufficient to have only signal amplification (e.g. voltage amplification), since every logic process is a switching proc- ess, and switching inherently involves energy. In the case of digital CMOS circuits, the output of a logic gate must not only fulfil the voltage amplification set by requirement #1, but has to drive currents to charge and discharge the line capacitance and input capacitances of the subsequent gates. In addition, it needs to drive at least two inputs to Figure 3: Sketch of the fundamental requirements of logic devices and their facilitate the branching of signals in complex circuits. The number of inputs one output realization in CMOS logic (left) and can drive is called FAN-OUT. biological neurons (right). In many Reversible computing means that the energy required for a switching process is not aspects, the illustrations are simplified dissipated but recovered to facilitate a subsequent switching process. In Sec. 6.2, we will to emphasize the key points. In some see that there is an inherent energy dissipation even for reversible computation at a finite cases, identity gates are used as an rate. Hence, in principle, the requirement of power amplification is valid for reversible example of CMOS logic. The CMOS- computing, too. based AND and OR function are shown only to illustrate the principle. In real In biological neurons, the power amplification is performed by the voltage-triggered CMOS circuits, NAND and NOR gates (voltage-gated) ion channels along the axon which utilize the electrochemical potential (without resistors) are used. difference between the inside and the outside of the cell membrane based on the concen- 324 Introduction III 325 III Logic Devices tration difference of the Na+ and K+ ions (Chap. 6). The operation of these ion channels ensures a constant amplitude of the action potential pulse while it is travelling along the axon which may be more than 1 m long. The concentration difference is restored by the Na+/K+ pump channels which consumes chemical energy (supplied as ATP). Requirement #3: Concatenability This requirement simply means that the input signal and the output signal must be com- patible, i.e. they are based on the same physical property and value range. For instance, if output signals were optical and the input signals were electrical, a logic circuit could not be built. A signal converter would be required, the addition of which would fulfil the requirement. Similarly, the signal levels must fit. If, for instance, a gate adds a signifi- cant offset to the signal, the output signal intervals will not meet the allowed input signal intervals (see Figure 2) and, again a converter, would be needed. In biological neurons, the concatenability is given by the fact that the neurotrans- mitter molecules released (output) by the synaptic terminal into the synaptic cleft find highly specific receptors (input) at the ligand-gated ion channels of the postsynaptic neuron (Chap.6 ). Requirement #4: Feedback prevention In order to execute a calculation, we need a directed flow of information.
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