EE-612: Lecture 16: MOSFET Leakage

Mark Lundstrom Electrical and Computer Engineering Purdue University West Lafayette, IN USA Fall 2008

NCN www.nanohub.org Lundstrom EE-612 F08 1 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 2 leakage components

4) 0 3) VD n+ 1) n+ 2)

p-Si 1) subthreshold current 2) junction leakage 3) gate-induced drain leakage (GIDL) 4) gate-leakage Lundstrom EE-612 F08 3 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 4 drain leakage current

I D ,VD 0 n+ n+

p-Si

Lundstrom EE-612 F08 5 junction leakage current components

equilibrium VD = VDD 1) diffusion current EC 2) generation current EF FP 3) avalanche current EC EV qVDD 4) Zener tunnel current

FN EV

I D > 0 p-substrate n+ drain p-substrate n+ drain

Lundstrom EE-612 F08 6 diffusion current

VD = VDD

FP D n2 qVDD n i qVD kBT EV Jn = q (e − 1) Ln N A FN

I D p-substrate n+ drain

Lundstrom EE-612 F08 7 generation current

VD = VDD

n i qVD 2kBT FP Jn = qWeff ()VD ()e − 1 2τ EV

I D

p-substrate n+ drain

Lundstrom EE-612 F08 8 avalanche current

VD = VDD dJn = α n Jndx + α p J pdx EC

empirical expression: α = Ae−b/E

FP the peak electric field is the EV most important FN α decreases as T increases

I D

p-substrate n+ drain

Lundstrom EE-612 F08 9 BTBT in the drain-substrate junction

V = V D DD expect J(BTBT) to vary as: e− EG A

also should vary as: e−WDEPL B FP −CE qVDD e F BTBT N EC

EV p-substrate n+ drain

Lundstrom EE-612 F08 10 BTBT in the drain-substrate junction

k-space VD = VDD

FP k qV X DD k FN BTBT EC

EV conserve crystal momentum by phonon defect-assisted tunneling emission or absorption

Lundstrom EE-612 F08 11 BTBT (iii)

tunneling probability should involve the barrier height (EG) and the barrier width (depletion layer)

2m* q3EV ⎡ 42m* E 3/2 ⎤ J = DD exp ⎢− G ⎥ eqn. (2.27) of B− B 4π 3h2E1/2 3qEh Taur and Ning G ⎣⎢ ⎦⎥

2qN (V + V ) E = A DD bi εSi

18 -3 2 for NA = 5 x 10 cm , VDD=1V, JB-B ~ 1A/cm

Lundstrom EE-612 F08 12 BTBT and halos

n+ n+

‘strong’ halos can lead to high leakage p-Si

Lundstrom EE-612 F08 13 BTBT: effect on I-V

log I D VDS = 1.1V

VDS = 0.05V

VD ↑ qV( −V )/mk T e GS T B

VGS drain junction leakage Lundstrom EE-612 F08 14 BTBT (iv)

BTBT trends

BTBT is becoming increasingly important as channel doping densities increase.

It is also a concern for alternative channel materials with smaller bandgaps.

Lundstrom EE-612 F08 15 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 16 gate-induced BTBT

VG ≤ 0

0 VD n+ n+

BTBT can occur at the surface!

p-Si

Lundstrom EE-612 F08 17 gate-induced BTBT: effect on I-V

log I D VDS = 1.1V

VDS = 0.05V

(V −V )/mk T e GS T B

VGS

Lundstrom EE-612 F08 18 gate-induced drain leakage (GIDL)

VG < VDD

0 VDD n+ n+ x depletion region in the n+ drain p-Si

Lundstrom EE-612 F08 19 GIDL (iii)

BTBT FN

Lundstrom EE-612 F08 20 GIDL (iii)

VG < VDD

0 VDD n+ n+

p-Si

Lundstrom EE-612 F08 21 GIDL: example

M. Okuno, et al., “45-nm Node CMOS Integration with a Novel STI Structure and Full-NCS/Cu Interlayers for Low-Operation-Power (LOP) Applications,” IEDM, Washington DC. Dec. 5-7, 2005

Lundstrom EE-612 F08 22 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 23 gate leakage

φOX = 3.17 eV EFG

EC EC

EV EV

φOX′ ≈ 4.5 eV

tOX > 4nm Lundstrom EE-612 F08 24 Fowler-Nordheim tunneling

EC φOX ΔVOX > φOX

FP EV

EFG

EV tOX > 4nm Lundstrom EE-612 F08 25 Fowler-Nordheim tunneling (ii)

3 2 ⎡ * 3/2 ⎤ q EOX 42m φOX JFN = 2 exp ⎢− ⎥ eqn. (2.209) Taur and Ning 16π hφOX ⎢ 3hqEOX ⎥ ⎣ ⎦

]

2 ⎡ C2 ⎤ O

JFN / C1EOX = exp −

⎢ ⎥ / EOX ⎣ ⎦ S

[ EOX = 8MV/cm

o −7 2 l JFN = 5 × 10 A/cm

1/EOX

Lundstrom EE-612 F08 26 gate leakage (thin oxides)

φOX = 3.17 eV EFG

EC EC

EV EV

tOX = 1− 2nm Lundstrom EE-612 F08 27 direct tunneling

ΔVOX EC φOX

−TOX /t0 −φOX /φ0 FP J DT ~ e × e EV

EFG

EV 1− 2nm

Lundstrom EE-612 F08 28 direct tunneling in practice

Lo, Buchanan, and Taur, “Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides,” IBM J. Res. Develop., 43, pp. 327-337, 1999. Lundstrom EE-612 F08 29 gate leakage at the 2008 node

is gate leakage a problem at the 2008 (59 nm) node?

−10 2 AGATE = WLGATE = 1000 nm × 22 nm = 2.2 × 10 cm

EOT (LSTP) 1.6 nm = VDD = 1.1 V (2007 Ed. ITRS)

2 JG (LSTP) = 10 A/cm (from plot on previous slide)

IGATE ≈ 2200pA/μm

ISD,leak (LSTP) = 30 pA/μm

Lundstrom EE-612 F08 30 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 31 ITRS 2007 Ed.

Lundstrom EE-612 F08 32 oxide scaling

[2] EOT: for a gate dielectric of thickness Td and relative dielectric constant κ, EOT is defined by: EOT = Td / (κ /3.9), where 3.9 is the relative dielectric constant of thermal silicon dioxide.

It is projected that high-κ gate dielectric will be required by 2008 to control the gate leakage.

Lundstrom EE-612 F08 33 high-k gate dielectrics

εox εins εox εins εox εox Cox = Cins = = = = tox tins εox tins ()εoxtins / εins EOT

−tins /t0 −φins /φ0 J DT ~ e × e

If κINS >> κOX, then we can use a thicker tINS, get a higher CINS, and lower JDT

Lundstrom EE-612 F08 34 high-k gate dielectrics (ii)

“45nm High-k + Metal Gate Strain-Enhanced Transistors” Intel Technology Journal, 12 (2), June 17, 2008

Lundstrom EE-612 F08 35 gate leakage

[5] Jg,limit is the maximum allowed gate leakage current density at 25C, and it is measured with the gate biased to Vdd and the source, drain, and substrate all set to ground.

SiO2 --> SiON

Lundstrom EE-612 F08 36 total leakage

[8] Isd,leak: subthreshold leakage current is defined as the NMOSFET source current per micron of device width, at 25C, with the drain bias set equal to Vdd and with the gate, source, and substrate biases set to zero volts.

Total NMOS off-state leakage current (Ioff) is the sum of the NMOS subthreshold, gate, and junction leakage current (which includes band-to-band tunneling and gate induced drain leakage [GIDL]) components).

For LSTP, meeting the Isd,leak target of ~30pA/μm is the key scaling goal.

Lundstrom EE-612 F08 37 total leakage; 2008

LSTP Isd, leak target: 30pA/μm

LSTP, junction leakage target: 10pA/μm

LSTP, gate leakage target: 8.1e-02 A/cm2

Lundstrom EE-612 F08 38 outline

1) MOSFET leakage components 2) Band to band tunneling 3) Gate-induced drain leakage 4) Gate leakage 5) Scaling and ITRS 6) Summary

Lundstrom EE-612 F08 39 leakage challenges

1) Gate leakage has become a major problem

because of tox scaling and is leading to the replacement of SiO2.

(2007 Ed.Lundstrom ITRS, PIDSEE-612 Chapter) F08 40 leakage challenges

1) Gate leakage has become a major problem

because of tox scaling and is leading to the replacement of SiO2.

2) Band-to-band tunneling (and GIDL) are also concerns.

3) And don’t forget about the sunthreshold channel current!

Lundstrom EE-612 F08 41