Product Bulletin

Prime 550-II System

Software available includes industry standard Features languages (FORTRAN, Cobol, Pascal, BASIC, RPG-II and PL/I) and products for software Central system includes Prime 550-II central pro- development and debugging, computation,data cessor with 32-bit architecture, error correcting management, communications and networking, main memory, 16-line asynchronous terminal office automation, and a wide variety of applica- controller, virtual control panel, system console, tions packages. 15 board positions for peripheral or memory op- tions and the PRIMOS®operating system.

Expandable from 256Kbto 4 million-bytesof error correcting high speed MOS main memory.

Up to 128 simultaneousactive processes.

512 million-byte virtual address space for each user, with 32 million-bytesreserved for private user programsanddata.

8K-byte, 80 nanosecond cache memory.

Process exchange implementedin firmware.

Memorysecurity via ring protection.

Hardware implementation of business instruc- tions for decimal arithmetic, character manipula- tion and editing operations.

Includes 32-bit integer arithmetic unit and hardware floating-pointunit.

Automatic microverification and parity checking throughout the system.

Standard Virtual Control Panel for remote hard- ware and software diagnostics.

Upto 64 direct connect terminal users.

Uses the PRIMOSoperating system,for interac- tive and batch operations. Description Special Performance Features The Prime 550-II is a high performance computer system for computational, commercial or Office Cache Memory Automation applications. It is also ideally suited A high-speed (80 nanosecondaccess) 8K-byte for use in a distributed processing or networking bipolar memory decreases theeffective main environment. memory cycle time to near that of the processor Thebasic system componentsinclude the by storing data and instructions mostlikely to 32-bit Prime 550-II central processor (CPU), be used next by the processor. The cache, which 512Kb, 1Mb, 1.5Mb, or 2Mb,oferror-correcting is located on the central processor, eliminates memory (expandable to 4Mb), a 16-line asyn- memory bus delays in cache-to-processor trans- chronousterminal controller, virtual control fers. Its high capacity provides a 90 percent'‘hit panel (VCP) for remote diagnostics, system con- rate'’ on anticipated processor requirements. sole and the PRIMOSoperating system. The Memory mapping is completely overlapped standard 24 board chassis also includes 15 with cache memory to further reducetotal in- optional board positions. These optional board struction execution times. positions can be used for memory; any standard peripheral subsystem, such as magnetic disk, tapes orprinters; additional asynchronousline Extended Instruction Set controllers; multiline data link controller for syn- The Prime 550-II's, 32-bit internal architecture chronous communications; or the PRIMENET™ uses hardware implementedinstructions to networking software Node Controller for local support single- or double- precision floating point high-speed networks. arithmetic. With a 32-bit path between the The Prime 550-II supports up to 64 Floating Point Unit andcentral processor, floating simultaneoususers.It uses the multi-terminal point data is tranferred at an extremely fast PRIMOSoperating system, which supports in- rate. Registers assigned to floating-point opera- teractive and batch operations and is compatible tionsare integral to the unititself. on all Prime computer systems. PRIMOSsupports The Prime 550-II provides hardware supportfor PRIMENETnetworking software and the x.25 in- COBOL,PL/I, and other business oriented ternational packet switching protocolfor languages with comprehensiveinstructions for distributed processing capabilities. A wide range decimal arithmetic, characterfield manipulation of RJE software packages and industry-standard and editing operations. business and computational programming COBOLand PL/I decimal arithmetic operations languagesare also supported on the Prime 550-I. support up to 18-digit packed or unpacked signed numbers. Operandsthatdiffer in data type and/or I/O Bus scale factor are handled automatically during add, subtract, multiply, divide and comparison opera- tions. Hardware instructionsalso allow rounding on numericoperations, andefficient binary-to- decimal and decimal-to-binary conversions. Character manipulation is performed on fixed andvariable length fields. Justification, tranca- tion, and padding are done automatically in Processor move, compare, translate, edit and similar opera- Execution tions. Numeric and characterediting instructions Unit support user-defined fields in COBOL and PL/I picture-like formats. For maximum efficiency, all business operations require a minimal numberof on-line instructions.

Memory Bus

Instruction Set Basic Architecture Features The Prime 550-II's instruction repertoire is a com- patible set of machineinstructions available with Virtual Memory Management other Prime 50 Series systems. Addressing mode compatibility also lets programs written for any The Prime 550-II has virtual memory manage- multiuser Prime system run without modifica- mentfacilities that provide multiple users with tion on any other Prime system. individual address spaces far in excess of the The Prime 550-II features instructions that sup- system's physical memory. Each system user gets port the processor's eight generalregisters, as well a private and a shared system address space of up as decimal arithmetic, character manipulation to 512, million-bytes, which is divided into seg- and editing operations. ments through automatic segmentation and Over 500 instructions provide enhanced oper- paging. There are 256 segments (32 million-bytes) ating system communication data handling and available to eachuserfor private program space, cooperating of processes. Highly flexible address and the remainderis used for shared operating formation techniqueslet all instructions use any system software. Operating system functionsare of four user-access base registers, up to seven index embeddedin each user's virtual memory space. registers, and 32-bit indirect words in any combin- This reduces system overhead by making all ation. This permits all memory reference instruc- operating system functions immediately tions to reference the entire virtual address space. available, as if they were an integralpart of a user’s program. Integer Arithmetic Unit Interleaved Main Memory Theprocessor's 32-bit arithmetic unit performs all integer arithmetic andlogical operations, Like all Prime systems, the Prime 550-I uses significantly improving the execution timesof MOS main memory and can address up to 4 integer arithmetic instructions. The arithmetic million-bytesof error checking and correcting unit's design also efficiently handles complex ad- (ECC) main memory. dress formations, such as base-plus-displacement Consecutive memory locations are on separate and indexing. memory boards, so that two-way interleaving can be used to speed-up sequential memory accesses and maximize the cachehitrate. In effect, inter- Process Exchange leaving provides high-speed transfers between A Process Exchangefacility automatically memory and the central processor by allowing the transfers the central processor's attention from processorto reador writefour bytes at a time. one user process to another, with minimum overhead and complete protection. It allocates Register Sets resources to the highestpriority process in a queue, and handles the logistics of processes ready The Prime 550-I has 128, 32-bit hardwareregisters for execution or waiting for a specific event to oc- that are divided into four sections. One 32-bit cur. Thefacility is implemented in firmware and register section handles firmware and operating hardware and automatically dispatches a process system functions. Another controls the processor's for execution and reorders remaining processes 32 high-speed Direct Memory Access (DMA) without software intervention. channels. The remaining twosections hold the machinestates of active processes. The process exchangefacility dynamically and automatically Rings of Protection manages register assignmentto process. Memory security is provided by a heirarchical multi-ring protection mechanism. Each process Stack Architecture runsin a particular ring. At each memory ref- erence the hardware automatically checks the Prime 550-II programsoperate in a multi-segment access permitted to the addressed segment from environmentthat includes a stack segment con- the process’ ring. If the attempted accessis not taining all local variables, a pure instruction or allowed, an ‘‘access violation”’ fault is generated. procedure segment, and linkage segment contain- ing statically allocated variables and linkages to common data. Highly efficient addressing modes provide accessto stack and linkage variables. Firmware-implemented CALL and RETURN instructions eliminate the overhead of soft- ware stack managementroutines and argument passing. The Prime 550-II stack architecture optimizes the efficiency of operations such as parameter passing, subroutine and procedurecalls, arith- metic expression evaluation, and dynamic alloca- tion of temporary storage. Input/Output Remote Diagnostics The Prime 550-1 supportsa broad line of The Prime 550-II includesa sophisticated Virtual peripheral products for mass storage, data entry Control Panel (VCP) that allows a diagnostic and retrieval, communications, and printed out- specialist to locally or remotely control any put. All necessary software to enable customers system. This providesfast, effective troubleshoot- to effectively utilize these devices is built into ing for identifying a hardware problem andfor PRIMOS. Upgradesnever obsolete peripherals, performing comprehensive system software since all peripherals can be usedon all systems. diagnostics. Upto 2.4 billion bytes of data can be stored Thelocal system operator or administrator on-line using Storage Module Disk subsystems. initiates remote access by simply depressing a Magnetic tape products include an advancedstate- “Remote Enable’’ button on the VCP. A second of-the-art 75 ips 6250 bpi GCR unit, with up to button places the remote terminal in control eight tape drives available per system. Variouster- mode,or gives the remote terminal the capability minals can be usedfor local and remote input, for to control the system asif it were the local administrative functions of the Office Automa- system console. The remote system administra- tion System, and as a system console. Finally, the tor, when in control mode, can completely run range of printer options available includes a wide the system from a remote terminal, including range of line printers (up to a high throughput, tasks such as bootloading and on-line operations. 1000 line per minute printer), matrix line Two VCPindicator lampsdisplay thestate of printer/plotter and letter quality printer. the remote communicationslink. One lampin- dicates a remote user has been given the ability to dial into the system and monitor operations. The System Integrity second lamp indicates whether or not a remote access is in progress. If it is flashing, the remote The Prime 550-II provides system integrity user has been given the samecontrolas the local through comprehensive error detection and system operator or administrator. reporting mechanisms. Microverification rou- tines, invoked automatically when the system is initialized, test the validity of the CPU logic and Software indicate any malfunction cause via a diagnostic status word. While the system is running, parity The multi-terminal PRIMOSoperating system lets checking ensures data integrity throughout the all Prime 50 Series systemsperform interactive processor's internal busses, registers, and other and batch operations.It supports reentrant pro- data paths. In addition, the Prime 550-1 cedures, permitting a single copy of a software automatically checks the parity of each micro- module, such as the text editor or FORTRAN code control word. Error-correcting codesin real compiler, to be shared by many users. PRIMOS memory automatically detect andcorrect all further supports ANSI’74 COBOL, ANSI'77 FOR- single-bit errors, so they are totally transparent to TRAN, BASIC/VM,RPG I, PL/I, Pascal, Prime users. All two-bit errors are reported as well. Macro Assembler, the Source-Level Debugger, and A comprehensive, hardware-controlled memory the query and reporting facilities provided by protection system has a multi-ring protection PRIME/POWER.PRIMOSalso supports DBMS, hierarchy that allows programsto beassigned to Prime's CODASYL-compatible Database Man- any of several security levels. This lets multiple agement System, and the DBMS Query/Report users havefull access to specified programs, Writer; MIDAS, the Multiple Index Direct Access protects other programsand databases from System; FORMS, the Forms ManagementSys- unauthorized access, and guards operating tem; Prime/TAPS, the Terminal Application system software against accidental user intrusion. Processing System, and Prime's Office Automa- tion System. A widevariety of application packages, supplied by users and third-party vendors, is available from the Prime Users Library Service (PULSE).

Summary of Features 250-1 550-1 750 850

Networking 32-bit architecture | | HH The Prime 550-II supports networking and distributed processing with an array of soft- Simultaneousactive processes 128 128 28 128

ware and hardware communications products. PRIMENET ™networking software lets Prime Direct connect terminal users 32 64 96 128 computers communicate among themselves, with terminals, and with other manufacturers’ systems 512Mbvirtual address space by using a variety of communicationfacilities. per user a |_| i |

These facilities allow users to remotely log into other systems, share files among systems and Bipolar cache memory 2KB 8KB 16KB 32KB develop distributed applications. Users can inter- face Prime computers to a range of terminals from Instruction preprocessor unit | | communicationslines with multiple protocols 1/O bandwidth (Mb/SEC} 2:5 2:5 8 8 and remotejob entry options: IBM BISYNCfor HASP and2780/3780; High-level Data Link Con- Multi-stream architecture | trol (HDLC) protocol for X.25 packet switching

networks; Control Data 200UT: Univac 1004; Hardware instructions for Honeywell GRTS: and ICL 7020. floating point arithmetic, Prime's Distributed Processing Terminal decimal arithmetic and |_| BB Bf Executive (DPTX)allows the Prime 550-I character string manipulations to emulate and support IBM 3271/3277

Display Systems. Single and double precision ThePrime 550-II supports all of Prime’s com- floating point arithmetic & |_| a a

munications hardware controllers. User terminal communicationsare handled by the Asynchro- 32-bit integer arithmetic | | | |

nous Multi-Line Controller (AMLC). Com- municationsfor all of the synchronous software Microprocessor control unit products are handled by the Multi-line Data Link with process exchangefacility |_| |_| a a

Controller (MDLC)}, a controller handling multi- ple line protocols. For local area networks, the Internal process or parity 550-1 can be attached in a high speed ring net- checking a ci} iat a work with any other 50 Series system. The ring networkprovides inter-system communication Hardware Protection Hi a HH via a coaxialcable for up to fifteen Prime systems using PRIMENET networking software. U.S. Offices

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PRIMEand PRIMOSareregistered trademarksof Copyright ©, 1981, Prime Computer, Inc. All rights reserved. Prime Computer, Inc., Natick, Massachusetts. Printed in the U.S.A. PRIMENETis a trademark of Prime Computer, Inc., Natick, Massachusetts. The materials contained herein are summary in nature, subject to change and intendedfor general information only. Details and specifications regarding specific Prime Computer software and equipmentare available in the appropriate technical manuals, available through local sales ® representatives. PRIME Prime Computer, Inc. Prime Park Natick, Massachusetts 01760 3/81 PB 1403-002