Flux-Balance Control for LLC Resonant Converters with Center-Tapped Transformers

energies

Article Flux-Balance Control for LLC Resonant Converters with Center-Tapped Transformers

Yuan-Chih Lin, Ding-Tang Chen and Ching-Jan Chen *

Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan; No. 1, Sec. 4, Roosevelt Rd., Taipei 10617, Taiwan * Correspondence: [email protected]; Tel.: +886-2-3366-3366 (ext. 348)

Received: 9 July 2019; Accepted: 19 August 2019; Published: 21 August 2019

Abstract: LLC resonant converters with center-tapped transformers are widely used. However, these converters suffer from a flux walking issue, which causes a larger output ripple and possible transformer saturation. In this paper, a flux-balance control strategy is proposed for resolving the flux walking issue. First, the DC magnetizing current generated due to the mismatched secondary-side leakage inductances, and its effects on the voltage gain are analyzed. From the analysis, the flux-balance control strategy, which is based on the original output-voltage control loop, is proposed. Since the DC magnetizing current is not easily measured, a current sensing strategy with a current estimator is proposed, which only requires one current sensor and is easy to estimate the DC magnetizing current. Finally, a simulation scheme and a hardware prototype with rated output power 200 W, input voltage 380 V, and output voltage 20 V is constructed for verification. The simulation and experimental results show that the proposed control strategy effectively reduces the DC magnetizing current and output voltage ripple at mismatched condition.

Keywords: LLC resonant converter; center-tapped transformer; ﬂux walking; ﬂux-balance control loop; magnetizing current estimation

1. Introduction The LLC resonant converter is widely used in many diﬀerent applications such as onboard chargers, server power systems, laptops, desktops, photovoltaic regeneration systems. Owing to the characteristics of zero-voltage-switching (ZVS) at the primary side and zero-current-switching (ZCS)

Energiesat the secondary2019, 12, x FOR side, PEER high REVIEW efficiency and high power density of the LLC converter are achieved2 [1of– 719]. The half-bridge (HB) and full-bridge (FB) with the center-tapped transformer rectifier topologies sideshown currents in Figure imbalance1 are the will most reflect commonly upon the used magn topologiesetizing inductance of the LLC on resonant the primary converter. side. ThanksTherefore, to the magnetizing center-tapped current transformer, will have only a DC two component, rectifying diodes which are will necessary lead to the at flux the secondarywalking and side possible [8–11]. Withouttransformer the center-tap,core saturation. it would be required to implement a full-wave rectifier.

(a) (b)

Figure 1. DifferentDiﬀerent topologies of th thee LLC resonant converter ( a) half-bridge and (b) full-bridge.

Figure 2b shows the key waveforms of the LLC resonant converter operating below the resonant conditions with the mismatched leakage inductances in the secondary side windings. In Figure 2b, theEnergies current2019, 12waveforms, 3211; doi:10.3390 of the/en12173211 diode 1 and diode 2 are not symmetrical. Thewww.mdpi.com magnetizing/journal current/energies (iLm) will, therefore, contain a DC component. Since the resonant capacitance is in series with the primary side, the resonant current (iLr) will not have a DC component from charge balance concept. Besides, the mismatched condition considers not only the leakage inductances of the secondary side windings of the transformer but also the parasitic inductances of the printed-circuit-board (PCB) traces on the secondary side.

(a) (b)

Figure 2. Key waveforms of the LLC resonant converter operating below the resonant frequency with the different leakage inductances in the secondary side windings (a) matched leakage inductances and (b) mismatched leakage inductances.

To improve the flux walking issue in the LLC resonant converter, improved winding structures for the secondary side were proposed [12–14]. The coupling coefficients between the primary side and two secondary sides were increased to mitigate the flux walking issue [12]. The further improved method is used in the Bifilar winding structure to overcome this problem [13]. The flux distribution of the non-symmetrical structure of the secondary side windings were analyzed in [14]. However, they cannot consider the mismatch problems caused by the PCB circuit traces. According to abovementioned issue, a flux-balance control strategy, which is based on the original output-voltage control loop, is proposed in this paper. The flux-balance control is added to improve the magnetizing current imbalance problem caused by the secondary side mismatches. Besides, the DC magnetizing current of the LLC resonant converter is difficult to sense directly. An indirect method to sense the magnetizing current was used [15], which involved sensing the currents at the primary and secondary side, simultaneously and subtracting them to obtain the magnetizing current. Then, the DC component was obtained using a low-pass filter. This solution,

Energies 2019, 12, x FOR PEER REVIEW 2 of 19 side currents imbalance will reflect upon the magnetizing inductance on the primary side. Therefore, the magnetizing current will have a DC component, which will lead to the flux walking and possible transformer core saturation.

(a) (b)

Figure 1. Different topologies of the LLC resonant converter (a) half-bridge and (b) full-bridge. Energies 2019, 12, 3211 2 of 18 Figure 2b shows the key waveforms of the LLC resonant converter operating below the resonant conditions with the mismatched leakage inductances in the secondary side windings. In Figure 2b, the currentFigure waveforms2a shows the ofkey the waveformsdiode 1 and of diode the LLC 2 are resonant not symmetrical. converter The operating magnetizing below thecurrent resonant (iLm) will,frequency therefore, with contain the matching a DC component. leakage inductances Since the re insonant both secondary capacitance side is in windings, series with where the primaryvgs1 and side,vgs2 arethe theresonant driving current signals (i ofLr) thewill MOSFET not haveQ a1 DCand componentQ2, respectively. from charge Figure 2balancea reveals concept. that the Besides, current thewaveforms mismatched of the condition diode 1 (considersiD1) and diode not only 2 (i Dthe2) areleakage symmetrical, inductances and of energy the secondary ﬂows through side windings the diode of1 andthe transformer diode 2 in the but positive also the and parasitic negative inductance cycles, respectively.s of the printed-circuit-board In Figure2a, the magnetizing (PCB) traces current on the secondarywill have noside. DC component.

(a) (b)

FigureFigure 2. 2. KeyKey waveforms waveforms of of the the LLC LLC resonant resonant converter converter operating operating below below the the resonant resonant frequency frequency with with thethe different diﬀerent leakageleakage inductancesinductancesin in the the secondary secondary side side windings windings (a )( matcheda) matched leakage leakage inductances inductances and and(b) mismatched(b) mismatched leakage leakage inductances. inductances.

ToHowever, improve practical the flux walking LLC resonant issue in converters the LLC re withsonant center-tapped converter, improved transformers winding contain structures a flux forwalking the secondary issue, which side were causes proposed a larger [12–14]. output Th ripplee coupling and possible coefficients transformer between saturation the primary [12 side–14]. andThis two is because secondary the sides secondary were increa side windingssed to mitigate are usually the flux not walking symmetrical issue [12]. in practicalThe further manufacture. improved methodThe mismatched is used in leakage the Bifilar inductances winding arestructure generated to overcome in the secondary this problem side windings,[13]. The flux which distribution causes an ofimbalance the non-symmetrical in the secondary structure side currents,of the secondary resulting side in a largerwindings output were voltage analyzed ripple. in [14]. The However, secondary theyside cannot currents consider imbalance the willmismatch reflect proble upon thems magnetizingcaused by the inductance PCB circuit on traces. the primary side. Therefore, the magnetizingAccording to current abovementioned will have a DCissue, component, a flux-balan whichce control will lead strategy, to the flux which walking is based and possibleon the originaltransformer output-voltage core saturation. control loop, is proposed in this paper. The flux-balance control is added to improveFigure the2 magnetizingb shows thekey current waveforms imbalance of the prob LLClem resonant caused by converter the secondary operating side below mismatches. the resonant conditionsBesides, with the theDC mismatchedmagnetizing leakagecurrent of inductances the LLC reso innant the secondary converter sideis diffic windings.ult to sense In Figure directly.2b, Anthe indirect current waveformsmethod to ofsense the diodethe magnetizing 1 and diode cu 2rrent are not was symmetrical. used [15], Thewhich magnetizing involved sensing current (theiLm ) currentswill, therefore, at the containprimary a DCand component.secondary side, Since simult the resonantaneously capacitance and subtracting is in series them with to theobtain primary the magnetizingside, the resonant current. current Then, (i Lrthe) willDC notcomponent have a DC was component obtained using from chargea low-pass balance filter. concept. This solution, Besides, the mismatched condition considers not only the leakage inductances of the secondary side windings of the transformer but also the parasitic inductances of the printed-circuit-board (PCB) traces on the secondary side. To improve the flux walking issue in the LLC resonant converter, improved winding structures for the secondary side were proposed [12–14]. The coupling coefficients between the primary side and two secondary sides were increased to mitigate the flux walking issue [12]. The further improved method is used in the Bifilar winding structure to overcome this problem [13]. The flux distribution of the non-symmetrical structure of the secondary side windings were analyzed in [14]. However, they cannot consider the mismatch problems caused by the PCB circuit traces. According to abovementioned issue, a flux-balance control strategy, which is based on the original output-voltage control loop, is proposed in this paper. The flux-balance control is added to improve the magnetizing current imbalance problem caused by the secondary side mismatches. Energies 2019, 12, 3211 3 of 18

Besides, the DC magnetizing current of the LLC resonant converter is difficult to sense directly. An indirect method to sense the magnetizing current was used [15], which involved sensing the currents at the primary and secondary side, simultaneously and subtracting them to obtain the magnetizing current. Then, the DC component was obtained using a low-pass filter. This solution, however, required several current sensing devices, which increased the circuit cost; moreover, the low-pass filter produced a slow dynamic response. Therefore, this paper proposes a simple magnetizing current sensing strategy with a DC current estimation scheme to overcome the abovementioned issue. Moreover, for small-signal model, the mathematical methods for deriving the small-signal dynamic model of the LLC resonant converter were developed [16–19]. However, these works focused only on the switching frequency to output voltage transfer function. Besides, matching with circuit ac sweep simulation occurs only under specific operating conditions. Nevertheless, system identification [20,21] is a useful method to obtain the small-signal model of the system without using any complex mathematical model. Therefore, the system identification [21] is used to obtain the small-signal models of the LLC resonant converter for controllers design in this paper. The remainder of this paper is organized as follows. Section2 analyzes the mismatched leakage inductances effects of the secondary side on the DC magnetizing current and voltage gain. Section3 describes the proposed control strategy with the magnetizing current sensing and the DC magnetizing current estimation. Section4 describes the controller designs for the flux-balance loop and output-voltage loop, which are based on the transfer functions obtained by using the system identification tool of MATLAB (R2018b, MathWorks, Natick, MA, USA). Section5 presents the simulated and experimental results, to verify the effectiveness of the proposed control strategy. Finally, Section6 provides the conclusions.

2. Analysis of Secondary Side Mismatched Leakage Inductances Eﬀects

2.1. Analysis of the Magnetizing Current DC Value Figure3 shows the DC current path in the LLC resonant tank when the leakage inductances at the secondary side are mismatched. It is assumed that the leakage inductance of the positive-cycle loop at the secondary side (Llk2,pos) is smaller than the leakage inductance of the negative-cycle loop at the secondary side (Llk2,neg). According to Kirchhoﬀ’s current law (KCL), the relationship among iLr, iLm, and iDx can be expressed as follows i i = i + Dx (1) Lr Lm n ( 1 : duringthepositivecycle x = (2) 2 : duringthenegativecycle where n is the turns ratio of the transformer. Since the resonant capacitance is in series with the input of the transformer, the DC current of the resonant inductor is zero. That is, the average resonant inductor current in a switching period is zero in steady-state, and can be expressed as follows

T T Z s Z s 1 1 iDx ILr,DC = iLrdt = iLm + dt = 0A. (3) Ts Ts n 0 0

Based on (3), the relationship between the magnetizing DC current and diﬀerence in the DC currents of both diodes can be expressed as follows

Ts Ts 1 R 1 R ILm DC = iLmdt = iDxdt , Ts − nTs 0  0  Ts/2 Ts (4) 1  R R  1 =  iD dt iD2dt = (ID DC ID DC) − nTs  1 −  n 2, − 1, 0 Ts/2 Energies 2019, 12, 3211 4 of 18

Energieswhere 2019ID1,DC, 12, xand FORI PEERD2,DC REVIEWare the DC currents of the diodes at secondary side. Equation (4) shows4 of 19 that the magnetizing DC current is proportional to the diﬀerence between ID1,DC and ID2,DC with the ratioturns n ratio. Therefore,n. Therefore, the largest the largest ILm,DCILm,DC wouldwould be induced be induced for forthe the largest largest current current mismatch mismatch in in the the secondarysecondary side side condition. condition.

Figure 3. The DC current path in the LLC resonant tank when the leakage inductances at the secondary Figure 3. The DC current path in the LLC resonant tank when the leakage inductances at the side are mismatched (Llk2,pos < Llk2,neg). secondary side are mismatched (Llk2,pos < Llk2,neg). 2.2. Analysis of the Voltage Gain under Mismatched Condition 2.2. Analysis of the Voltage Gain under Mismatched Condition A non-ideal transformer equivalent circuit can be expressed by the model shown in Figure4a, whichA non-ideal is called the transformer “T model” equivalent [22,23]. In circuit Figure can4a, be the expressed leakage inductancesby the model are shown distributed in Figure at the4a, whichprimary is andcalled secondary the “T model” sides, separately. [22,23]. In This Figure circuit 4a, is the not leakage suitable inductances for the analysis are of distributed the LLC resonant at the primaryconverter. and On secondary the other sides, hand, separately. Figure4b shows This circuit the “L is model” not suitable [ 22,23 ].for In the this analysis model, of the the leakage LLC resonantEnergiesinductance 2019 converter., 12 at, x the FOR secondary PEEROn the REVIEW other side ishand, removed. Figure Therefore, 4b shows it the issuitably “L model” used [22,23]. in the LLCIn this resonant model,5 tank ofthe 19 leakagefor analysis. inductance at the secondary side is removed. Therefore, it is suitably used in the LLC resonant tank for analysis. For center-tapped applications, the L model of the transformer can be separated into the positive and negative cycle models. For a matched condition, the parameters of the L model for the positive and negative cycle will be the same. This will not be the case for the mismatched condition because the leakage inductances at the secondary side would affect the resonant parameters during the positive and negative cycles. Figure 5 shows the equivalent circuit models of the LLC resonant tank for the positive (lower left) and negative (lower( aright)) cycles. The relative parameters of the L model(b) during the positive and negative cycles can be derived from Figure 4 and is presented as follows Figure 4. DifferentDiﬀerent equivalent circuit models of the transformer ( a) T model and (b) L model. nL m m=h (5) For center-tapped applications, the L modelL+nL of the2 transformer can be separated into the positive and negative cycle models. For a matched condition,mlk,h the2 parameters of the L model for the positive and negative cycle will be the same. This will not be the case for the mismatched condition because the L 2 leakage inductances at the secondary side would aﬀectm the resonant parameters during the positive L=p,h 2 (6) and negative cycles. L+nLmlk,h2 Figure5 shows the equivalent circuit models of the LLC resonant tank for the positive (lower 2 left) and negative (lower right) cycles.L=L+L+L||nL Ther,h relative ext lk parameters1 m of lk2 ,h the L model during the positive and(7) negative cycles can be derived from Figure4 and is presented as follows

pos : during thenL postive cycle h =  m = m (8)(5) h 2 neg : duringLm + then negativeLlk2,h cycle where Lm indicates the magnetizing inductance of theL 2transformer, Llk1 and Llk2,h express the leakage L = m (6) inductances at the primary and secondaryp,h sides of the2 transformer, respectively, mh indicates the Lm + n Llk2,h equivalent turns ratio of the L model, Lext represents the external resonant inductance, Lp,h expresses 2 the equivalent paralleled inductanceLr,h =of Ltheext +LL lkmodel,1 + Lm andn L lkL2,r,hh is the total equivalent resonant(7) inductance of the L model. Therefore, the parameters of the L model during the positive and negative cycles can be obtained using (5)–(8).

Figure 5. Equivalent circuit models of the resonant tank during the positive cycle (lower left) and negative cycle (lower right).

The voltage gain during the positive and negative cycles can be expressed as follows mV 1 M(f ) =ho = n,h V 22 i   11−− 1 (9) 11++Qf2 hn,h  Lfn,h n,h f n,h 

f=r,h (10) 2π LCr,h r

L 1 r,h Q=h 2 (11) mRhacr C

8 R= R (12) acπ 2 o

f s f=n,h (13) fr,h

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( pos : duringthepositivecycle h = (8) neg : duringthenegativecycle

where Lm indicates the magnetizing inductance of the transformer, Llk1 and Llk2,h express the leakage inductances at the primary and secondary sides of the transformer, respectively, mh indicates the equivalent turns ratio of the L model, Lext represents the external resonant inductance, Lp,h expresses

the equivalent paralleled inductance of the L model, and Lr,h is the total equivalent resonant inductance of the L model. Therefore,(a) the parameters of the L model during the positive(b) and negative cycles can be obtained using (5)–(8). Figure 4. Different equivalent circuit models of the transformer (a) T model and (b) L model.

Figure 5. Equivalent circuit models of the resonant tank during the positive cycle (lower left) and Figure 5. Equivalent circuit models of the resonant tank during the positive cycle (lower left) and negative cycle (lower right). negative cycle (lower right). The voltage gain during the positive and negative cycles can be expressed as follows The voltage gain during the positive and negative cycles can be expressed as follows m V 1 ( ) =mVh o = 1 M(fM fn, )h =ho = r (9) n,h Vi 222 2 Vi 1 1 1 111+L 1 2 + Qh fn,h 1  (9) n,−−h − fn,h − fn,h 11++Qf2 hn,h  Lfn,h n,h f n,h  1 fr,h = p (10) 2π 1 Lr,hCr

f=r,h s (10) 2π1 LCr,h rLr,h Q = (11) h 2 mh Rac Cr 1 L Q= 8 r,h (11) h Rac 2= Ro (12) mRhacrπ2 C

fs fn,h =8 (13) R=f Rr,h (12) acπ 2 o Lp,h Lr,h = (14) fLr,h s f=n,h (13) fr,h

Energies 2019, 12, x FOR PEER REVIEW 6 of 19

Lp,h L=r,h (14) Lr,h where fr indicates the resonant frequency, Cr is the resonant capacitance, Qh is the qualify factor, Rac Energies 2019, 12, 3211 6 of 18 is the equivalent ac load resistance, Ro is the load resistance, fs is the switching frequency, fn,h is the normalized frequency, and Ln,h is the ratio between Lp,h and Lr,h. Based on (9)–(14), the voltage gain curves during the positive and negative cycles can be drawn where fr indicates the resonant frequency, Cr is the resonant capacitance, Qh is the qualify factor, Rac is as shown in Figure 6. The solid lines represent the nominal Q-value condition and dashed lines the equivalent ac load resistance, Ro is the load resistance, fs is the switching frequency, fn,h is the express the high Q-value condition. Assuming the normal leakage inductance Llk,2n = Llk,2,pos = Llk,2,neg at normalized frequency, and Ln,h is the ratio between Lp,h and Lr,h. the secondaryBased on (9)–(14),side, i.e., the at voltagematched gain condition, curves f duringn,pos and the fn,neg positive would andbe one negative as indicated cycles by can the be curve drawn a as(i.e. shown maroon in solid Figure line)6. The with solid the normal lines represent operating the point nominal indicatedQ-value by the condition sky blue andcircle dashed in Figure lines 6. When operating under the mismatched condition and assuming the leakage inductances at the express the high Q-value condition. Assuming the normal leakage inductance Llk,2n = Llk,2,pos = Llk,2,neg secondary side are satisfying Llk,2n = Llk,2,pos < Llk,2,neg, the voltage gain during the positive cycle follows at the secondary side, i.e., at matched condition, fn,pos and fn,neg would be one as indicated by the curvethe originala (i.e., curve maroon a (i.e. solid maroon line) with solid the line); normal during operating the negative point cycle, indicated the voltage by the gain sky blue curve circle moves in Figuretoward6. the When left operatingas shown underby the thecurve mismatched b (i.e. light condition blue solid and line). assuming Under thethe leakagemismatched inductances condition, at the voltage gain also operates at M = 1.05, because of the voltage loop regulation, and the operating the secondary side are satisfying Llk,2n = Llk,2,pos < Llk,2,neg, the voltage gain during the positive cycle followspoint shifts the originalto the point curve indicateda (i.e., maroon by the solidpink line);circle. during the negative cycle, the voltage gain curve movesThe toward operations the left of asthe shown curve bya (i.e. the maroon curve b solid(i.e., line) light during blue solid the positive line). Under cycle theand mismatched curve b (i.e. condition,light blue thesolid voltage line) during gain also theoperates negative at cycleM = can1.05, be because mapped of to the time-domain voltage loop operated regulation, waveforms and the operatingshown in pointFigure shifts 2b. toThey the pointare matched indicated precisely by the pink between circle. the voltage gains and time domain waveforms.

FigureFigure 6.6. VoltageVoltage gaingain curvescurves duringduring thethe positivepositive andand negativenegative cycles,cycles, curvecurvea a:: NominalNominal QQ-value-value

conditioncondition withwith the the matched matched leakage leakage inductance inductanceL lk,Llk,22nn atat thethe secondarysecondary side;side; curvecurveb b:: NominalNominal QQ-value-value conditioncondition withwith thethe mismatched mismatched leakage leakage inductance inductanceL Llk,lk,2,2,negneg at the secondary sideside duringduring thethe negativenegative cycle;cycle; curve curvec :c High: HighQ -valueQ-value condition condition with with the the matched matched leakage leakage inductance inductanceLlk,2n Latlk,2 then at secondary the secondary side; curveside; curved: High d: HighQ-value Q-value condition condition with with the mismatchedthe mismatched leakage leakage inductance inductanceLlk, L2,lk,neg2,negat at the thesecondary secondary sideside duringduring thethe negativenegative cycle.cycle.

3. ProposedThe operations Flux-Balance of the Control curve a Architecture(i.e., maroon solid line) during the positive cycle and curve b (i.e., light blue solid line) during the negative cycle can be mapped to time-domain operated waveforms shown3.1. Description in Figure 2ofb. the They Proposed are matched Control precisely Architecture between the voltage gains and time domain waveforms.

3. ProposedFigure 7 Flux-Balance shows the block Control diagram Architecture of the proposed control architecture to solve the flux walking issue caused by the mismatched condition on the secondary side. The proposed control is based on 3.1.the Descriptionoriginal output-voltage of the Proposed control Control loop Architecture with the addition of the flux-balance loop. The flux-balance

Figure7 shows the block diagram of the proposed control architecture to solve the flux walking issue caused by the mismatched condition on the secondary side. The proposed control is based on the original output-voltage control loop with the addition of the flux-balance loop. The flux-balance loop includes the sampling setup for the magnetizing current, a DC current estimator, a flux-balance loop Energies 2019, 12, x FOR PEER REVIEW 7 of 19 Energies 2019, 12, 3211 7 of 18 loop includes the sampling setup for the magnetizing current, a DC current estimator, a flux-balance loop controller, and a variable-frequency-variable-duty-pulse-width-modulator (VFVDPWM). The controller, and a variable-frequency-variable-duty-pulse-width-modulator (VFVDPWM). The output output of the voltage loop controller controls the switching period of the MOSFETs Q1 and Q2. The of the voltage loop controller controls the switching period of the MOSFETs Q1 and Q2. The output of output of the flux-balance loop controller offsets the duty ratio of the MOSFETs Q1 and Q2 from 0.5. the flux-balance loop controller offsets the duty ratio of the MOSFETs Q1 and Q2 from 0.5. The input of The input of the flux-balance loop controller is the error between iLm,DC and iLm,DC,ref, which is zero in the flux-balance loop controller is the error between i and i , which is zero in steady-state. steady-state. Thus, the flux-balance loop forces the DCLm,DC magnetizingLm,DC,ref current to zero and solves the Thus, the flux-balance loop forces the DC magnetizing current to zero and solves the flux walking flux walking issue. The DC estimator estimates the DC magnetizing current, and the iLm sampling issue. The DC estimator estimates the DC magnetizing current, and the iLm sampling scheme samples scheme samples relative information of the magnetizing current from the resonant current iLr. The relative information of the magnetizing current from the resonant current i . The relationship between relationship between the DC magnetizing current and the duty ratio areLr not direct, because the the DC magnetizing current and the duty ratio are not direct, because the resonant capacitance is in resonant capacitance is in series between the half-bridge switches and the input of the transformer. series between the half-bridge switches and the input of the transformer. According to the proposed According to the proposed flux-balance control, when the duty is regulated, the resonant capacitance flux-balance control, when the duty is regulated, the resonant capacitance to hold the charge balance in to hold the charge balance in steady-state, the DC current of the resonant inductance, therefore, keeps steady-state, the DC current of the resonant inductance, therefore, keeps zero, and the rectifier diodes zero, and the rectifier diodes turned off time, therefore, be changed when the duty ratio be regulated. Finally,turned otheff time, magnetizing therefore, DC be changedcurrent would when thebe dutyregu ratiolated. be Detailed regulated. descriptions Finally, the of magnetizing the functional DC blockscurrent of would the magnetizing be regulated. current Detailed sampling descriptions scheme, of the functionalDC current blocks estimator, of the and magnetizing the VFVDPWM current aresampling provided scheme, below. the DC current estimator, and the VFVDPWM are provided below.

FigureFigure 7. 7. OverallOverall block block diagram diagram of of the the proposed proposed control control architecture. architecture.

3.2.3.2. Magnetizing Magnetizing Current Current Sampling Sampling Scheme Scheme

FigureFigure 8 shows the magnetizingmagnetizing currentcurrent samplingsampling scheme,scheme, wherewhere iLr isis the the resonant resonant current, iLm isis the the magnetizing magnetizing current, current, iiLm,p, ,and and iLm,niLm,n areare the the peak peak values values of of the the magnetizing magnetizing current current during during the the positivepositive and and negative negative cycles, cycles, re respectively.spectively. The The magnetizing magnetizing current current of of the the LLC LLC resonant resonant converter converter cannotcannot be be measured measured directly directly because because the the magnetizin magnetizingg inductance inductance is is an an equivalent equivalent element element in in the the transformer.transformer. However, However, owing owing to to the the LLC LLC resonant resonant converter converter usually usually operates operates with with the the switching switching frequencyfrequency below thethe resonantresonant frequency, frequency, the the resonant resonant current current is equal is equal to the to magnetizingthe magnetizing current current when whenthe diodes the diodes on the on secondary the secondary side are side turned are turned off. As of shownf. As shown in Figure in8 Figure, during 8, these during intervals, these intervals, the peak thevalues peak of values the magnetizing of the magnetizing current during current the during positive the and positive negative and cyclesnegative occur cycles when occur the respectivewhen the respectiveMOSFET QMOSFET1 and Q 2Q,1 are and turned Q2, are off turned. According off. According to the previous to the previous statement, statement, the sampling the sampling pluses of plusesSOCi,p ofand SOCSOCi,p i,nandcan SOC be appliedi,n can be from applied the VFVDPWM, from the VFVDPWM, which are generated which are when generated the driving when signals the drivingof MOSFET signalsQ1 ofand MOSFETQ2 are turnedQ1 and o ffQ,2 respectively. are turned off, After respectively. that, iLm,p and AfteriLm,n that,can iLm,p be sampledand iLm,n can during be sampledeach switching during period.each switching period.

Energies 2019, 12, x FOR PEER REVIEW 8 of 19

Energies 2019, 12, 3211 8 of 18 Energies 2019, 12, x FOR PEER REVIEW 8 of 19

Figure 8. Magnetizing current sampling timing, where iLm,p (iLm,n) is sampled at the timing of vgs1 (vgs2) from high to low.

Figure 8. Magnetizing current sampling timing, where i (i ) is sampled at the timing of vgs 3.3. DCFigure Value 8. MagnetizingEstimation of current the Magnetizing sampling timing, Current where iLm,pLm,p (iLm,nLm,n) is sampled at the timing of vgs1 (vgs21) (vgs2) from high to low. fromThis highpaper to low.proposes the DC value estimation scheme to obtain the DC magnetizing current, which3.3. DC will Value be Estimationused as one of of the the Magnetizing inputs of the Current flux-balance controller. Figure 9 shows the magnetizing 3.3. DC Value Estimation of the Magnetizing Current current waveform (red line), which is similar to a triangular wave (shown by the blue dashed line). This paper proposes the DC value estimation scheme to obtain the DC magnetizing current, The magnetizing DC current can be estimated after the iLm,p and iLm,n are sampled, and is expressed as whichThis will paper be used proposes as one ofthe the DC inputs value of estimation the ﬂux-balance scheme controller. to obtain Figure the DC9 shows magnetizing the magnetizing current, follows whichcurrent will waveform be used (redas one line), of the which inputs is similarof the flux-balance to a triangular controller. wave (shown Figure 9 by shows the blue the dashedmagnetizing line). current waveform (red line), which is similar to a triangular wave (shown by the blue dashed line). The magnetizing DC current canin=Lm,DC,est be estimated[DC] value after the of itriangularLm,p and iLm,n waveare sampled, and is expressed Theas follows magnetizing DC current can be estimated after the iLm,p and iLm,n are sampled, and is expressed as 1 follows iLm,DC,est[n] = =([+[)DCvalueoftriangularwaveinin]] 2 Lm,pi Lm,n = 1 (i [n +i [n]) (15) in=[DC] T2 valueLm,p of triangularLm,n wave Lm,DC,est s (15) ≈ 1 RTs 1 1 idtLm = T T iLmdt ≈s([+[)inin0sLm,p]] Lm,n 2 0 (15) T where iiLm,DC,estLm,DC,est[n[]n ]represents represents the the estimated estimated 1magnetizing magnetizings DC DC current. current. Equation Equation (15) (15) reveals reveals that the ≈ idt estimated magnetizing DC DC current current ca cann be be approximated approximated Lm as as the the sum sum of of iLm,piLm,p[n[]n and] and iLm,niLm,n[n],[ ndivided], divided by Ts 0 2,by which 2, which is a isvery a very simple simple method method to obtain to obtain the themagnetizing magnetizing DC DCcurrent. current. The Theblock block diagram diagram of the of DC the wheremagnetizingDC magnetizing iLm,DC,est current[n] currentrepresents estimator estimator the is estimatedshown is shown in Figuremagnetizing in Figure 10. 10 .DC current. Equation (15) reveals that the estimated magnetizing DC current can be approximated as the sum of iLm,p[n] and iLm,n[n], divided by 2, which is a very simple method to obtain the magnetizing DC current. The block diagram of the DC magnetizing current estimator is shown in Figure 10.

Figure 9. The magnetizing current waveform (red line) and the approximate triangular waveform Energies 2019, 12, x FOR PEER REVIEW 9 of 19 (blue dashed line).

Figure 9. The magnetizing current waveform (red line) and the approximate triangular waveform (blue dashed line).

Figure 10. Block diagram of the magnetizing DC current estimator.

3.4. Variable-Frequency-Variable-Duty-Pulse-Width-Modulator

In conventional LLC resonant converters, the output voltage regulation is achieved by controlling the switching frequency and maintaining the duty ratios of MOSFET Q1 and Q2 at 50%. The proposed flux-balance control scheme utilizes the controlled duty ratio for MOSFET Q1 for the magnetizing DC current regulation. Figure 11 shows the operating timing of the VFVDPWM, where vcarr is the carrier waveform, dQ1 is the duty ratio control signal of MOSFET Q1, ts is the switching period control signal. In Figure 11, the slope of vcarr is fixed. ts can therefore control the magnitude of vcarr to control the switching period. dQ1, which is equal to 0.5ts in the matched condition, controls the duty ratio of MOSFET Q1 for the flux-balance loop regulation. SOCi,p is generated when dQ1 equals vcarr and SOCi,n is generated when ts equals vcarr. Thus, the control signal and magnetizing current sampling pulses of the proposed flux-balance loop can be obtained from Figure 11.

Figure 11. VFVDPWM operating timing.

4. Small-Signal Model and Controllers Design

4.1. Small-Signal Models Built Using System Identification Unlike the pulse-width-modulation (PWM) converter, the LLC resonant converter is a complex nonlinear system. Therefore, it is difficult to obtain its small-signal model through mathematical derivation. Previously, researchers had developed the mathematical methods for deriving the small- signal dynamic model of the LLC resonant converter [16–19]. However, these works focused only on the matching with circuit ac sweep simulation occurs only under specific operating conditions. At the same time, the flux-balance loop proposed in this paper, there is no more literature to discuss. The system identification tool of MATLAB [21] is a useful tool to obtain the small-signal model transfer function without using any complex mathematical model derivation. Figure 12 shows the processing flow windows of the system identification of MATLAB. The transfer function of the system can be obtained from the simulated or measured system data such as time response or

Energies 2019, 12, x FOR PEER REVIEW 9 of 19

Energies 2019, 12, 3211 9 of 18 Figure 10. Block diagram of the magnetizing DC current estimator.

3.4. Variable-Frequency-Variab Variable-Frequency-Variable-Duty-Pulse-Width-Modulatorle-Duty-Pulse-Width-Modulator In conventionalconventional LLC LLC resonant resonant converters, converters, the output the output voltage voltage regulation regulation is achieved is byachieved controlling by thecontrolling switching the frequency switching and frequency maintaining and themaintaining duty ratios the of duty MOSFET ratiosQ 1ofand MOSFETQ2 at 50%. Q1 and The Q proposed2 at 50%. flux-balanceThe proposed control flux-balance scheme control utilizes scheme the controlled utilizes the duty controlled ratio for duty MOSFET ratio Qfor1 forMOSFET the magnetizing Q1 for the DCmagnetizing current regulation. DC current Figure regulation. 11 shows Figure the 11 operating shows the timing operating of the timing VFVDPWM, of the VFVDPWM, where vcarr whereis the carriervcarr is the waveform, carrier waveform,dQ1 is the duty dQ1 ratiois the control duty ratio signal control of MOSFET signalQ of1, tMOSFETs is the switching Q1, ts is periodthe switching control signal.period Incontrol Figure signal. 11, the In slope Figure of 11,vcarr theis slope fixed. ofts canvcarr is therefore fixed. tscontrol can therefore the magnitude control the of v magnitudecarr to control of thevcarr switchingto control period.the switchingdQ1, which period. is equaldQ1, which to 0.5 ists equalin the to matched 0.5ts in condition,the matched controls condition, the duty controls ratio the of MOSFETduty ratioQ of1 for MOSFET the flux-balance Q1 for the loop flux-balance regulation. loopSOC regulation.i,p is generated SOC wheni,p is generateddQ1 equals whenvcarr anddQ1 SOCequalsi,n isvcarr generated and SOC wheni,n is generatedts equals v carrwhen. Thus, ts equals the control vcarr. Thus, signal the and control magnetizing signal current and magnetizing sampling pulses current of thesampling proposed pulses flux-balance of the proposed loop can flux-balan be obtainedce loop from can Figure be obtained 11. from Figure 11.

Figure 11. VFVDPWM operating timing. 4. Small-Signal Model and Controllers Design 4. Small-Signal Model and Controllers Design 4.1. Small-Signal Models Built Using System Identification 4.1. Small-Signal Models Built Using System Identification Unlike the pulse-width-modulation (PWM) converter, the LLC resonant converter is a complex nonlinearUnlike system. the pulse-width-modulation Therefore, it is difficult (PWM) to obtain conver itster, small-signal the LLC resonant model throughconverter mathematical is a complex derivation.nonlinear system. Previously, Therefore, researchers it is difficult had developed to obtain its the small-signal mathematical model methods through for mathematical deriving the small-signalderivation. Previously, dynamic model researcher of thes had LLC developed resonant converterthe mathematical [16–19]. methods However, for these deriving works the focused small- onlysignal on dynamic the matching model with of the circuit LLCac resonant sweep simulationconverter [16–19]. occurs only However, under specificthese works operating focused conditions. only on Atthe the matching same time, with the circuit flux-balance ac sweep loop simulation proposed occu in thisrs only paper, under there specific is no more operating literature conditions. to discuss. At Thethe same system time, identification the flux-balance tool of MATLABloop proposed [21] is in a useful this paper, tool to there obtain is theno small-signalmore literature model to discuss. transfer functionThe system without identification using any tool complex of MATLAB mathematical [21] is model a useful derivation. tool to Figureobtain 12the shows small-signal the processing model flowtransfer windows function of without the system using identification any complex of MATLAB.mathematical The model transfer derivation. function ofFigure the system 12 shows can the be processing flow windows of the system identification of MATLAB. The transfer function of the obtained from the simulated or measured system data such as time response or frequency response. system can be obtained from the simulated or measured system data such as time response or Therefore, the system identification tool of MATLAB [21] is used to obtain the small-signal model for controller design, in this paper. Energies 2019, 12, x FOR PEER REVIEW 10 of 19

Energiesfrequency2019 ,response.12, 3211 Therefore, the system identification tool of MATLAB [21] is used to obtain10 ofthe 18 small-signal model for controller design, in this paper.

Figure 12. ProcessingProcessing flow ﬂow windows windows of the syst systemem identification identiﬁcation tool of MATLAB.

4.2. Flux-Balance Flux-Balance Loop Controller Design Figure 13 showsshows thethe controlcontrol block block diagram diagram of of the the flux-balance flux-balance loop, loop, for for which which the the loop loop gain gain can can be expressed as beEnergies expressed 2019, 12 as, x FOR PEER REVIEW 11 of 19 Tb(s) = Gcomp,b(s)GPWM,b(s)Gbc(s) (16) Ts=Gb() comp,b () sG PWM,b () sGs bc () (16) wherewhereG Kbcpb( sis) representsthe DC gain, the transferwhich is function determined of the according controlled to plant, the crossover which is thefrequency duty ratio sets of as MOSFET fc,b = 10 b QwherekHz,1 (d1 and-tilde) Gbc (zs) toisrepresents the the zero, magnetizing whichthe transfer is DC set current at function 17.5 (kHziLm,DC of for -tilde),the po le/zerocoGntrolledPWM,d cancellation.( s)plant, represents which The the phaseis transferthe margin duty function ratio (PM) of is ° MOSFETtheset dutyas 72 ratioQ to1 (densure control1-tilde) stability. signalto the (vmagnetizing con,dThe-tilde) bode toplot DC the ofcurrent duty the ratio compensated (iLm,DC of MOSFET-tilde), flux-balanceGPWM,dQ1, and(s) representsGcomp,b loop( s)gain, indicatesthe aftertransfer thethe functioncontrolleraddition ofof of the the controller,duty flux-balance ratio iscontrol shown loop. signal in Figure (vcon,d 14b.-tilde) to the duty ratio of MOSFET Q1, and Gcomp,b(s) indicates the controller of the flux-balance loop. Using the system identification tool of MATLAB, the uncompensated loop gain from the duty ratio control signal to the magnetizing DC current under full load operation condition can be expressed as follows. The parameters of the LLC resonant converter are shown in Table 1, which will be shown in Section 5. i Lm,DC =G() sG () s v PWM,d bc con,d (17) 9 FigureFigure 13.13. ControlControl blockblock diagramdiagram1.452 ofof× the 10the flux-balanceflux-balance loop.loop. =.2 39 Using the system identification tools+ of MATLAB,487.1×× 10 the s+ 41.49 uncompensated 10 loop gain from the duty ratioThe control characteristic signal to the equation magnetizing in (17) DC has current two real under poles full at load 110 operationkrad/s (17.5 condition kHz) and can 377 be krad/s expressed (60 kHz),as follows. respectively. The parameters Figure 14a of theshows LLC the resonant bode plot converters of the are uncompensated shown in Table fl1,ux-balance which will loop be shown gains obtainedin Section from5. the mathematical model in (17) (blue dashed line) and Simplis circuit simulation (red eiLm,DC solid line). Figure 14a reveals that the dominate= GPWM pole,d( iss) Gatbc 17.5(s) kHz. The controller of the flux-balance evcon,d 9 (17) loop Gcomp,b(s) can, therefore, be chosen as a= PI-type controller1.452 10 and .can be expressed as follows s2+487.1 103×s+41.49 109 × × The characteristic equation in (17) has two= reals+z polesb at 110 krad/s (17.5 kHz) and 377 krad/s GsKcomp,b() pb (60 kHz), respectively. Figure 14a shows the bode plotss of the uncompensated flux-balance loop gains (18) obtained from the mathematical model in (17) (blue dasheds +62.8× line) 103 and Simplis circuit simulation (red =⋅20 solid line). Figure 14a reveals that the dominate pole is at 17.5s kHz. The controller of the flux-balance loop Gcomp,b(s) can, therefore, be chosen as a PI-type controller and can be expressed as follows

(a)

(b)

Figure 14. Bode plot of the flux-balance loop gain (a) uncompensated and (b) compensated.

4.3. Output-Voltage Loop Controller Design Figure 15 shows the control block diagram of the output-voltage loop, the loop gain of which can be expressed as follows

Tv() s =G comp,v () sG PWM, f () sG fv () s (19) where Gfv(s) represents the transfer function of the controlled plant, which is the switching frequency of MOSFET Q1 (f-tilde) to the output voltage (vo-tilde), GPWM,d(s) represents the transfer function of the

Energies 2019, 12, 3211 11 of 18

s+zb Gcomp,b(s) = Kpb s s+62.8 103 (18) = 20 × · s where Kpb is the DC gain, which is determined according to the crossover frequency sets as fc,b = 10 kHz, and zb is the zero, which is set at 17.5 kHz for pole/zero cancellation. The phase margin (PM) is set as 72◦ to ensure stability. The bode plot of the compensated ﬂux-balance loop gain, after the addition of the controller, is shown in Figure 14b.

Energies 2019, 12, x FOR PEER REVIEWTable 1. Parameters of the LLC resonant converter. 11 of 19

Symbol Description Quantity where Kpb is the DC gain, which is determined according to the crossover frequency sets as fc,b = 10 V input voltage 380 V kHz, and zb is thei zero, which is set at 17.5 kHz for pole/zero cancellation. The phase margin (PM) is V output voltage 20 V set as 72° to ensureo stability. The bode plot of the compensated flux-balance loop gain, after the Po,rated rated output power 200 W addition of the controller,n is shown in Figuretransformer 14b. turns ratio 10 Lm magnetizing inductance 310 µH Llk1 leakage inductance in the primary side 6.386 µH leakage inductance in the secondary side during the L 53 nH lk2,pos positive cycle leakage inductance in the secondary side during L 53 nH lk2,neg negative cycle (matched condition) leakage inductance in the secondary side during L 167.77 nH lk2,neg negative cycle (mismatched condition) Lext external resonant inductance 42 µH Cr resonant capacitance 20 nF Co Figure 13. Control blockoutput diagram capacitance of the flux-balance loop. 1000 µF rCo equivalent-series-resistance of the output capacitance 40 mΩ

(a)

(b)

FigureFigure 14. 14.Bode Bode plot plot of of thethe ﬂux-balanceflux-balance loop gain ( (aa)) uncompensated uncompensated and and (b ()b compensated.) compensated.

4.3. Output-Voltage Loop Controller Design Figure 15 shows the control block diagram of the output-voltage loop, the loop gain of which can be expressed as follows

Tv() s =G comp,v () sG PWM, f () sG fv () s (19)

where Gfv(s) represents the transfer function of the controlled plant, which is the switching frequency of MOSFET Q1 (f-tilde) to the output voltage (vo-tilde), GPWM,d(s) represents the transfer function of the

Energies 2019, 12, 3211 12 of 18

4.3. Output-Voltage Loop Controller Design Figure 15 shows the control block diagram of the output-voltage loop, the loop gain of which can be expressed as follows Energies 2019, 12, x FOR PEER REVIEWTv( s) = Gcomp,v(s)GPWM, f (s)G f v(s) 12 of 19 (19) where Gfv(switchings) represents frequency the control transfer signal function (vcon,f-tilde) of theto the controlled switching frequency plant, which of MOSFET is the Q1, switching and Gcomp,v(s) frequency is the controller of the output-voltage loop. of MOSFET Q1 (f -tilde) to the output voltage (vo-tilde), GPWM,d(s) represents the transfer function of the Using the system identification tool of MATLAB, the uncompensated loop gain from the switchingEnergies frequency 2019, 12 control, x FOR PEER signal REVIEW (v -tilde) to the switching frequency of MOSFET Q12 ,of and 19 Gcomp,v(s) switching frequency control signalcon,f to the output voltage under full load operation condition 1can be is the controller of the output-voltage loop. switchingexpressed frequency as follows. control The parameters signal (vcon,f of-tilde) the LLC to the resonant switching converter frequency are ofshown MOSFET in Table Q1, and 1. Gcomp,v(s) is the controller of the output-voltage loop. Using the system identification tool of MATLAB, the uncompensated loop gain from the switching frequency control signal to the output voltage under full load operation condition can be expressed as follows. The parameters of the LLC resonant converter are shown in Table 1.

FigureFigure 15. Control 15. Control block block diagram diagram of of the the output output voltage voltage loop. loop.

Using the system identification toolv of MATLAB, the uncompensated loop gain from the switching o =G() sG ( s) frequency control signal to the output voltagePWM, under f fv full load operation condition can be expressed as vcon, f Figure 15. Control block diagram of the output voltage loop. (20) follows. The parameters of the LLC resonant converter are shown3 in Table1. 594×× (s + 30.97 10 ) = . ss23+ 42.84×× 10 + 795.4 10 6 evvo o =G= G() sGPWM (, s)f (s)G f v(s) The characteristic equationev conin, f(20) hasPWM, a fcomplex fv pole pair at 21.42 ± j18.346 krad/s (3.41 ± j2.9 vcon, f 3 (20) kHz) and a zero at 30.97 krad/s (4.93 kHz). Figu594re( s16a+30.97 shows10 the) bode plots of the uncompensated(20) = × × 3 . s2594+42.84×× (s +10 30.973s+795.4 1010 ) 6 output-voltage loop gains obtained from= the math×ematical model× in. (20) (blue dashed line) and ss23+ 42.84×× 10 + 795.4 10 6 ° The characteristicSimplis circuit equationsimulation in(red (20) solid has line). a complex Figure 16a pole reveals pair that at the 21.42 phase jdown18.346 to krad−90 , due/s (3.41 to the j2.9 kHz) zero, is very close to complex pole pair. Thus, (20) can be simplified as±± a first-order system.± The± and a zero atThe 30.97 characteristic krad/s (4.93equation kHz). in (20) Figurehas a complex 16a showspole pair the at 21.42 bode j18.346 plots krad/s of the (3.41 uncompensated j2.9 kHz)controller and a of zero the at output 30.97 krad/svoltage (4.93 Gcomp,v kHz).(s) canFigu alsore 16a be shows chosen the as bode a PI-type plots ofcontroller the uncompensated and can be output-voltageoutput-voltageexpressed loop as gains follows loop obtained gains obtained from from the mathematicalthe mathematical model model in in (20) (20) (blue(blue dashed line) line) and and Simplis ° circuit simulationSimplis circuit (red simulation solid line). (red solid Figure line). 16 Figurea reveals 16a s+zreveals that that the the phase phase down down to to −9090, due◦, due to the to the zero, v − zero, is very close to complex pole pair.Gs=Kcomp,v Thus,() (20) pv can be simplified as a first-order system. The is very close to complex pole pair. Thus, (20) can be simplifieds as a first-order system. The controller of controller of the output voltage Gcomp,v(s) can also be chosen as3 a PI-type controller and can (21)be the output voltage Gcomp,v(s) can also be chosen as a PI-types + 18.85 controller× 10 and can be expressed as follows expressed as follows =70⋅ s s+zs+zv G (s) = K v where Kpv is the DC gain, which iscomp determinedGs=Kcomp,v,v () according pv pv s to the crossover frequency sets as fc,v = 6 ss+18.85 103 (21) kHz, zv is the zero, which is set at 18.85 kHz for =po70le/zero cancellation, and the phase margin at f(21)c,v is s + 18.85s×× 103 78.33° to ensure stability. The bode plot of =70the co⋅ mpensated· output-voltage loop gain, after the addition of the controller, is shown in Figure 16b. s where Kpv is the DC gain, which is determined according to the crossover frequency sets as fc,v = 6 kHz, where Kpv is the DC gain, which is determined according to the crossover frequency sets as fc,v = 6 zv is the zero, which is set at 18.85 kHz for pole/zero cancellation, and the phase margin at fc,v is 78.33◦ kHz, zv is the zero, which is set at 18.85 kHz for pole/zero cancellation, and the phase margin at fc,v is to ensure stability. The bode plot of the compensated output-voltage loop gain, after the addition of 78.33° to ensure stability. The bode plot of the compensated output-voltage loop gain, after the the controller,addition is shown of the controller, in Figure is shown 16b. in Figure 16b.

(a)

Figure 16. Cont.

Energies 2019Energies, 12, 3211 2019, 12, x FOR PEER REVIEW 13 of 19 13 of 18

(b)

Figure 16.FigureBode 16. plot Bode of plot the of output-voltage the output-voltage loop loop gain (a ()a uncompensated) uncompensated and (b and) compensated. (b) compensated.

5. Simulation5. Simulation and Experimental and Experimental Veriﬁcation Verification To verify the proposed approach, Simplis software was used to construct the simulation, and an EnergiesTo 2019 verifyexperimental, 12, x the FOR proposed PEER platform REVIEW approach, was built as Simplis shown softwarein Figure 17. was In usedthis paper, to construct the center-tapped the simulation, model and14 of an19 experimentalconstructed platform in Simplis was builtis similar as shownto Figure in 5. FigureTwo ideal 17 transformers,. In this paper, where the primary center-tapped side is model constructedconnecting in Simplis in parallel, is similar and the to secondary Figure5. side Two connecting ideal transformers, in series, are used. where The themagnetizing primaryμ side is Lextinductance and leakage inductancesexternal are addedresonant in the inductance primary side and secondary sides, respectively. 42 H connecting in parallel, and the secondary side connecting in series, are used. The magnetizing The advantage of this method is that all of branches current and nodes voltages can easily be Cr resonant capacitance 20 nF inductancemeasured and leakage for observation inductances and analysis. are added in the primary side and secondary sides, respectively. μ The advantageCo The of thisproposed method flux-balance is that control alloutput of branchesstrategy capacitance was current implemented and nodes by using voltages Texas Instrument can easily 1000 C2000 be measuredF Piccolo 28035 digital signal processor. For experimental equipment, Agilent Technologies for observationrCo and analysis.equivalent-series-resistance of the output capacitance 40 mΩ InfiniiVision DSO-X 3054A oscilloscope (BW = 500 MHz) was used; Keysight Technologies 1147B current probe (BW = 50 MHz) was used for iLr measurement, and Sapphire Instrument LDP-6002 (BW = 25 MHz) differential voltage probes were used for differential voltage measurement (vgs1). Table 1 lists the related parameters of the LLC resonant converter. The leakage inductance at the secondary side, during the negative cycle, covers the matched condition (Llk2,neg = 53 nH) and mismatched condition (Llk2,neg = 167.77 nH). The set switching frequency is less than the resonant frequency, i.e. fs < fr, for an input voltage Vi = 380 V.

Table 1. Parameters of the LLC resonant converter.

Symbol Description Quantity

Vi input voltage 380 V

Vo output voltage 20 V

Po,rated rated output power 200 W n transformer turns ratio 10

Lm magnetizing inductance 310 μH

Llk1 leakage inductance in the primary side 6.386 μH

leakage inductance in the secondary side during the Llk2,pos Figure 17. Experimental prototype of LLC resonant converter. 53 nH Figure 17. Experimentalpositive prototype cycle of LLC resonant converter. leakage inductance in the secondary side during 5.1. Steady-StateThe proposed LOperationlk2,neg flux-balance control strategy was implemented by using Texas53 nH Instrument C2000 negative cycle (matched condition) Piccolo 28035 digital signal processor. For experimental equipment, Agilent Technologies InfiniiVision Figure 18 shows the simulatedleakage inductance and experimental in the secondary results side duringof the LLC resonant converter at full DSO-X 3054A oscilloscopeLlk2,neg (BW = 500 MHz) was used; Keysight Technologies167.77 1147B nH current probe load in steady-state operation withnegative the matc cyclehed (mismatched secondary-side condition) leakage inductances, i.e., Llk2,pos = Llk2,neg (BW = 50 MHz) was used for i measurement, and Sapphire Instrument LDP-6002 (BW = 25 MHz) = 53 nH. In Figure 18a, the peak-to-peakLr ripple of the output voltage is approximately 734 mV. The differential voltage probes were used for differential voltage measurement (vgs1). Table1 lists the conduction times of the secondary side diodes are 2.96 μs. The resonant frequency is fr = 168.9 kHz, related parameters of the LLC resonant converter. The leakage inductance at the secondary side, and switching frequency is fs = 134.78 kHz. In Figure 18b, the peak-to-peak ripple of the output during the negative cycle, covers the matched condition (L = 53 nH) and mismatched condition voltage is 700 mV and conduction times of the secondary-sidelk2,neg diodes are approximately 3.14 μs (Llk2,neg = 167.77 nH). The set switching frequency is less than the resonant frequency, i.e., fs < fr, for an during the positive and negative cycles. Therefore, the resonant frequency is fr = 159.23 kHz and input voltage Vi = 380 V. switching frequency is fs = 130.11 kHz. The simulated and experimental results show that the 5.1.magnetizing Steady-State current Operation is almost balanced between horizontal axis, i.e., ILm,DC = 0 A, but some parasitic effects in the secondary side of the hardware cause a mismatch between the simulated and experimentalFigure 18 results. shows the simulated and experimental results of the LLC resonant converter at full load in steady-state operation with the matched secondary-side leakage inductances, i.e., Llk2,pos = Llk2,neg

(a) (b)

Figure 18. Matched secondary side leakage inductances at full load in steady-state operation (a) simulation results and (b) experiment results.

Figure 19 shows the simulated and experimental results of the LLC resonant converter at steady- state, when operating at full load with the mismatched secondary side leakage inductances, i.e., Llk2,pos

Energies 2019, 12, x FOR PEER REVIEW 14 of 19

Lext external resonant inductance 42 μH

Cr resonant capacitance 20 nF

Co output capacitance 1000 μF

rCo equivalent-series-resistance of the output capacitance 40 mΩ

Figure 17. Experimental prototype of LLC resonant converter.

5.1. Steady-State Operation

EnergiesFigure2019, 1218, 3211 shows the simulated and experimental results of the LLC resonant converter at14 offull 18 load in steady-state operation with the matched secondary-side leakage inductances, i.e., Llk2,pos = Llk2,neg = 53 nH. In Figure 18a, the peak-to-peak ripple of the output voltage is approximately 734 mV. The = 53 nH. In Figure 18a, the peak-to-peak ripple of the output voltage is approximately 734 mV. conduction times of the secondary side diodes are 2.96 μs. The resonant frequency is fr = 168.9 kHz, The conduction times of the secondary side diodes are 2.96 µs. The resonant frequency is fr = 168.9 kHz, and switching frequency is fs = 134.78 kHz. In Figure 18b, the peak-to-peak ripple of the output and switching frequency is f = 134.78 kHz. In Figure 18b, the peak-to-peak ripple of the output voltage is 700 mV and conductions times of the secondary-side diodes are approximately 3.14 μs voltage is 700 mV and conduction times of the secondary-side diodes are approximately 3.14 µs during during the positive and negative cycles. Therefore, the resonant frequency is fr = 159.23 kHz and the positive and negative cycles. Therefore, the resonant frequency is fr = 159.23 kHz and switching switching frequency is fs = 130.11 kHz. The simulated and experimental results show that the frequency is fs = 130.11 kHz. The simulated and experimental results show that the magnetizing magnetizing current is almost balanced between horizontal axis, i.e., ILm,DC = 0 A, but some parasitic current is almost balanced between horizontal axis, i.e., I = 0 A, but some parasitic eﬀects in the effects in the secondary side of the hardware cause Lm,DCa mismatch between the simulated and secondary side of the hardware cause a mismatch between the simulated and experimental results. experimental results.

(a) (b)

Figure 18. 18. MatchedMatched secondary secondary side side leakage leakage inductances inductances at atfull full load load in steady-state in steady-state operation operation (a) simulation(a) simulation results results and and (b) (experimentb) experiment results. results.

Figure 1919 shows shows the the simulated simulated and and experimental experimental results results of the of LLC the resonant LLC resonant converter converter at steady- at state,steady-state, when operating when operating at full load at fullwith load the withmism theatched mismatched secondary secondary side leakage side inductances, leakage inductances, i.e., Llk2,pos i.e., Llk2,pos = 53 nH and Llk2,neg = 167.77 nH. In Figure 19a, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 744 mV and 881 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 2.83 µs. Therefore, the resonant frequency during the positive cycle is fr,pos = 176.67 kHz. The conduction time of the secondary side diode during the negative cycle is 3.15 µs. Hence, the resonant frequency during the negative cycle is fr,neg = 158.73 kHz. The switching frequency is fs = 127.98 kHz and magnetizing DC current is ILm,DC = 436 mA. In Figure 19b, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 750 mV and 1 V, respectively. The conduction time of the secondary side diode during the positive cycle is 3 µs. Hence, the resonant frequency during positive cycle is fr,pos = 166.67 kHz. The conduction time of the secondary side diode during the negative cycle is 3.2 µs; therefore, the resonant frequency during the negative cycle is fr,neg = 156.25 kHz. The switching frequency is fs = 127.01 kHz. The magnetizing DC current can be estimated as ILm,DC,est = 400 mA using (15), which is approximately the same as the simulated result, although the experimental result does not measure the magnetizing DC current directly. Figure 20 shows the simulated and experimental results of the LLC resonant converter at full load in steady-state with the ﬂux-balance loop control, for the same mismatched condition as that in Figure 19. In Figure 20a, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 780 mV and 774 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 2.97 µs; therefore, the resonant frequency during positive cycle is fr,pos = 168.35 kHz. The conduction time of the secondary side diode during the negative cycle is 3.04 µs; hence, the resonant frequency during the negative cycle is fr,neg = 164.47 kHz. The switching frequency is fs = 125.37 kHz and magnetizing DC current is ILm,DC = 19 mA. In Figure 20b, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 750 mV and 740 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 3.15 µs; hence, the resonant frequency Energies 2019, 12, x FOR PEER REVIEW 15 of 19

= 53 nH and Llk2,neg = 167.77 nH. In Figure 19a, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 744 mV and 881 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 2.83 μs. Therefore, the resonant frequency during the positive cycle is fr,pos = 176.67 kHz. The conduction time of the secondary side diode during the negative cycle is 3.15 μs. Hence, the resonant frequency during the negative cycle is fr,neg = 158.73 kHz.

TheEnergies switching2019, 12, 3211frequency is fs = 127.98 kHz and magnetizing DC current is ILm,DC = 436 mA. In Figure15 of 18 19b, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 750 mV and 1 V, respectively. The conduction time of the secondary side diode during the positive cycle isduring 3 μs. Hence, positive the cycle resonant is fr,pos freque= 158.73ncy kHz. during The positive conduction cycle time is fr,pos of the= 166.67 secondary kHz. sideThe conduction diode during time the ofnegative the secondary cycle is 3.2sideµ s;diode therefore, during the the resonant negative frequency cycle is during3.2 μs; negativetherefore, cycle the isresonantfr,neg = 156.25 frequency kHz. duringThe switching the negative frequency cycle isisf sfr,neg= 126.21 = 156.25 kHz. kHz. The The magnetizing switching DCfrequency current is can fs = be 127.01 estimated kHz. toThe be magnetizingILm,DC,est = 20 DC mA, current using can (15). be The estimated magnetizing as ILm,DC,est DC current= 400 mA estimated using (15), from which theexperimental is approximately result the is sameclose as to the the simulated value obtained result, from although the simulations, the experimental which result conﬁrms does thenot emeasureﬀectiveness the magnetizing of the approach DC currentproposed directly. in this paper.

(a) (b)

EnergiesFigureFigure 2019, 19. 19.12, xMismatchedMismatched FOR PEER REVIEW secondary secondary side side leakage leakage inductances inductances at at full full load load in in steady-state steady-state operation operation ( (a16a)) of 19 simulationsimulation results results and and ( (bb)) experiment experiment results. results.

Figure 20 shows the simulated and experimental results of the LLC resonant converter at full load in steady-state with the flux-balance loop control, for the same mismatched condition as that in Figure 19. In Figure 20a, the peak-to-peak ripples of the output voltage during the positive and negative cycles are 780 mV and 774 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 2.97 μs; therefore, the resonant frequency during positive cycle is fr,pos = 168.35 kHz. The conduction time of the secondary side diode during the negative cycle is 3.04 μs; hence, the resonant frequency during the negative cycle is fr,neg = 164.47 kHz. The switching frequency is fs = 125.37 kHz and magnetizing DC current is ILm,DC = 19 mA. In Figure 20b, the peak-to- peak ripples of the output voltage during the positive and negative cycles are 750 mV and 740 mV, respectively. The conduction time of the secondary side diode during the positive cycle is 3.15 μs; hence, the resonant frequency during positive cycle is fr,pos = 158.73 kHz. The conduction time of the secondary side diode during(a) the negative cycle is 3.2 μs; therefore, the resonant(b) frequency during negative cycle is fr,neg = 156.25 kHz. The switching frequency is fs = 126.21 kHz. The magnetizing DC Figure 20. MismatchedMismatched secondary side leakage inductances at full load in steady-state operation with current can be estimated to be ILm,DC,est = 20 mA, using (15). The magnetizing DC current estimated the flux-balanceflux-balance loop control ((a)) simulationsimulation resultsresults andand ((bb)) experimentexperiment results.results. from the experimental result is close to the value obtained from the simulations, which confirms the effectiveness5.2. Dynamic-State Dynamic-State of the Operation approach proposed in this paper. Figure 21 shows the simulated and experimental results of the transient response of the LLC resonant converter,converter, which which compensates compensates for for the th mismatchede mismatched secondary secondary side leakageside leakage inductances inductances using usingthe flux-balance the flux-balance loop, forloop, load for changes load changes from 50% from to 50% 70%. to The 70%. transient The transient time is time approximately is approximately 200 µs, 200as shown μs, as inshown the simulated in the simulated and experimental and experimental results. re Figuresults. 21Figure reveals 21 thatreveals the that voltage the loopvoltage and loop the andflux-balance the flux-balance loop operate loop simultaneously,operate simultaneously, without awiffectingthout eachaffecting other each in the other transient in the state.transient Figure state. 22 Figureshows the22 shows simulated the simulated and experimental and experimental results of theresult transients of the responsetransient ofresponse the LLC of resonant the LLC converter, resonant which compensates for the mismatched secondary side leakage inductances with the flux-balance converter, which compensates for the mismatched secondary side leakage inductances with the flux- balanceloop, for loop, load for changes load changes from 70% from to 70% 50%. to The50%. simulated The simulated and experimentaland experimental results results show show that that the thetransient transient time time is 200 is µ200s. Figureμs. Figure 22 shows 22 shows that that the voltagethe voltage loop loop and and flux-balance flux-balance loop loop do not do a notffect affect each eachother, other, even even during during the load the stepload down.step down. Figure Figu 23re shows 23 shows the experimental the experimental results results of the of disabled the disabled and andenabled enabled flux-balance flux-balance loop at loop 70% load,at 70% considering load, considering the mismatched the mismatched secondary sidesecondary leakage side inductances. leakage Wheninductances. the flux-balance When the flux-balance loop is disabled, loop theis disabl maximumed, the peak-to-peakmaximum peak-to-peak ripple of the ripple output of the voltage output is voltage is 818.75 mV. Once the flux-balance loop is enabled, the maximum peak-to-peak ripple of the output voltage reduces to 731.25 mV.

(a) (b)

Figure 21. Transient response of load change from 50% to 70% with the mismatched secondary side leakage inductances and the flux-balance loop control (a) simulation results and (b) experiment results.

Energies 2019, 12, x FOR PEER REVIEW 16 of 19

(a) (b)

Figure 20. Mismatched secondary side leakage inductances at full load in steady-state operation with the flux-balance loop control (a) simulation results and (b) experiment results.

5.2. Dynamic-State Operation Figure 21 shows the simulated and experimental results of the transient response of the LLC resonant converter, which compensates for the mismatched secondary side leakage inductances using the flux-balance loop, for load changes from 50% to 70%. The transient time is approximately 200 μs, as shown in the simulated and experimental results. Figure 21 reveals that the voltage loop and the flux-balance loop operate simultaneously, without affecting each other in the transient state. Figure 22 shows the simulated and experimental results of the transient response of the LLC resonant converter, which compensates for the mismatched secondary side leakage inductances with the flux- balance loop, for load changes from 70% to 50%. The simulated and experimental results show that the transient time is 200 μs. Figure 22 shows that the voltage loop and flux-balance loop do not affect each other, even during the load step down. Figure 23 shows the experimental results of the disabled Energies 2019, 12, 3211 16 of 18 and enabled flux-balance loop at 70% load, considering the mismatched secondary side leakage inductances. When the flux-balance loop is disabled, the maximum peak-to-peak ripple of the output voltage818.75 mV. is 818.75 Once mV. the ﬂux-balanceOnce the flux-balance loop is enabled, loop is enabled, the maximum the maximum peak-to-peak peak-to-peak ripple of ripple the output of the outputvoltage voltage reduces reduces to 731.25 to mV.731.25 mV.

(a) (b)

EnergiesFigure 2019, 1221. , x Transient FOR PEER response REVIEW of load change from 50% to 70% with the mismatched secondary side 17 of 19 leakageleakage inductancesinductances and and the the ﬂux-balance flux-balance loop loop control control (a) simulation(a) simulation results results and (b and) experiment (b) experiment results. results.

(a) (b)

FigureFigure 22. TransientTransient response of of load change from from 70% to 50% with the mismatched secondary side side leakageleakage inductancesinductances andand the the ﬂux-balance flux-balance loop loop control control (a) simulation(a) simulation results results and ( band) experiment (b) experiment results. results.

Figure 23. Experiment results of the disabled/enabled flux-balance loop at 70% load, considering the mismatched secondary side leakage inductances.

6. Conclusions In this paper, a flux-balance loop control strategy was proposed to solve the flux walking issues of the center-tapped transformer in the LLC resonant converter, which were caused by mismatched leakage inductances at the secondary side. The magnetizing DC current effect and voltage gain parameter variation caused by the mismatched conditions at the secondary side were analyzed. Based on these analyses, the flux-balance control loop combining with the original output-voltage control loop, was proposed to resolve the issues. Besides, a magnetizing DC current sampling strategy and estimation scheme was also proposed to overcome the difficulties in measuring the magnetizing DC current. The simulation and experimental results confirmed the effectiveness of the proposed control strategy.

Author Contributions: Yuan-Chih Lin substantially contributed to literature search, control strategy design, examination and interpretation of the results, development of the overall system, and review and proofreading of the manuscript. Ding-Tang Chen substantially contributed to implement the control strategy, production and analysis of the results, and preparation and revision of the manuscript. Ching-Jan Chen substantially contributed to the review and proofreading of the manuscript.

Energies 2019, 12, x FOR PEER REVIEW 17 of 19

(a) (b)

Figure 22. Transient response of load change from 70% to 50% with the mismatched secondary side Energiesleakage2019, 12 inductances, 3211 and the flux-balance loop control (a) simulation results and (b) experiment17 of 18 results.

Figure 23. Experiment results of the disableddisabled/enabled/enabled ﬂux-balanceflux-balance loop at 70% load, considering the mismatched secondary sideside leakageleakage inductances.inductances.

6. Conclusions 6. Conclusions InIn this paper, aa flux-balanceflux-balance looploop controlcontrol strategystrategy waswas proposedproposed toto solvesolve thethe fluxflux walkingwalking issuesissues of the center-tapped transformer in the LLC resonantresonant converter, whichwhich werewere causedcaused byby mismatchedmismatched leakageleakage inductancesinductances atat thethe secondarysecondary side.side. The The magnetizing magnetizing DC DC current current effect effect and voltagevoltage gaingain parameterparameter variation caused by the mismatched conditions at the secondary side were analyzed. Based on thesethese analyses,analyses, thethe flux-balanceflux-balance controlcontrol looploop combiningcombining withwith thethe originaloriginal output-voltageoutput-voltage control loop,loop, was was proposed proposed to resolveto resolve the issues.the issu Besides,es. Besides, a magnetizing a magnetizing DC current DC current sampling sampling strategy andstrategy estimation and estimation scheme was scheme also proposedwas also toproposed overcome to the overcome difficulties thein difficulties measuring in the measuring magnetizing the DCmagnetizing current. TheDC current. simulation The andsimulation experimental and experime resultsntal confirmed results theconfirmed effectiveness the effectiveness of the proposed of the controlproposed strategy. control strategy.

AuthorAuthor Contributions:Contributions: Y.-C.L.Yuan-Chih substantially Lin substantially contributed contributed to literature to search, literature control search, strategy control design, strategy examination design, andexamination interpretation and interpretation of the results, of th developmente results, development of the overall of the system, overall andsystem, review and andreview proofreading and proofreading of the manuscript. D.-T.C. substantially contributed to implement the control strategy, production and analysis of the of the manuscript. Ding-Tang Chen substantially contributed to implement the control strategy, production and results, and preparation and revision of the manuscript. C.-J.C. substantially contributed to the review and proofreadinganalysis of the of results, the manuscript. and preparation and revision of the manuscript. Ching-Jan Chen substantially contributed to the review and proofreading of the manuscript. Funding: This work was supported by the Ministry of Science and Technology (MOST) in Taiwan under grants MOST 107-2221-E-002-054-MY2 and National Taiwan University under grants NTU-CC-108L890701.

Acknowledgments: The authors want to thank SIMPLIS Technologies Corporation, U.S.A, for providing SIMPLIS simulation tool. Conﬂicts of Interest: The authors declare no conﬂict of interest.

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