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Wireless Interconnect Using Inductive Coupling in 3D-Ics by Sang Wook

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Wireless Interconnect Using Inductive Coupling in 3D-Ics by Sang Wook Wireless Interconnect using Inductive Coupling in 3D-ICs by Sang Wook Han A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy (Electrical Engineering) in The University of Michigan 2012 Doctoral Committee: Assistant Professor David D. Wentzloff, Chair Professor David Blaauw Professor Karl Grosh Professor John Patrick Hayes TABLE OF CONTENTS LIST OF FIGURES ...................................................................................................... iv LIST OF TABLES ...................................................................................................... viii LIST OF APPENDICES ............................................................................................... ix Chapter I. Introduction ............................................................................................... 1 I.1 3DIC ................................................................................................................. 4 I.2 Through-Silicon-Vias ....................................................................................... 7 I.3 Capacitive Coupling ......................................................................................... 8 I.4 Inductive Coupling ......................................................................................... 10 I.4.1 ... Inductive Data Link ................................................................................. 12 I.4.2 ... Inductive Power Link .............................................................................. 13 I.4.3 ... Resonant Inductive Coupling .................................................................. 13 I.5 Contributions of This Work ............................................................................ 14 Chapter II. Characterization of Wireless 3D Interconnect ........................................ 16 II.1 Introduction .................................................................................................... 16 II.2 Inductive Coupling Channel ........................................................................... 16 II.2.1.. Boundary of Near and Far-Fields ............................................................ 18 II.2.2.. Coupling Coefficient k ............................................................................ 21 II.3 Resonant Inductive Coupling ......................................................................... 23 II.3.1.. Theoretical Analysis ................................................................................ 24 II.3.2.. Simulations .............................................................................................. 27 II.4 In-phase Resonant Inductive Coupling for Multiple Stacked Dies ................ 30 II.4.1.. Theoretical Analysis ................................................................................ 31 II.4.2.. Measurement Results .............................................................................. 36 Chapter III. Characterization of Wired 3D Interconnect ............................................ 39 III.1 Introduction .................................................................................................... 39 III.2 Test Structure for Characterizing Proximity Effect ........................................ 40 ii III.3 Measurement Results ...................................................................................... 42 III.4 Analysis .......................................................................................................... 44 III.5 Modeling the Proximity Effect ....................................................................... 46 Chapter IV. IC using Resonant Inductive Coupling ................................................... 54 IV.1 Introduction .................................................................................................... 54 IV.2 Channel Modeling .......................................................................................... 56 IV.2.1 Basic Coupled Inductor Pair ................................................................... 56 IV.2.2 4x4 Routing Coupled Inductors .............................................................. 57 IV.3 Circuit Design ................................................................................................. 61 IV.3.1 Transmitter .............................................................................................. 62 IV.3.2 Receiver ................................................................................................... 64 IV.3.3 Transceiver .............................................................................................. 67 IV.3.4 System for Testing .................................................................................. 67 IV.4 Layout ............................................................................................................. 69 IV.5 Measurements ................................................................................................. 73 Chapter V. IC using Multi-Layer Signal Boosting .................................................... 76 V.1 Introduction .................................................................................................... 76 V.2 Circuit Design ................................................................................................. 78 V.3 Layout ............................................................................................................. 82 V.4 Measurement .................................................................................................. 84 Chapter VI. IC for Wireless Power Transfer .............................................................. 87 VI.1 Introduction .................................................................................................... 87 VI.2 Channel Modeling .......................................................................................... 88 VI.3 Circuit Design ................................................................................................. 91 VI.4 Measurement .................................................................................................. 94 Chapter VII. Conclusion ............................................................................................... 99 VII.1 Summary ......................................................................................................... 99 VII.2 Future work................................................................................................... 101 APPENDICES .......................................................................................................... 103 BIBLIOGRAPHY ...................................................................................................... 117 iii LIST OF FIGURES Fig. I.1. Comparison of different methods to integrate system integration. .................. 3 Fig. I.2. Die stacking with wire-bonding (left) and POP with mirco-bumps (right) [Elpida] ............................................................................................................................... 4 Fig. I.3. Interconnect speed and performance relationship. Beyond 130nm, interconnect delay is dominant. [23] ................................................................................... 5 Fig. I.4. Vertical stacking can reduce the length of global interconnect. dramatically. 6 Fig. I.5. 3DIC can increase integration density after planar CMOS process. [29] ........ 7 Fig. I.6. Multiple stacked die (left) and photo of DRAM die adapting TSVs (right) [Samsung] ........................................................................................................................... 8 Fig. I.7. Wireless wafer level tester using capacitive coupling (a) head plate open (b) head plate closed [40] ....................................................................................................... 10 Fig. I.8. Concept of wireless inductive data link. ........................................................ 12 Fig. I.9. Concept of wireless inductive power link. ..................................................... 13 Fig. II.1. Diagram and equivalent circuit of inductive link. ......................................... 17 Fig. II.2. Frequency response of general inductive channel. ....................................... 18 Fig. II.3. Three-region models around an electromagnetic source. ............................. 19 Fig. II.4. Boundary of near-field depending on the frequency..................................... 21 Fig. II.5. Coupling coefficient versus normalized distance. ........................................ 23 Fig. II.6. (a) SIC equivalent circuit and (b) RIC equivalent circuit ............................. 25 Fig. II.7. Frequency response of RIC. .......................................................................... 25 Fig. II.8. Coupled coil pair structure for HFSS. ........................................................... 28 Fig. II.9. RIC resonant frequency................................................................................. 29 Fig. II.10. RIC improvement over SIC. ....................................................................... 29 Fig. II.11. Concept of wireless through-die-interconnect in 3DIC. ............................. 30 Fig. II.12. Concept of multi-layer signal boosting. ...................................................... 32 Fig. II.13. Equivalent circuit of inductively coupled circuits. ....................................
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