Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications

electronics

Article Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications

Daniel Pietron 1,* , Tomasz Borejko 1,2 and Witold Adam Pleskacz 1

1 Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, ul. Koszykowa 75, 00-662 Warsaw, Poland; [email protected] or [email protected] (T.B.); [email protected] (W.A.P.) 2 ChipCraft Sp. z o.o., ul. Dobrza´nskiego3, lok. BS073, 20-262 Lublin, Poland * Correspondence: [email protected]

Abstract: A new 1.575 GHz active balun with a classic double-balanced Gilbert mixer for global navigation satellite systems is proposed herein. A simple, low-noise ampliﬁer architecture is used with a center-tapped inductor to generate a differential signal equal in amplitude and shifted in phase by 180◦. The main advantage of the proposed circuit is that the phase shift between the outputs is always equal to 180◦, with an accuracy of ±5◦, and the gain difference between the balun outputs does not change by more than 1.5 dB. This phase shift and gain difference between the outputs are also preserved for all process corners, as well as temperature and voltage supply variations. In the balun design, a band calibration system based on a switchable capacitor bank is proposed. The balun and mixer were designed with a 110 nm CMOS process, consuming only a 2.24 mA current from a 1.5 V supply. The measured noise ﬁgure and conversion gain of the balun and mixer were, respectively, NF = 7.7 dB and GC = 25.8 dB in the band of interest.

Citation: Pietron, D.; Borejko, T.; Keywords: balun; calibration; capacitor bank; Gilbert mixer; GNSS; LNA Pleskacz, W.A. Active Balun with Center-Tapped Inductor and Double-Balanced Gilbert Mixer for GNSS Applications. Electronics 2021, 1. Introduction 10, 1351. https://doi.org/10.3390/ The balun is a circuit widely used in radio frequency (RF) systems of single gigahertz electronics10111351 up to hundreds of gigahertz. The balun is used to convert an unbalanced signal to a symmetrical one. In the literature, we can find narrowband and broadband balun circuits. Academic Editor: Egidio Ragonese Narrowband systems are most often active systems that consume current and contain a resonant circuit that allows for signal filtering and additional signal amplification [1–4]. The Received: 27 April 2021 more popular balun circuits are broadband baluns [5–22], among which we can distinguish Accepted: 3 June 2021 Published: 5 June 2021 the class of ultra-wideband (UWB) circuits [5–9,16,17]. The UWB circuits are capable of transmitting data over a wide spectrum of frequency bands with low power and high data

Publisher’s Note: MDPI stays neutral rates. The UWB system frequency spectrum is allocated to the frequencies ranging from with regard to jurisdictional claims in 3.168 to 10.650 GHz. published maps and institutional afﬁl- We can also distinguish baluns according to whether the applied circuit is active (consumes iations. current) or passive (consumes no current). In the case of active balun solutions, the common- gate–common-source (CG-CS) balun circuit is the most popular solution due to its good parameters, small area occupation and simplicity of implementation [1–4,6,13,16,17,19,21–23.] The CG-CS balun circuit can be implemented as a narrowband or wideband circuit. Solutions based on one transistor can also be found in the literature [24], as well as Copyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland. various solutions using a differential ampliﬁer circuit as a balun circuit [5,20]. In integrated This article is an open access article circuits, passive baluns for low frequencies have very large dimensions. These change as distributed under the terms and the frequency at which the circuit operates increases: the higher the frequency, the smaller conditions of the Creative Commons the passive balun circuit that can be implemented. The size of a balun results from the Attribution (CC BY) license (https:// wavelength propagating in the integrated circuit. Passive baluns are usually broadband creativecommons.org/licenses/by/ systems. A passive balun for the K band (18.4–32.2 GHz) composed of a pair of coupled 4.0/). spiral inductors has dimension of only 410 µm × 180 µm [10]. A passive balun can be

Electronics 2021, 10, 1351. https://doi.org/10.3390/electronics10111351 https://www.mdpi.com/journal/electronics Electronics 2021, 10, 1351 2 of 20

implemented as a transformer [8,11,14,20,25] or as coupled transmission lines [11,18,26,27]. Balun circuit solutions using coupled transmission lines are solutions with very wide bandwidths. The bands of the coupled transmission-line baluns presented in previous articles [18,26,27] are as follows: 50–67 GHz (bandwidth of 17 GHz), 29–46 GHz (bandwidth of 17 GHz) and 88–224 GHz (bandwidth of 136 GHz). One interesting solution involving a passive micromachined solenoid balun, based on the microelectromechanical (MEMS) circuit, was also been found in [28]. The transformer balun can be integrated with a radio frequency system on chips. It can work at a frequency range of 0.5–10 GHz and shows less than 0.7 dB amplitude imbalance and less than 1.58 phase imbalance. Balun circuits have also been implemented in various technologies, for example (apart from silicon), in SiGe (silicon-germanium) [9]. In recent years, devices for determining position coordinates have been continually developed [29]. They are increasingly used in new fields, such as in sports, transport and medicine. There is a constant demand on the market for ever better navigation system solutions, ones which are more accurate (e.g., use several navigation systems to increase accuracy) or consume less energy, allowing devices to operate for longer times. Global navigation satellite system (GNSS) receivers with low noise, low power consumption, high integration and low cost are highly desirable. In GNSS receivers, a differential approach is usually preferred to an unbalanced one. Balanced solutions have better rejection of parasitic couplings and higher immunity to common mode noise. However, since the signal received from the antenna is unbalanced, it has to be divided into two signals equal in amplitude and shifted in phase by 180◦, these being the components of the differential signal. The balun and mixer presented below were used in a fully integrated dual-frequency (L1 and L5 bands) GNSS system on a chip (SoC) [30]. This article presents the narrowband balun and mixer implementation for the L1 band (center frequency at 1575.42 MHz ± 30 MHz). In the receiving path, the balun is between a low-noise amplifier (LNA) and a double- balanced Gilbert mixer, as shown in Figure1. The balun circuit should be matched to 50 Ω on input. In the target chip, it is anticipated that the circuit will be able to operate in several configurations: with or without a SAW filter between the LNA (designed in the given IC) and the balun, or with an external LNA. The use of a balun is required due to the necessity of providing a differential radio frequency signal to the input of a double-balanced mixer. Figure1 also shows the desired parameters of the balun and mixer blocks. The balun should have a gain (G) higher than 15 dB and noise figure (NF) less than 5 dB. The input impedance matching for the balun should be better than −10 dB (S11 < −10 dB). The mixer should have a conversion gain higher than 5 dB and noise figure less than 25 dB. The balun is loaded directly by the mixer circuit. The mixer input represents a high impedance and a certain capacitance (Cgg of the mixer’s input transistor), which allows the balun to obtain good amplification. The proposed balun circuit stands out from other solutions in that it makes it possible to obtain very good parameters in a simple way. Its main advantage is that it makes it easy to get a phase difference of 180 degrees between the output signals and the same amplitude for the output signals with the use of a properly connected coil with a tap. The second advantage of the circuit is the ease of obtaining impedance matching and noise matching at its input—as in a classic low-noise amplifier circuit. This matching is obtained by properly tuning the LC matching circuit. Staying on the subject of LNAs, the circuit makes it possible to achieve a very low noise figure, even below NF < 2 dB, of course with the optimization of the noise matching and appropriate polarization. This circuit also has several drawbacks. One of them is the need to use three coils, which is associated with a large occupied area. The advantage of the proposed balun is that it is narrowband, which makes it possible to selectively amplify the desired frequencies while filtering out interference signals. However, this circuit is not suitable for broadband solutions. In other research work, it was possible to obtain a 3 dB gain bandwidth with a width of 150 MHz Electronics 2021, 10, 1351 3 of 20

and maximum gain of 25 dB. The circuit can ﬁnd applications in all kinds of radio frequency Electronics 2021, 10, x FOR PEER REVIEWtransceiver systems with narrow, selective bands, and there is probably no better solution3 of 21

in these kinds of applications.

Figure 1. Block diagram ofFigure the analog 1. Block frontend diagram GNSS of radiothe analog block frontend and block GNSS speciﬁcation radio block (the and shaded block part specification is presented (the and shaded part is presented and discussed in this article). discussed in this article).

2. DesignFigure Considerations1 also shows the desired parameters of the balun and mixer blocks. The balun should have a gain (G) higher than 15 dB and noise figure (NF) less than 5 dB. The input 2.1. Balun impedance matching for the balun should be better than −10 dB (S11 < −10 dB). The mixer shouldA have balun a is conversion a circuit for gain which higher the main than function 5 dB and is tonoise convert figure an unbalancedless than 25 signal dB. The to a balanced signal. This circuit can provide signal amplification—an active circuit that draws balun is loaded directly by the mixer circuit. The mixer input represents a high impedance current—or may introduce gain losses—a passive circuit that does not consume current. and a certain capacitance (Cgg of the mixer’s input transistor), which allows the balun to The balun circuit is very often used in radio frequency systems with frequency multipliers obtain good amplification. and mixers. If the noise requirements of the system are not too high (for example, NF > 2 is The proposed balun circuit stands out from other solutions in that it makes it possible enough), a balun can be used as the first element of the radio path (after the antenna) and to obtain very good parameters in a simple way. Its main advantage is that it makes it act as a low-noise amplifier. The key parameters that characterize the balun circuit are: the easy to get a phase difference of 180 degrees between the output signals and the same voltage gain/insertion loss, the amplitude and phase balance between balun outputs, the amplitude for the output signals with the use of a properly connected coil with a tap. The noise figure and the size of the device. second advantage of the circuit is the ease of obtaining impedance matching and noise There are many active and passive circuits that have been designed to change an matching at its input—as in a classic low-noise amplifier circuit. This matching is obtained unbalanced signal into a differential one [21,22]. There are simple circuits, such as a single- by properly tuning the LC matching circuit. Staying on the subject of LNAs, the circuit transistor (Figure2a) [ 24] or differential circuits (Figure2b) [ 5,20], and more complex ones, makessuch asit common-gate–common-sourcepossible to achieve a very low noise baluns figure, (Figure even2c) below [1–4,6 ,NF13, 16< 2,17 dB,,19 of,21 course–23]. with the optimizationThe first solution of the presentednoise matching in Figure and2 aa isppropriate based on polarization. a single MOS This transistor. circuit Using also has the severalsignal phasedrawbacks. relationship One of between them is the transistorneed to use gate, three drain coils, and which source, is associated it can be seen with that a largein an occupied ideal case area. the The alternating advantage voltage of the at prop the drainosed balun is phase-shifted is that it is bynarrowband, 180◦ with respectwhich makesto the inputit possible voltage to at selectively the gate. The amplify alternating the desired voltage frequencies at the source while is in phasefiltering with out the interferenceinput voltage signals. at the However, gate. In practice, this circuit two is types not suitable of imperfections for broadband limit thesolutions. use of In this other type researchof circuit. work, The it first was is possible the different to obtain signal a 3 amplifications dB gain bandwidth between with the a width transistor of 150 gate MHz and andtransistor maximum source, gain and of the 25 transistordB. The gatecircuit and can transistor find applications drain. In order in all to kinds compensate of radio for frequencydifferent signaltransceiver amplifications, systems with the appropriate narrow, selective transistor bands, dimensions and there have is toprobably be selected no betterand suitable solution biasing in these circuits kinds of have applications. to be designed. The second problem is the fact that the parasitic gate-source capacitance CGS and gate-drain capacitance CGD have different values. 2.Different Design Considerations capacitances result in an incorrect phase difference (different from 180◦) between 2.1.the Balun output signals. It should be emphasized that the phase error resulting from different A balun is a circuit for which the main function is to convert an unbalanced signal to a balanced signal. This circuit can provide signal amplification—an active circuit that draws current—or may introduce gain losses—a passive circuit that does not consume current. The balun circuit is very often used in radio frequency systems with frequency multipliers and mixers. If the noise requirements of the system are not too high (for example, NF > 2 is enough), a balun can be used as the first element of the radio path (after

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the antenna) and act as a low-noise amplifier. The key parameters that characterize the balun circuit are: the voltage gain/insertion loss, the amplitude and phase balance between balun outputs, the noise figure and the size of the device. There are many active and passive circuits that have been designed to change an unbalanced signal into a differential one [21,22]. There are simple circuits, such as a single- transistor (Figure 2a) [24] or differential circuits (Figure 2b) [5,20], and more complex ones, such as common-gate–common-source baluns (Figure 2c) [1–4,6,13,16,17,19,21–23]. The first solution presented in Figure 2a is based on a single MOS transistor. Using the signal phase relationship between the transistor gate, drain and source, it can be seen that in an ideal case the alternating voltage at the drain is phase-shifted by 180° with respect to the input voltage at the gate. The alternating voltage at the source is in phase with the input voltage at the gate. In practice, two types of imperfections limit the use of this type of circuit. The first is the different signal amplifications between the transistor gate and transistor source, and the transistor gate and transistor drain. In order to compensate for different signal amplifications, the appropriate transistor dimensions have to be selected and suitable biasing circuits have to be designed. The second problem Electronics 2021, 10, 1351 4 of 20 is the fact that the parasitic gate-source capacitance CGS and gate-drain capacitance CGD have different values. Different capacitances result in an incorrect phase difference (different from 180°) between the output signals. It should be emphasized that the phase errorparasitic resulting capacitances from dependsdifferent on parasitic the frequency. capacitances Preliminary depends simulations on ofthe the frequency. considered Preliminarycircuit indicated simulations a high noiseof the ﬁgure.considered circuit indicated a high noise figure.

FigureFigure 2. 2. SchematicSchematic diagrams diagrams of of active active baluns: baluns: (a ()a single) single MOS MOS transistor transistor balun; balun; (b (b) differential) differential balun; balun; (c) common-gate–common-source (CG-CS) balun. (c) common-gate–common-source (CG-CS) balun.

TheThe next next considered considered solution solution is is shown shown in in Figure Figure 22b.b. It It is based on the classicalclassical differentialdifferential amplifier. amplifier. Transistors Transistors M1 M1 and and M2 M2 are are identical. identical. An An input input signal signal is is fed fed to to the the gategate of of M1 M1 and and the the gate gate of of M2 M2 is is connected connected to to ground. ground. In In the the ideal ideal case, case, the the alternating alternating ◦ voltagevoltage at at output output vout1 vout1 is shiftedis shifted by by180° 180 withwith respect respect to the to thevoltage voltage at the at M1 the gate, M1 gate, and andthe voltagethe voltage at output at output vout2 is vout2 in phaseis in phase with withthe voltage the voltage at the at M1 the gate. M1 gate.The advantage The advantage of this of implementationthis implementation over overthe previous the previous one oneis the is theability ability to toeasily easily adjust adjust the the gains gains at at both both outputs.outputs. Preliminary Preliminary simulations simulations of of this this circuit circuit indicated indicated a a high high noise noise figure. figure. The main disadvantage of the first two circuits is the high noise figure; additionally, in the case of the first circuit, it is difficult to get the same gain at each output. Therefore, it is a good idea to use a CG-CS stage (Figure2c) [ 22]. This circuit consists of two amplification stages, an amplifier in the common-gate (CG) configuration and an amplifier in the common-source (CS) configuration. Both amplifying stages work in a cascode configuration, which makes it possible to achieve a high voltage gain through the RCS and RCG resistors. The role of the CG stage is to provide wideband input impedance matching and gain, while the CS stage provides the antiphase output signal. The noise level generated by the CG stage after obtaining input matching (gm = 1/RS) is of key importance for the entire circuit. With a properly designed CS stage, the noise of the CG stage can be reduced. The current noise of the M1 transistor generates voltage noise at the source resistance, the RCG resistor, and the amplitude of the latter is much higher and its phase is opposite to the input phase. The input noise voltage is amplified by the CS stage. The amplified noise is in phase with the voltage noise at the output of the CG amplification stage. Since the amplification of both stages is the same, this eliminates completely the noise at the differential output of the system. In order to achieve a low noise figure, the impedance of CS should be scaled down n times with respect to the impedance of CG. This circuit can simultaneously achieve noise cancelling, distortion cancelling and output balancing, as discussed in detail in [22]. Electronics 2021, 10, 1351 5 of 20

However, there are problems with process corners, as well as voltage supply and temperature variation (PVT). As the circuit is not symmetric, each output signal is generated in a different way and the output phase difference can change by ±15◦ with PVT corners. The gain difference between the outputs is also strongly dependent on PVT corners.

2.2. Mixer The mixer was implemented as a double-balanced active system (consuming current). An active circuit was selected to provide additional amplification of the signal in the receiver path. With the use of an active mixer, the noise figures of the next receiver stages have a smaller effect on the overall noise figure (this follows from the Friis formula— Equation (8)). A double-balanced circuit was chosen because it suppresses even and odd harmonic signals of the LO and RF input signals and provides good isolation between the mixer inputs and outputs. The double-balanced Gilbert mixer circuit, often used in RF systems, was used in the implementation of the mixer. This circuit meets all the requirements mentioned above. Due to the use of a double-balanced circuit that requires an RF differential signal at the input, a balun circuit was present in the receiving path before the mixer.

3. Circuit Design 3.1. Balun Figure3 shows a new design for an active balun based on the classical CS degenerated cascode LNA. The main idea is to use a center-tapped inductor LD1 to generate two signals ◦ Electronics 2021, 10, x FOR PEER REVIEWequal in amplitude and shifted in phase by 180 (differential signal). The layout6 ofof the21

inductor LD1 (shown in Figure4) is symmetrical with respect to the center line bisecting the center terminal (CT).

Figure 3. Schematic diagram of the proposed active balun and ESD protection. Figure 3. Schematic diagram of the proposed active balun and ESD protection.

Figure 4. Layout of the symmetrical inductor LD1.

The inductor LD1 with capacitor CD1 and capacitor tank CTR creates a resonance tank (acting as a bandpass filter). Moreover, it introduces the so-called shunt-peaking technique (using the resistance of the inductor as a serial resistor). This technique facilitates the optimization of the balun’s gain, bandwidth and center frequency without significantly increasing the power consumption. Additionally, the proposed solution has a digitally controlled capacitor bank CTR (Figure 5). The switchable capacitor bank is designed to enable the post-production

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Figure 3. Schematic diagram of the proposed active balun and ESD protection.

Figure 4. Layout of the symmetrical inductor L . Figure 4. Layout of the symmetrical inductor LD1D1.

The inductor LD1 with capacitor CD1 and capacitor tank CTR creates a resonance tank The inductor LD1 with capacitor CD1 and capacitor tank CTR creates a resonance tank (acting as a bandpass filter). Moreover, it introduces the so-called shunt-peaking technique (acting as a bandpass filter). Moreover, it introduces the so-called shunt-peaking (using the resistance of the inductor as a serial resistor). This technique facilitates the technique (using the resistance of the inductor as a serial resistor). This technique optimization of the balun’s gain, bandwidth and center frequency without significantly Electronics 2021, 10, x FOR PEER REVIEWfacilitates the optimization of the balun’s gain, bandwidth and center frequency without7 of 21 increasing the power consumption. significantly increasing the power consumption. Additionally, the proposed solution has a digitally controlled capacitor bank CTR Additionally, the proposed solution has a digitally controlled capacitor bank CTR (Figure5). The switchable capacitor bank is designed to enable the post-production (Figure 5). The switchable capacitor bank is designed to enable the post-production calibrationcalibration ofof thethe balun.balun. CalibrationCalibration ofof thethe systemsystem parametersparameters isis neededneeded because,because, underunder thethe influenceinfluence ofof thethe technologicaltechnological processprocess variation,variation, thethe parametersparameters ofof activeactive andand passivepassive devicesdevices undergoundergo unwantedunwanted changeschanges andand withoutwithout calibrationcalibration thethe designeddesigned circuitscircuits maymay

havehave incorrectincorrect parametersparameters (e.g.,(e.g., wrongwrong centercenter frequencyfrequency ofof thethe ampliﬁedamplified band). band).

Figure 5. Schematic diagram of balun capacitor bank CTR. Figure 5. Schematic diagram of balun capacitor bank CTR.

The bank of switched capacitors proposed in Figure 5 allows correction of the amplified band (center frequency of the band). The capacitor bank consists of sixteen sections connected in parallel. Each section consists of a transistor MSW acting as a switch and capacitors CSW1 and CSW2 connected in series with it. Turning on the transistor MSW connects the capacitance section to the resonant circuit of the balun, which results in lowering of the resonance frequency and shifting of the central frequency of the amplified band towards lower frequencies. The center frequency of the balun can be calibrated in the 240 MHz range (±120 MHz from 1575.42 MHz) with a 16 MHz step. The balun is matched to 50 Ω at the input because in the designed system it is possible to add (optionally) an external bandpass surface acoustic wave (SAW) filter between the LNA and the balun on a PCB. The input matching network of the balun consists of two inductors, LS and LG, and a capacitor CEX. The inductance LS controls the real part of the input impedance without adding noise. The LG coil determines a specific resonant frequency. The CEX capacitor facilitates simultaneous impedance and noise matching. Capacitor CB is used to cut off the DC component. The capacitance value of this capacitor should be large (a few pF) so that its impedance at the frequency of 1.575 GHz is as low as possible. The use of cascode makes it possible to achieve good isolation between the output and input and minimizes the capacitive Miller effect. Formulas for calculating the input impedance were introduced based on the equivalent small signal circuit model (Figure 6).

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The bank of switched capacitors proposed in Figure5 allows correction of the amplified band (center frequency of the band). The capacitor bank consists of sixteen sections connected in parallel. Each section consists of a transistor MSW acting as a switch and capacitors CSW1 and CSW2 connected in series with it. Turning on the transistor MSW connects the capacitance section to the resonant circuit of the balun, which results in lowering of the resonance frequency and shifting of the central frequency of the amplified band towards lower frequencies. The center frequency of the balun can be calibrated in the 240 MHz range (±120 MHz from 1575.42 MHz) with a 16 MHz step. The balun is matched to 50 Ω at the input because in the designed system it is possible to add (optionally) an external bandpass surface acoustic wave (SAW) filter between the LNA and the balun on a PCB. The input matching network of the balun consists of two inductors, LS and LG, and a capacitor CEX. The inductance LS controls the real part of the input impedance without adding noise. The LG coil determines a specific resonant frequency. The CEX capacitor facilitates simultaneous impedance and noise matching. Capacitor CB is used to cut off the DC component. The capacitance value of this capacitor should be large (a few pF) so that its impedance at the frequency of 1.575 GHz is as low as possible. The use of cascode makes it possible to achieve good isolation between the output and input and minimizes the capacitive Miller effect. Electronics 2021, 10, x FOR PEER REVIEW 8 of 21 Formulas for calculating the input impedance were introduced based on the equivalent small signal circuit model (Figure6).

FigureFigure 6. 6. SimplifiedSimpliﬁed equivalent equivalent small small signal signal circuit circuit for for balun. balun.

TheThe formulas formulas describing describing the the input input voltag voltagee and and output output current current are are given given below: below: 𝑣 𝑖 ∙ 𝑗𝜔𝐿 𝑗𝜔𝐿 𝑖 ∙ 1 𝑖 ∙ 𝑗𝜔𝐿, (1) v = i ·( jωL + jωL ) + i · + i ·jωL , (1) in in G s in j C + j C out s ω GS ω EX 𝑖 𝑔 ∙𝑣 𝑔 ∙𝑖 , (2) 1 iout = gm·vGS = gm·iin ∙, (2) 𝑣 𝑖 ∙ 𝑗𝜔𝐿 𝑗𝜔𝐿 jωCGS + jωCEX . (3) 1 gm·Ls The input impedancevin = iin·( jisω LexpressedG + jωLs by+ the following equation:+ ). (3) jωCGS + jωCEX CGS + CEX ∙ 𝑍 𝑗𝜔∙ 𝐿 𝐿 ∙ , (4) The input impedance is expressed by the following equation:

where LG and LS are inductances, CEX is additional capacitance for easier simultaneous vin 1 1 gm·Ls noise and impedanceZin = matching,= jω·( L GCGS+ isLs the) + cgs capacitance· of the M+B0 transistor ,and gm is the (4) iin jω CGS + CEX CGS + CEX transconductance of the MB0 transistor. whereTheL Gimaginaryand LS are part inductances, of the inputC impedanceEX is additional is given capacitance by Equation for (5). easier Then, simultaneous Equations (6)noise and and (7) impedancefor calculating matching, LG andC LGSS valuesis the c gsthatcapacitance ensure impedance of the MB0 matchingtransistor for and Imagegm is (Zthein) transconductance= 0 and Real(Zin) = of RS the = 50 M ΩB0 aretransistor. derived as follows: The imaginary part of the input impedance is given1 by Equation1 (5). Then, Equations (6) and (7) for calculating𝐼𝑚 LG𝑍and L𝜔S values ∙ 𝐿 that𝐿 ensure impedance ∙ matching 0, for Image (Zin)(5) = 0 𝜔 𝐶 𝐶 and Real (Zin) = RS = 50 Ω are derived as follows: 1 𝐿 𝐿 , (6) 𝜔 ∙𝐶 1𝐶 1 Im(Zin) = ω0·( LG +Ls ) + · = 0, (5) ω0 CGS + CEX 𝑔 ∙𝐿 𝐶 𝐶 𝑅𝑒𝑍 𝑅 → 𝐿 𝑅 ∙ . (7) 𝐶 𝐶 𝑔

3.2. Mixer In the implementation of the receiver, a quadrature mixer was used (Figure 7)—two double-balanced Gilbert mixers the LO inputs of which were fed differential signals—Ip and In, and Qp and Qn—shifted in phase by 90°. Quadrature mixing allows for the complex demodulation of signals as represented by two orthogonal signals, IFI (IFIp, IFIn) and IFQ (IFQp, IFQn). Therefore the information from one sideband is not lost. In this study, only one mixer (in-phase) was examined with an active balun.

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1 = − LG 2 LS, (6) ω0 ·(CGS + CEX)

gm·Ls CGS + CEX Re(Zin) = = RS → LS = RS· . (7) CGS + CEX gm

3.2. Mixer In the implementation of the receiver, a quadrature mixer was used (Figure7)—two double-balanced Gilbert mixers the LO inputs of which were fed differential signals—Ip and In, and Qp and Qn—shifted in phase by 90◦. Quadrature mixing allows for the complex demodulation of signals as represented by two orthogonal signals, IF (IF , IF ) and IF Electronics 2021, 10, x FOR PEER REVIEW I Ip In 9 of 21Q (IFQp, IFQn). Therefore the information from one sideband is not lost. In this study, only one mixer (in-phase) was examined with an active balun.

FigureFigure 7. 7. SchematicSchematic diagrams diagrams of of double-balanced double-balanced quadrature quadrature Gilbert Gilbert mixer. mixer. 4. Results 4. Results Figure8 shows the ﬁnal version of the designed balun and mixer circuits presented Figure 8 shows the final version of the designed balun and mixer circuits presented and analyzed in this article. The following elements and their parasites were included in and analyzed in this article. The following elements and their parasites were included in the balun simulation: bonding pad, ESD protection diodes and bond-wire connections the balun simulation: bonding pad, ESD protection diodes and bond-wire connections between the IC and package. Taking all these elements into account made it possible to betweenobtain good the IC agreement and package. between Taking the all measurements these elements and into simulations account made of the it possible impedance to obtainmatching good of theagreement input (S11 between parameter) the measur and theements noise matching and simulations of the input of (thethe impedance value of the matchingnoise ﬁgure of the depends input on(S11 the parameter) input noise and matching). the noise The matching section of focused the input on the (the simulation value of thepresents noise detailedfigure depends results of on the the balun input and nois mixere matching). post-layout The simulations. section focused The results on the are simulationpresented separatelypresents detailed for each results circuit, of as the well balun as for and both mixer circuits post-lay workingout simulations. together. The resultsIn are the designedpresented system, separately the signal for each behind circuit, the balun as well was as not for led both outside circuits the integratedworking together.circuit for measurement purposes. Therefore, the measurements section presents the resultsIn the obtained designed from system, both circuits the signal together behind after the balun down-conversion. was not led outside The signal the integrated input was circuitthe balun for inputmeasurement and the outputpurposes. was theTherefore, differential the outputmeasurements of the mixer. section In thepresents balun andthe resultsmixer measurements,obtained from both at the circuits output together of the mixer, after down-conversion. a measurement buffer The (insignal the input integrated was thecircuit) balun with input a gain and ofthe 1 wasoutput connected. was the Thedifferential buffer was output added of the in ordermixer. to In drive the balun the output and mixercapacitance. measurements, The output at the of theoutput measurement of the mixer, buffer a measurement was connected buffer to the (in bonding the integrated pad to circuit)package. with The a signalgain of from 1 was the connected. mixer outputs The entersbuffer thewas circuit added (on in aorder PCB), to which drive converts the output the capacitance.differential signalThe output into an of unbalancedthe measurement one for buffer measurement was connected purposes. to the The bonding measurement pad to package.buffer does The notsignal introduce from the any mixer changes outputs to theenters simulation the circuit results; (on a PCB), therefore, which during converts the thesimulation, differential the mixersignal was into loaded an withunbala a resistancenced one of for 50 kΩmeasurementand capacitance purposes. of 100 fF.The measurementThe output buffer of the does balun not circuit introduce was any not accessiblechanges to for the measurement simulation results; purposes therefore, because duringthis would the simulation, have required the themixer design was of loaded a special with output a resistance buffer withof 50 an kΩ output and capacitance impedance ofof 100 50 ΩfF.. Adding a measurement output at this point would have changed the operating conditions of the balun and mixer and degrade the parameters of both circuits.

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Figure 8. SchematicFigure 8. Schematic diagram of diagram the proposed of the activeproposed balun active and ba double-balancedlun and double-balanced quadrature quadrature Gilbert mixer Gilbert simpliﬁed to show the in-phasemixer simplified part. to show the in-phase part.

The output of theThe balun LO signalcircuit applied was not toaccessible the mixer for input measurement can be provided purposes by because an external generator this would haveor required an internal the design digitally of controlleda special output oscillator buffer (DCO). with an In output measurements, impedance the LO signal is of 50 Ω. Addinggenerated a measurement internally output by the atDCO. this point would have changed the operating conditions of the balun and mixer and degrade the parameters of both circuits. The LO signal4.1. Simulationapplied to Environment the mixer input can be provided by an external generator or an internal digitallyThe circuitcontrolled was designedoscillator with (DCO). the useIn measuremen of Cadence software.ts, the LO The signal diagram is was designed generated internallywith the by Schematicthe DCO. Editor L tool, the layout was designed with the Layout Suite XL tool and the simulations were performed with the ADE Explorer tool using the Spectre simulator. 4.1. Simulation EnvironmentExtraction of parasitic elements was performed with a Quantus extractor with a field solver The circuitfor was greater designed accuracy. with the use of Cadence software. The diagram was designed with the SchematicThe testbench Editor of L the tool, circuit the shownlayout inwas Figure designed8 consists with of the a 50 LayoutΩ signal Suite source connected XL tool and theto simulations the model we ofre the performed connection with between the ADE the Explorer package tool and using bonding the Spectre pad in the integrated simulator. Extractioncircuit of (IC). parasitic The bonding elements pad was was performed directly with connected a Quantus to the extractor input of with the balun. At the a field solver foroutput greater of accuracy. the simplified testbench, the mixer was loaded with a capacitor of 100 fF and a The testbenchresistor of ofthe 50 circuit kΩ. The shown balun in and Figure mixer 8 circuit consists loaded of a with 50 theΩ signal measurements source buffer (in the connected to theIC) model were alsoof the tested. connection Due to thebetween fact that the the package connected and measurementbonding pad bufferin the did not change the parameters of the tested balun and mixer, it was decided to simulate the tested circuit integrated circuit (IC). The bonding pad was directly connected to the input of the balun. with a simplified load (the simulations lasted for a shorter time). At the output of the simplified testbench, the mixer was loaded with a capacitor of 100 fF The voltage supply of the system was 1.5 V and it was fed from a low dropout and a resistor of 50 kΩ. The balun and mixer circuit loaded with the measurements buffer regulator (LDO) or an ideal voltage source. The reference current for both designed blocks (in the IC) were also tested. Due to the fact that the connected measurement buffer did not was 4 µA and was supplied from a temperature-stable, voltage supply-stable and process change the parameters of the tested balun and mixer, it was decided to simulate the tested corner-stable current mirror. Both designed circuits had local current mirrors to generate circuit with a simplified load (the simulations lasted for a shorter time). required polarizing currents and voltages. The voltage supply of the system was 1.5 V and it was fed from a low dropout The circuits were simulated in the temperature range of −40 ◦C to 85 ◦C for various regulator (LDO) or an ideal voltage source. The reference current for both designed blocks corner cases of the technological process with a voltage supply fluctuation of ±10%. was 4 µA and was supplied from a temperature-stable, voltage supply-stable and process corner-stable current4.2. Simulation mirror. Both Results designed circuits had local current mirrors to generate required polarizing currents and voltages. Figures9–12 show the main balun characteristics. The parameters of the balun at The circuits1.57542 were simulated GHz were: in voltage the temperature gain (GV) range = 19.16 of dB, −40 S11 °C =to− 8531.13 °C for dB, various NF = 3.23 dB, current corner cases of the technological process with a voltage supply fluctuation◦ of ±10%. consumption (IDD) = 1.5 mA, output phase difference = 182 and gain difference = 0.7 dB. The main advantage of the proposed circuit using a center-tapped inductor was that the 4.2. Simulation Resultsphase shift between the outputs was equal to 180◦ with an accuracy of ±5◦ and the gain Figures 9–12difference show the between main balun balun characteristics. outputs did not The differ parameters by more of than the 1.5balun dB. at This phase shift 1.57542 GHz were:(Figure voltage 12) and gain gain (GV) difference = 19.16 dB, between S11 = the−31.13 outputs dB, NF was = also3.23 well-preserveddB, current for all PVT

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Electronics 2021, 10, 1351 10 of 20 consumption (IDD) = 1.5 mA, output phase difference = 182° and gain difference = 0.7 dB. consumptionThe main advantage (IDD) = 1.5 of mA, the proposedoutput phase circuit difference using a =center-tapped 182° and gain inductor difference was = 0.7that dB. the Thephase main shift advantage between of the the outputs proposed was circuit equal usingto 180° a center-tappedwith an accuracy inductor of ±5° was and that the thegain ◦ ◦ phasedifferencecorners shift between (processbetween corners: thebalun outputs fast,outputs typical, was did equal slow; not to temperature:diff 180°er bywith more an from accuracythan−40 1.5C toofdB. 105±5° This C;and voltagephase the gain shift ± difference(Figuresupply: 12) between and10%). gain balun The difference characteristics outputs between did in not Figures the diff outputser9– 11by show more was the alsothan results well-preserved 1.5 ofdB. the This post-layout phase for all shift PVT simulation in a typical process corner: 27 ◦C and nominal voltage supply 1.5 V. (Figurecorners 12) (process and gain corners: difference fast, betweentypical, slow; the outputs temperature: was also from well-preserved −40 °C to 105 for °C; all voltage PVT Figure 13 shows the voltage gain characteristics for various settings (N) of the switched cornerssupply: (process ±10%). corners:The characteristics fast, typical, in slow; Figure temperature:s 9–11 show from the −results40 °C toof 105 the °C; post-layout voltage capacitor bank CTR. For the nominal case of the technological process corner, six sections supply:simulationof the ±10%). capacitor in aThe typical bank characteristics (processN = 6) were corner: connected.in Figure 27 °C sand With 9–11 nominal this show setting, thevoltage the results center supply of frequency the 1.5 post-layoutV. of the simulationband is in 1.575 a typical GHz. Theprocess center corner: frequency 27 °C of and the balun nominal could voltage be calibrated supply in 1.5 the V.240 MHz range with a 16 MHz step, as shown in Figure 13.

Figure 9. Differential voltage gain and gain at each output of the balun. FigureFigure 9. Differential 9. Differential voltage voltage gain gain and and gain gain at at each each output output ofof thethe balun. balun.

FigureFigure 10. 10.InputInput impedance impedance matching matching (S11) (S11) ofof thethe balun. balun. Figure 10. Input impedance matching (S11) of the balun.

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Figure 11. Noise figure of the balun. FigureFigure 11. Noise 11. Noise figure ﬁgure of the of the balun. balun.

Figure 12. Phase shift between “outp” and “outn” outputs in a typical case (TT) and two PVT corner FigureFigure 12. Phase 12. Phase shift between shift between “outp” “outp” and and“outn” “outn” outputs outputs in a intypical a typical case case (TT) (TT) and and two two PVT PVT corner cases. SS case: slow process corner (slow transistors, high capacitances, high resistances), cases.corner SS case: cases. slow SS case: process slow processcorner corner (slow (slow tran transistors,sistors, high high capacitances, capacitances, highhigh resistances), resistances), temperature: 105 °C,◦ VDD = 1.35 V. FF case: fast process corner (fast transistors, low capacitances, temperature:temperature: 105 105°C, VDDC, VDD = 1.35 = 1.35 V. V.FF FF case: case: fast fast proc processess corner (fast(fast transistors, transistors, low low capacitances, capacitances, low resistances), temperature: −40 °C,◦ VDD = 1.65 V. TT case: typical process corner, temperature: low resistances),low resistances), temperature: temperature: −40− 40°C, C,VDD VDD = =1.65 1.65 V. V. TT TT case: typicaltypical process process corner, corner, temperature: temperature: 27 °C, VDD◦ = 1.5 V. 27 °C,27 VDDC, VDD = 1.5 = V. 1.5 V. Figure 13 shows the voltage gain characteristics for various settings (N) of the Figure 13 shows the voltage gain characteristics for various settings (N) of the switched capacitor bank CTR. For the nominal case of the technological process corner, six switched capacitor bank CTR. For the nominal case of the technological process corner, six sections of the capacitor bank (N = 6) were connected. With this setting, the center sections of the capacitor bank (N = 6) were connected. With this setting, the center frequency of the band is was.575 GHz. The center frequency of the balun could be frequency of the band is was.575 GHz. The center frequency of the balun could be calibrated in the 240 MHz range with a 16 MHz step, as shown in Figure 13. calibrated in the 240 MHz range with a 16 MHz step, as shown in Figure 13.

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Figure 13. Differential voltage gain for different configurations of the switched capacitor bank CTR

(N = 0—no capacitor connected, N = 15 all capacitors connected). Figure 13. Differential voltage gain for different configurations of the switched capacitor bank CTR Figure 13. Differential voltage gain for different configurations of the switched capacitor bank CTR (N =( 0—noNFigure= 0—no capacitor 14 capacitorshows connected, the connected, application N = 15N =all 15 capacitorsand all capacitors oper connected).ation connected). of the calibration system. The TT characteristics show a balun voltage gain for the nominal case of the technological process and theFigure nominalFigure 14 shows14 configuration shows the theapplication application of the switchedand and oper operation ationcapacitor of the of bank thecalibration calibration(N = 6). system.The system. SS andThe TheFFTT TT characteristicscharacteristicscharacteristics show show aa balunsituation a balun voltage voltagewhere gain gainthe for parametersthe for nominal the nominal of case the case of circuit the of technological the (voltage technological gain) process processare underandand the the thenominal influence nominal configuration of configuration the technological of the of theswitched proc switchedess variationcapacitor capacitor (atbank the bank ( Nnominal (=N 6).= The 6). configuration TheSS and SS and FF FF ofcharacteristics thecharacteristics switched showcapacitor show a situation a bank). situation SS where means where the thethe parameters parameterscorner case ofofwhere thethe circuit circuitthe technological (voltage (voltage gain) gain) process are are under the influence of the technological process variation (at the nominal configuration of the isunder slow: the slow influence transistors, of the high technological capacitances proc andess high variation resistances. (at the FF nominalmeans the configuration corner case switched capacitor bank). SS means the corner case where the technological process is slow: whereof the switchedthe technological capacitor bank).process SS meansis fast: the fast corner transistors, case where low the capacitances technological and process low slow transistors, high capacitances and high resistances. FF means the corner case where resistances.is slow: slow transistors, high capacitances and high resistances. FF means the corner case wherethe technologicalthe technological process process is fast: is fast fast: transistors, fast transistors, low capacitances low capacitances and low resistances. and low resistances.

Figure 14. Voltage gain for different process corners with calibration (FF_cal, N = 12; SS_cal, N = 3) Figure 14. Voltage gain for different process corners with calibration (FF_cal, N = 12; SS_cal, N = 3) and withoutand without calibration calibration (TT, FF, (TT, SS) FF, with SS) nominal with nominal configuration conﬁguration of the switched of the switched capacitor capacitor bank (N bank =Figure 6). SS case:14. Voltage slow process gain for corner different (slow process transistors, corners high with capacitances, calibration high (FF_cal, resistances); N = 12; SS_cal, FF case: N fast= 3) (N = 6). SS case: slow process corner (slow transistors, high capacitances, high resistances); FF case: processand without corner calibration (fast transistors, (TT, FF, low SS) capacitanceswith nominal, low configuration resistances); of TTthe case: switched typical capacitor process bank corner. (N fast process corner (fast transistors, low capacitances, low resistances); TT case: typical process corner. All= 6). simulations SS case: slow had process a nominal corner temperature (slow transistors, of 27 °C high and capacitances, nominal VDD high = 1.5 resistances); V. FF case: fast ◦ processAll simulationscorner (fast hadtransistors, a nominal low temperature capacitances of, low 27 Cresistances); and nominal TT VDD case: = typical 1.5 V. process corner. All simulations had a nominal temperature of 27 °C and nominal VDD = 1.5 V. As canAs canbe seen be seen in Figure in Figure 14, the14, thecharacte characteristicsristics corresponding corresponding to the to slow the slow and andfast fast process corners were significantly shifted in frequency. The FF characteristics were shifted processAs can cornersbe seen were in Figure signiﬁcantly 14, the shiftedcharacte inristics frequency. corresponding The FF characteristics to the slow wereand fast shifted by 75by MHz 75 MHz towards towards higher higher frequencies, frequencies, and andthe theSS characteristics SS characteristics were were shifted shifted toward toward lowerprocess frequencies corners were by significan75 MHz. Totly shiftedcompensate in frequency. for this Theshift, FF the characteristics circuit can be were calibrated shifted by 75lower MHz frequencies towards higher by 75 MHz.frequencies, To compensate and the SS for characteristics this shift, the were circuit shifted can be toward calibrated lowerusing frequencies the switched by 75 capacitor MHz. To bank compensate (FF_cal and for SS_cal this shift, characteristics the circuitin can Figure be calibrated 14). In order to calibrate the circuit for the FF corner case, an additional six sections of the capacitor bank

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Electronics 2021, 10, 1351 using the switched capacitor bank (FF_cal and SS_cal characteristics in Figure 14). In order13 of 20 using the switched capacitor bank (FF_cal and SS_cal characteristics in Figure 14). In order to calibrate the circuit for the FF corner case, an additional six sections of the capacitor to calibrate the circuit for the FF corner case, an additional six sections of the capacitor bank (N = 12) were connected, which resulted in the FF_cal characteristic. In the SS corner bank (N = 12) were connected, which resulted in the FF_cal characteristic. In the SS corner case, four capacitor bank sections (N = 3) were disconnected, which led to the calibrated case,(N four= 12) capacitor were connected, bank sections which (N resulted = 3) were in thedisconnected, FF_cal characteristic. which led Into thethe SScalibrated corner case, SS_cal characteristics of the balun voltage gain. SS_calfour characteristics capacitor bank of sectionsthe balun (N voltage= 3) were gain. disconnected, which led to the calibrated SS_cal Figure 15 shows the conversion gain and Figure 16 shows the double sideband (dsb) characteristicsFigure 15 shows of thethe balunconversion voltage gain gain. and Figure 16 shows the double sideband (dsb) noise figure characteristics of the mixer. Both parameters met the requirements. As we can noise figureFigure characteristics 15 shows the of conversionthe mixer. Both gain parameters and Figure met16 shows the requirements. the double sideband As we can (dsb) see, the conversion gain in the bandwidth of 30 MHz (from 0 to 30 MHz) dropped by see, noisethe conversion ﬁgure characteristics gain in the of bandwidth the mixer. Bothof 30 parameters MHz (from met 0 to the 30 requirements. MHz) dropped As weby can about 0.2 dB. The noise figure was around 22.5 dB. aboutsee, 0.2 the dB. conversion The noise gain figure in thewas bandwidth around 22.5 of dB. 30 MHz (from 0 to 30 MHz) dropped by about 0.2 dB. The noise ﬁgure was around 22.5 dB.

Figure 15. Voltage conversion gain of the mixer. FigureFigure 15. Voltage 15. Voltage conversion conversion gain gain of the of mixer. the mixer.

FigureFigure 16. 16.DsbDsb noise noise figure figure of the of the mixer. mixer. Figure 16. Dsb noise figure of the mixer. Figure 17 shows the total conversion gain and Figure 18 shows the dsb noise figure of the balun and mixer. As we can see, the conversion gain in the bandwidth of 30 MHz dropped by about 0.5 dB. A slightly greater decrease in conversion gain in the bandwidth (compared to mixer) resulted from the summation of the balun gain curve and mixer conversion gain curve. The conversion gain decrease in the band was due to the shape of the balun gain curve, which decreased in the band (1.575 GHz ± 30 MHz) by 0.3 dB. The maximum noise figure in the band was NF = 6.4 dB with the omission of 1/f noise which was stronger at low frequencies (<1 MHz)—later, this noise will be filtered out in the receiving path.

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Figure 17. Voltage conversion of the balun and mixer.

Figure 17 shows the total conversion gain and Figure 18 shows the dsb noise figure of the balun and mixer. As we can see, the conversion gain in the bandwidth of 30 MHz dropped by about 0.5 dB. A slightly greater decrease in conversion gain in the bandwidth (compared to mixer) resulted from the summation of the balun gain curve and mixer conversion gain curve. The conversion gain decrease in the band was due to the shape of the balun gain curve, which decreased in the band (1.575 GHz ± 30 MHz) by 0.3 dB. The maximum noise figure in the band was NF = 6.4 dB with the omission of 1/f noise which was stronger at low frequencies (<1 MHz)—later, this noise will be filtered out in the receiving path. FigureFigure 17. 17.VoltageVoltage conversion conversion of the of the balun balun and and mixer. mixer.

FigureFigure 18. Dsb 18. noiseDsb noise figure ﬁgure of the of balun the balun and mixer. and mixer.

4.3. Measurements4.3. Measurements The Theenvironment environment for measuring for measuring the balun the balun and andmixer mixer parameters parameters is presented is presented below below in Figuresin Figures 19 and 19 and20. It20 consisted. It consisted of an of HP an HPE3631A E3631A laboratory laboratory power power supply supply providing providing supplysupply voltage voltage to the to thein-chip in-chip reference reference current current source source for for the the balun balun and and mixer circuits.circuits. The ﬁrst of the measurement systems shown in Figure 19 was used to measure the noise ﬁgure and conversion gain. The second measurement system shown in Figure 20 was used to measure the input impedance matching (S11 parameter).

Figure 18.Figures Dsb noise 21– figure23 below of the compare balun and the mixer. experimental and simulation results. Figure 21 shows a comparison of the simulated and measured noise figure. The noise figure obtained 4.3.as Measurements a result of the measurement had a greater value than that obtained in the simulation. This may have been due to, e.g., the decrease in the balun gain (Figure 22), which very The environment for measuring the balun and mixer parameters is presented below much determines the total noise figure. in Figures 19 and 20. It consisted of an HP E3631A laboratory power supply providing supply voltage to the in-chip reference current source for the balun and mixer circuits.

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The first of the measurement systems shown in Figure 19 was used to measure the noise figure and conversion gain.

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Electronics 2021, 10, 1351 15 of 20 TheThe first first of of the the measurement measurement systems systems shown shown in in Figure Figure 19 19 was was used used to to measure measure the the noise noise figurefigure and and conversion conversion gain. gain.

Figure 19. Environment for measuring the voltage conversion gain and noise figure of the balun and mixer.

Figure 19. Environment for measuring the voltage conversion gain and noise ﬁgure of the balun FigureFigure 19. 19. Environment Environment for for measuring measuring the the voltage voltage conver conversionsion gain gain and and noise noise figure figure of of the the balun balun andandand mixer. mixer. mixer.

Figure 20. Environment for measuring the input impedance matching (S11) of the balun.

The second measurement system shown in Figure 20 was used to measure the input impedance matching (S11 parameter). Figures 21–23 below compare the experimental and simulation results. Figure 21 shows a comparison of the simulated and measured noise figure. The noise figure obtained as a result of the measurement had a greater value than that obtained in the simulation. This may have been due to, e.g., the decrease in the balun gain (Figure 22), whichFigure very 20. much Environment determines for measuring the total thenoise input figure. impe dance matching (S11) of the balun. FigureFigure 20. 20. EnvironmentEnvironment for for measuring measuring the the input input impe impedancedance matching matching (S11) (S11) of of the the balun. balun.

TheThe second second measurement measurement system system shown shown in in Figure Figure 20 20 was was used used to to measure measure the the input input impedanceimpedance matching matching (S11 (S11 parameter). parameter). FiguresFigures 21–2321–23 belowbelow comparecompare thethe experimentexperimentalal andand simulationsimulation results.results. FigureFigure 2121 showsshows aa comparisoncomparison ofof thethe simulatedsimulated andand measuredmeasured noisenoise figure.figure. TheThe noisenoise figurefigure obtainedobtained asas aa resultresult ofof thethe measurementmeasurement hadhad aa greatergreater valuevalue thanthan thatthat obtainedobtained inin thethe simulation.simulation. This This may may have have been been due due to, to, e.g., e.g., the the decrease decrease in in the the balun balun gain gain (Figure (Figure 22), 22), whichwhich very very much much determines determines the the total total noise noise figure. figure.

Figure 21. Comparison of measured and simulated noise ﬁgure—balun and mixer.

The gain conversion characteristics obtained as a result of the post-layout simulations and measurements are compared in Figure 22. The measured conversion gain decreased by approximately 0.7 dB (near 0 Hz). In addition to the decrease in gain, the nature of the gain curve changed—it descended faster. The simulated conversion gain at the 30 MHz was 28 dB, while the measured one was 25.8 dB. The change in the conversion gain curve could have been caused by the output circuits used for the measurement and/or a small band shift of the balun resulting from the dispersion of the parameters of the technological process. One of the output measurement circuits was a buffer (in the integrated circuit) designed to drive a large capacitance and the second one (on a PCB) was intended to

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convert the symmetrical signal into an unbalanced one. These two circuits at the balun and mixer outputs were designed only for measurement purposes. When investigating what the cause of the difference between the measurement and the simulation of conversion gain was, the influence of the technological process dispersion on the gain conversion characteristics was verified by means of simulations. Figure 23 shows the characteristics of the gain conversion resulting from the measurement (same Electronics 2021, 10, x FOR PEER REVIEW as Figure 22) and simulation for the typical case (same as Figure 22) and the corner cases17 of 21 SS and FF. As can be seen, the measurement result was within the limits of the possible Electronics 2021, 10, x FOR PEER REVIEW 17 of 21 dispersion of the technological process. By analyzing the measured characteristic of the gain conversion, it can be concluded that the center frequency of the balun amplification Figureband 21. shiftedComparison towards of measured the lower and frequencies—which simulated noise figure—balun may indicate and that mixer. in the production Figureprocess 21. Comparison we came of closer measured to the and SS simula case, whereted noise larger figure—balun capacitances and aremixer. modeled during the simulation.

Figure 22. Comparison of measured and simulated voltage conversion gain—balun and mixer. FigureFigure 22. Comparison 22. Comparison of measured of measured and and simulated simulated vo voltageltage conversion conversion gain—balun gain—balun andand mixer.mixer.

Figure 23. Comparison of the measured voltage conversion gain and the voltage conversion gain FigureFigure 23. Comparison 23. Comparison of the of themeasured measured voltage voltage conversi conversionon gain gain and and the the voltage conversionconversion gaingain simulatedsimulatedsimulated withwith with processprocess process corners—balun corners—balun corners—balun and and and mixer. mixer. mixer.

TheFigure gain conversion 24 compares characteristics the results of obtained the simulation as a result and of measurement the post-layout of thesimulations input impedanceThe gain conversion matching (S11characteristics parameter). obtained The measured as a result values of the of S11 post-layout agreed well simulations with the and measurements are compared in Figure 22. The measured conversion gain decreased and simulationmeasurements results. are compared in Figure 22. The measured conversion gain decreased byby approximatelyapproximately 0.7 0.7 dB dB (near (near 0 0 Hz). Hz). In In addition addition to to the the decrease decrease in in gain, gain, the the nature nature of of the the gaingain curvecurve changed—itchanged—it descendeddescended faster. faster. The The simulated simulated conversion conversion gain gain at at the the 30 30 MHz MHz waswas 2828 dB,dB, whilewhile thethe measured measured one one was was 25.8 25.8 dB. dB. The The change change in in the the conversion conversion gain gain curve curve couldcould havehave beenbeen causedcaused byby the the output output circui circuitsts used used for for the the measurement measurement and/or and/or a asmall small bandband shiftshift ofof the the balun balun resulting resulting from from the the dispersion dispersion of of the the parameters parameters of of the the technological technological process.process. OneOne ofof thethe outputoutput measurement measurement circui circuitsts was was a abuffer buffer (in (in the the integrated integrated circuit) circuit) designeddesigned toto drivedrive aa largelarge capacitancecapacitance and and th the esecond second one one (on (on a aPCB) PCB) was was intended intended to to convertconvert thethe symmetricalsymmetrical signalsignal into into an an unbala unbalancednced one. one. These These two two circuits circuits at at the the balun balun andand mixermixer outputsoutputs were were designed designed only only for for measurement measurement purposes. purposes. WhenWhen investigatinginvestigating what what the the cause cause of of th thee difference difference between between the the measurement measurement and and thethe simulationsimulation ofof conversionconversion gaingain was,was, thethe influenceinfluence ofof the the technological technological process process dispersiondispersion onon thethe gaingain conversionconversion characteri characteristicsstics was was verified verified by by means means of of simulations. simulations. FigureFigure 2323 showsshows the the characteristics characteristics of of the the gain gain conversion conversion resulting resulting from from the the measurement measurement

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(same as Figure 22) and simulation for the typical case (same as Figure 22) and the corner cases SS and FF. As can be seen, the measurement result was within the limits of the possible dispersion of the technological process. By analyzing the measured characteristic of the gain conversion, it can be concluded that the center frequency of the balun amplification band shifted towards the lower frequencies—which may indicate that in the production process we came closer to the SS case, where larger capacitances are modeled during the simulation. Figure 24 compares the results of the simulation and measurement of the input Electronics 2021, 10, 1351 impedance matching (S11 parameter). The measured values of S11 agreed well with17 of the 20 simulation results.

FigureFigure 24. Comparison 24. Comparison of measured of measured and simulated and simulated input input impedance impedance matching matching (S11)—balun (S11)—balun and mixer.and mixer.

As noAs studies no studies on onnarrowband narrowband baluns baluns and and mi mixerxer systems systems were were found found in the literature (one(one can canfind find many many papers papers on on broadband broadband solu solutions),tions), only only the the parameters parameters of of the designed balunbalun were were compared compared with with other other implementations implementations found found in in the the literature. literature. The balun gaingain waswas estimated estimated from from the the measur measurementement results results of of the the balun balun and and mixer mixer systems systems together, becausebecause the themeasurements measurements were were made made only only for for the the balun balun and and mixer mixer working working together. ItIt was assumed that the decrease in the balun gain (Figure 22) caused an increase in the total was assumed that the decrease in the balun gain (Figure 22) caused an increase in the total noise figure, as seen in Figure 21, which was consistent with the calculation using the Friis noise figure, as seen in Figure 21, which was consistent with the calculation using the Friis formula (Equation (8)). FN (noise factor) and Gn (gain) are given as linear factors (not in formuladecibels) (Equation of subsequent (8)). FN elements(noise factor) of the and receiving Gn (gain) path. are given as linear factors (not in decibels) of subsequent elements of the receiving path. F2 − 1 F3 − 1 FN − 1 F = F + 𝐹 1+ 𝐹 1+ ··· + 𝐹 1 . (8) 𝐹TOTAL 𝐹1 G G ·G ⋯ N−1 . (8) 1 1 2 ∏n=1 Gn 𝐺 𝐺 ∙𝐺 ∏ 𝐺 TheThe total total noise noise figure figure is the is the noise noise factor factor given given in in decibels: decibels:

𝑁𝐹NF||dB 10log𝐹= 10 log(FTOTAL.). (9)(9)

It wasIt was estimated estimated that that the the balun balun gain gain was was reduced reduced to to 18 18 dB dB and and the the mixer mixer noise figurefigure increasedincreased to 24 to 24dB, dB, which which would would give give a a noise noise figure figure increaseincrease to to about about 7.7 7.7 dB dB in in the the band band of of interestinterest (30 (30 MHz). MHz). TheThe parameters parameters of the of the balun balun are are summari summarizedzed and and compared compared with with other publishedpublished CMOSCMOS baluns baluns [3,4,22,23] [3,4,22,23 in] inTable Table 1.1 It. Itcan can be be seen seen that that the the proposed balunbalun achievedachieved the the lowestlowest power power dissipation dissipation and and had had the the best best impedance impedance input input matching matching compared compared toto otherother results.results. In this In this application, application, the the noise noise figure figure of of 3.23 3.23 dB dB was was sufficient sufficient because because the balun waswas the thesecond second element element of the of the receiver—it receiver—it was was located located behind behind the the low low noise noise amplifier.amplifier. TheThe totaltotal noise noise figure figure of the of the receiver receiver in inthis this ca casese was was determined determined by by the the noise noise figure figure of the lowlow noise amplifier and its gain. It should be emphasized that the applied architecture of the active balun makes it possible to achieve a very low noise figure with a sufficiently high current and noise matching optimization. In this implementation, noise minimization was not carried out because low power consumption was more important. Balun and mixer microphotography is shown in Figure 25. The layout dimensions of the designed balun and mixer were 1012 µm × 592 µm. Electronics 2021, 10, x FOR PEER REVIEW 19 of 21

noise amplifier and its gain. It should be emphasized that the applied architecture of the active balun makes it possible to achieve a very low noise figure with a sufficiently high current and noise matching optimization. In this implementation, noise minimization was not carried out because low power consumption was more important.

Table 1. Comparison of results for baluns from the literature.

Blaakmeer et al. Ji et al. Kim & Kwon Qin & Xue Parameter This Work Electronics 2021, 10, 1351 [22] [3] [23] [4] 18 of 20 Technology 65 180 65 65 110 process (nm) Frequency Table 1. Comparison of0.2–5.2 results for baluns1.227 from the literature.0.05–1 1.6 1.575 (GHz) Voltage gain Blaakmeer Kim & Qin & Xue Parameter 13–15.6 30.4Ji et al. [3] 24–30 16 This 18 Work (dB) et al. [22] Kwon [23] [4] TechnologyS11 (dB) process <−10 −14 <−10 −20 −22 65 180 65 65 110 NF (dB)(nm) <3.5 1.8 2.3–3.3 3.8 3.23 FrequencyPower (GHz) 0.2–5.2 1.227 0.05–1 1.6 1.575 Voltage gain (dB) 13–15.6 30.4 24–30 16 18 consumptionS11 (dB) 21 <−10 3.6 −1419.8 <−10 9.2− 20 2.25−22 (mW)NF (dB) <3.5 1.8 2.3–3.3 3.8 3.23 Power consumption 21 3.6 19.8 9.2 2.25 Balun(mW) and mixer microphotography is shown in Figure 25. The layout dimensions of the designed balun and mixer were 1012 µm × 592 µm.

FigureFigure 25.25. BalunBalun andand mixermixer microphotography.microphotography.

5.5. Conclusions TheThe proposedproposed activeactive balunbalun performsperforms withwith tripletriple functionalityfunctionality inin thethe GNSSGNSS RFRF frontfront end.end. ItIt ensuresensures aa 5050Ω Ωinput input match, match, provides provides additional additional signal signal amplification amplification and and delivers delivers a differentiala differential RF RF signal signal to to the the down-conversion down-conversion mixer. mixer. The The phase phase shift shift between between thethe balunbalun ◦ outputsoutputs isis closeclose toto 180180° and thethe gaingain ofof each outputoutput isis almostalmost identical.identical. ThisThis isis possiblepossible duedue toto thethe useuse ofof aa center-tappedcenter-tapped symmetricsymmetric inductorinductor asas anan elementelement generatinggenerating thethe differentialdifferential ◦ signal.signal. The The phase phase and and gain variations between outputs do not exceed 55° and 1.5 dB,dB, respectively,respectively, across across the the simulated simulated PVT PVT corners. corners. The The useuse ofof anan activeactive balunbalun mademade itit possiblepossible toto reducereduce thethe noisenoise requirementsrequirements forfor thethe mixer.mixer. TheThe estimatedestimated parametersparameters ofof thethe balun,balun, based on post-layout simulations and measurements of the total conversion gain and total noise figure of the balun and mixer, were: GV = 18 dB, NF = 3.23 dB, S11 = −22 dB, IDD = 1.5 mA. The proposed Gilbert double-balanced mixer system performs with double functional- ity in the GNSS RF front end. The main task is to convert the RF signal into an intermediate frequency signal. The second task is to provide additional signal amplification in the receiving path. The estimated parameters of the mixer, based on post-layout simulations and measurements of the total conversion gain and total noise figure of the balun and mixer, were: conversion gain GC = 9.3 dB, NF = 24 dB and IDD = 0.66 mA. The measured total noise figure and total conversion gain were, respectively: NF = 7.7 dB and GC = 25.8 dB in the band of interest. The measured current consumption was IDD = 2.24 mA. The designed system meets the specification. Electronics 2021, 10, 1351 19 of 20

Author Contributions: The work presented in this paper was a collaboration of all the authors. RF and analog design, visualization, writing, D.P.; conceptualization, validation, T.B.; supervision, writing—review and editing, project administration, funding acquisition, W.A.P. All authors have read and agreed to the published version of the manuscript. Funding: This work was supported in part by the Polish National Centre for Research and Develop- ment under project no. POIR.04.01.04-00-0101/16. Data Availability Statement: The data presented in this study are available on request from the corresponding author. The data are not publicly available due to the ongoing project restrictions. Conﬂicts of Interest: The authors declare no conﬂict of interest.

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