5 4 3 2 1 XO3L Breakout Board Revision B

May, 2014

D D

LEDS(1-4) RGB LED PMOD

I/Os

BANK 1 Header I/Os

FPGA

SMA INPUT I/Os LCMXO3L-6900C-6BG256C C U7 C BANK 2 & 3 BANK 0 & 5 SMA OUTPUT Header

BANK 4

SPI I/Os FLASH Optional I2C PMOD Configuration

USB to JTAG USB CONNECTOR USB to I2C

Optional JTAG Configuration

B B

FPGA I/Os I/Os LCMXO3L-2100E-6UWG49CTR U9 MIPI_INPUT MIPI_OUTPUT

A A

Lattice Semiconductor Applications Email: [email protected]

Title Block Diagram

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 71 5 4 3 2 1 5 4 3 2 1

D D

3.3V FB4 3.3V Optional JTAG VCCIO Header when

C5 C6 C7 C8 C9 FB_60ohm 1 C1 C2 VCCIO is 2.5V R211 R212 R213 PART_NUMBER = HI0603P600R-10 VCCIO 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 3.3V Manufacturer = Laird-signal 4.7uF 0.1uF 4.7K 4.7K 4.7K 2 J1 FB5 1 1 2 2 FTDI_TDO [Pg7] 3 FTDI_TDI [Pg5] 3 4 FB_60ohm 1 C3 C4 4 5 PART_NUMBER = HI0603P600R-10 5 6 FTDI_TMS [Pg5,7] Manufacturer = Laird-signal 4.7uF 0.1uF 6 7 2 7 8 FTDI_TCK [Pg5,7] 3.3V 8 header_1x8 DNI R220

1K

TP6 3.3V U1 FT2232HL 4 9 12 37 64 20 31 42 56 VPLL VPHY VCCIO VCCIO VCCIO VCCIO

VCORE VCORE VCORE 16 0 R5 50 ADBUS0 17 0 R6 VREGIN ADBUS1 18 0 R7 C 49 ADBUS2 19 0 R8 C VREGOUT ADBUS3 21 ADBUS4 22 ADBUS5 DM[Pg3] 7 23 8 DM ADBUS6 24 DP[Pg3] DP ADBUS7 C10 C11 26 VCCIO R218 1K 14 ACBUS0 27 10uF 0.1uF RESET# ACBUS1 28 3.3V ACBUS2 29 R221 12K 6 ACBUS3 30 3.3V REF ACBUS4 32 R216 R217 ACBUS5 33 R16 R17 R18 ACBUS6 34 1K 1K 10K 10K 10K 63 ACBUS7 62 EECS 38 0 R203 DNL SCL_2 [Pg7] U2 61 EECLK BDBUS0 39 0 R204 DNL SDA_2 [Pg7] 8 1 EEDATA BDBUS1 40 0 R205 DNL 7 VCC CS 2 BDBUS2 41 6 NU CLK 3 2 BDBUS3 43 C12 5 ORG DI 4 OSCI BDBUS4 44 VSS DO R219 1K BDBUS5 45 0.1uF 93LC56-SO8 X1 BDBUS6 46 DNI R11 SCL_1 [Pg5] Optional I2C 1 3 3 BDBUS7 DNI R12 SDA_1 [Pg5] 1 3 OSCO 48 DNI R13 Configuration 2 4 BCBUS0 52 C13 G1 G2 C14 BCBUS1 53 BCBUS2 18pF 12MHZ 18pF 13 54 TEST BCBUS3 55 BCBUS4 57 BCBUS5 FTDI High-Speed USB 58 BCBUS6 59 BCBUS7 FT2232H 60 PWREN# 36 SUSPEND# J50 B B AGND GND GND GND GND GND GND GND GND

1 5 XO3L_2100E_TDO 1 4 XO3L_6900C_TDI 10 11 15 25 35 47 51

2 5 FTDI_TDI

FTDI_TDO 3 6 XO3L_6900C_TDO

XO3L_2100E_TDI

Value = 3X2_HEADER DEFAULT_OPTION = 1&4 and 3&6

A A

Lattice Semiconductor Applications Email: [email protected]

Title USB to JTAG

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 72 5 4 3 2 1 5 4 3 2 1

Test Points

TP1 12V 1 D D TP_LOOP_RED

TP3 5V 1

TP_LOOP_RED

TP5

1

TP_LOOP_BLACK

12V Power Options 5V Power Options 1) External 12V DC Supply 1) Regulated 5V Supply 2) Signet Main Board Connector 2) USB 5V Current Sense TP 5V_Reg D1 5V 5V Rail 12V DC JACK PWR Jack_12V MIPI_VCC_12V_IN VBUS_5V 5V U5 3.31V 3.3V 1 TP33H TP33L 3.3V Rail 2 R36 3 RB496EA R30 18 3 17 IN1_1 OUT1_1 J2 RB496EA 14 IN1_2 4 C25 0.1 D2 1K 1 13 IN2_1 OUT1_2 R37 C29 R38 0.1 OHM 1/2W 1% 0805 C30 C26 D3 IN2_2 0.01uF 12V C16 Green C27 R39 R40 20 2 357K 10uF 127 22uF 0.1uF C L1 SHDN1 BYP1 R41 210K C 0.1uF 10uF 1M 1M 11 1 600 Ohm 500 mA SHDN2 ADJ1 2 1.22V TP12H TP12L 1.2V 19 R42 J3 PWRGD1 7 1.2V Rail 1 12 OUT2_1 VCC 2 PWRGD2 8 C40 0.1 D- DM [Pg2] OUT2_2 3 DP [Pg2] C38 R43 0.1 OHM 1/2W 1% 0805 C39 D+ 4 R31 0 0.01uF ID 5 21 9 4.7uF 127 22uF GND C17 0.1uF THERMPAD BYP2 10 SKT_MINIUSB_B_RA ADJ2

USB Power GND1 GND2 GND3 GND4 5 6

16 15 LT3030EFE#TRPBF

12V U11 5V_Reg LT3680 4 1 VIN BD C20 C129 10uF 5 R231 47uF RUN_SS 536K VCCIO Select 9 - 3.3V Default VC 8 R232 Current Sense TP FB 100K - 2.5V Optional 10 2 RT BOOST 5V U6 2.51V 2.5V 2.5V Rail 3.3V 2.5V VCCIO TP25H TP25L C128 R229 7 R44 PG 15K 0.47uF L3 R32 R33 18 3 R230 3 17 IN1_1 OUT1_1 B SW 0 DNI IN1_2 B 34K 6 4.7uH 14 4 C44 0.1 SYNC 11 13 IN2_1 OUT1_2 R48 C43 R45 0.1 OHM 1/2W 1% 0805 C48 C49 C127 EPAD D12 IN2_2 0.01uF 680pF LT3680 Manufacturer = ON Semi C45 R46 R47 20 2 255K 10uF 127 22uF 0.1uF Manufacturer = Linear PART_NUMBER = MBRA340T3G SHDN1 BYP1 R49 243K PART_NUMBER = LT3680EDD#PBF 10uF 1M 1M 11 1 SHDN2 ADJ1 1.81V TP18H TP18L 1.8V 19 R50 1.8V Rail PWRGD1 7 12 OUT2_1 PWRGD2 8 C57 R51 0.1 OUT2_2 C58 R52 C59 0.01uF 113K 0.1 OHM 1/2W 1% 0805 21 9 4.7uF 127 22uF THERMPAD BYP2 R53 237K 10 ADJ2 GND1 GND2 GND3 GND4 5 6

16 15 LT3030EFE#TRPBF

A A

Lattice Semiconductor Applications Email: [email protected]

Title Board Power

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 73 5 4 3 2 1 5 4 3 2 1 MIPI RX Termination Place resistors as close to the bank 2 pins on XO3 as possible. Arrange them so they do not influence the *HS* trace path. Match trace length for all P and N signals. Match lengths between HS signals, match lengths between LP signals. U7C SMA Connectors BANK2

[Pg4] PIO_P4 P4 M8 PIO_M8 [Pg4] T4 PB3A/PB3A/PB4A PB16C/PB18A/PB21A N9 [Pg4] PIO_T4 PB3B/PB3B/PB4B PB16D/PB18B/PB21B PIO_N9 [Pg4] 3 2 3 2 51 R54 CLKIN0_LP_P [Pg4] T2 T9 J4 J5 [Pg4] PIO_T2 CLKIN0_HS_P [Pg4] 3 2 3 2 R3 PB3C/PB3C/PB4C PB16A/PB20A/PB23A || PCLKT2_1 P9 [Pg4] PIO_R3 PB3D/PB3D/PB4D PB16B/PB20B/PB23B || PCLKC2_1 CLKIN0_HS_N [Pg4] SMA73391-0060 1 CLKIN0_HS_P [Pg4] SMA73391-0060 1 CLKIN1_HS_P [Pg4] 51 R55 CLKIN0_LP_N [Pg4] 1 1 [Pg4] SSn_256 R5 R9 PIO_R9 [Pg4] 4 5 4 5 P5 PB5A/PB4A/PB6A || CSSPIN PB18A/PB21A/PB26A T10 D PB5B/PB4B/PB6B PB18B/PB21B/PB26B PIO_T10 [Pg4] 4 5 4 5 D [Pg4] DIN7_HS_P T3 M9 PIO_M9 [Pg4] R4 PB6C/PB6A/PB7A PB18C/PB21C/PB26C L10 [Pg4] DIN7_HS_N PB6D/PB6B/PB7B PB18D/PB21D/PB26D PIO_L10 [Pg4]

[Pg4] DIN5_HS_P T5 N10 PIO_N10 [Pg4] R6 PB6A/PB7A/PB9A PB19C/PB23C/PB28A M11 [Pg4] DIN5_HS_N PB6B/PB7B/PB9B PB19D/PB23D/PB28B PIO_M11 [Pg4] 3 2 3 2 51 R56 DIN0_LP_P [Pg4] N6 P10 J6 J7 [Pg4] DIN3_HS_P PB8C/PB9C/PB10A PB19A/PB23A/PB29A DIN0_HS_P [Pg4] 3 2 3 2 L7 R10 SMA73391-0060 SMA73391-0060 [Pg4] DIN3_HS_N PB8D/PB9D/PB10B PB19B/PB23B/PB29B DIN0_HS_N [Pg4] 1 CLKIN0_HS_N [Pg4] 1 CLKIN1_HS_N [Pg4] 51 R57 DIN0_LP_N [Pg4] 1 1 4 5 4 5 [Pg4] SCLK_256 P6 T11 T6 PB8A/PB9A/PB12A || MCLK/CCLK PB21A/PB24A/PB31A P11 [Pg4] MISO_256 PB8B/PB9B/PB12B || SO/SPISO PB21B/PB24B/PB31B 4 5 4 5 [Pg4] DIN1_LP_P 51 R58 [Pg4] DIN1_HS_P R7 M10 PIO_M10 [Pg4] P7 PB9A/PB10A/PB13A PB21C/PB24C/PB31C N11 [Pg4] DIN1_HS_N PB9B/PB10B/PB13B PB21D/PB24D/PB31D PIO_N11 [Pg4] [Pg4] DIN1_LP_N 51 R59 [Pg4] PIO_M7 M7 N7 PB9C/PB10C/PB13C R13

[Pg4] PIO_N7 PB9D/PB10D/PB13D PB22C/PB26A/PB34A DIN2_HS_P [Pg4] 3 2 3 2 T14 DIN2_HS_N [Pg4] M6 PB22D/PB26B/PB34B J8 J9 [Pg4] PIO_M6 PB11C/PB12A/PB15A 3 2 3 2 [Pg4] PIO_L8 L8 R11 DIN4_HS_P [Pg4] VCCIO SMA73391-0060 DIN0_HS_P [Pg4] SMA73391-0060 DIN1_HS_P [Pg4] PB11D/PB12B/PB15B PB22A/PB27A/PB35A Pull-up resistor R62 is for 1 1 T12 DIN4_HS_N [Pg4] 1 1 PB22B/PB27B/PB35B cases where I2C is used. If 4 5 4 5 [Pg4] CLKIN1_LP_P 51 R60 T7 P12 R62 I2C is not used for programming [Pg4] CLKIN1_HS_P DIN6_HS_P [Pg4] this pull-up is not required. 4 5 4 5 R8 PB11A/PB13A/PB16A || PCLKT2_0 PB24A/PB29A/PB37A T13 [Pg4] CLKIN1_HS_N PB11B/PB13B/PB16B || PCLKC2_0 PB24B/PB29B/PB37B DIN6_HS_N [Pg4] 4.7K [Pg4] CLKIN1_LP_N 51 R61 [Pg4] PIO_P8 P8 R12 T8 PB12A/PB15A/PB18A PB25A/PB30A/PB38A || SN P13 R222 DNI [Pg4] PIO_T8 PB12B/PB15B/PB18B PB25B/PB30B/PB38B || SI/SISPI MOSI_256 [Pg4] N8 T15 L9 PB12C/PB15C/PB18C PB25C/PB30C/PB38C R14 VCCIO 3 2 3 2 PB12D/PB15D/PB18D PB25D/PB30D/PB38D J10 J11 3 2 3 2 SMA73391-0060 DIN0_HS_N [Pg4] SMA73391-0060 DIN1_HS_N [Pg4] 1 1 1 1 0 4 5 4 5 R64

K8 N5 4 5 4 5 C C63 C64 K9 VCCIO2/VCCIO2/VCCIO2 VCCIO2/VCCIO2/VCCIO2 N12 C VCCIO2/VCCIO2/VCCIO2 VCCIO2/VCCIO2/VCCIO2 C66 C67 C61 0.1uF 0.1uF 2K/4K/7K || 2nd_Fn. 0.1uF 0.1uF 1uF 3 2 3 2 LCMXO3L-6900C-6BG256C J12 J13 3 2 3 2 SMA73391-0060 DIN2_HS_P [Pg4] SMA73391-0060 DIN3_HS_P [Pg4] 1 1 1 1 4 5 4 5 4 5 4 5 3 2 3 2 J14 J15 3 2 3 2 SMA73391-0060 DIN2_HS_N [Pg4] SMA73391-0060 DIN3_HS_N [Pg4] 1 1 1 1 4 5 4 5 4 5 4 5 XO3L Configuration SPI Flash

3.3V

IO Header 3 2 3 2 J17 J18 3 2 3 2 C122 SMA73391-0060 DIN4_HS_P [Pg4] SMA73391-0060 DIN5_HS_P [Pg4] 3.3V 3.3V 1 1 1 1 0.1uF J16 4 5 4 5

2 1 4 5 4 5 [Pg4] PIO_P4 4 3 PIO_M8 [Pg4] U10 6 5 1k R196 1k R195 1k R194

B 8 [Pg4] PIO_T4 PIO_N9 [Pg4] B 10K R197 8 7

Place close to U10 [Pg4] PIO_T2 PIO_R9 [Pg4] [Pg4] PIO_R3 10 9 PIO_T10 [Pg4] Place close to U7 5 2 12 11

[Pg4] MOSI_256 MISO_256 [Pg4] [Pg4] PIO_P8 PIO_M9 [Pg4] 3 2 3 2 SDI VCC SDO [Pg4] PIO_T8 14 13 PIO_L10 [Pg4] 20R227 6 16 15 J19 J20 [Pg4] SCLK_256 [Pg4] PIO_M7 PIO_N10 [Pg4] 3 2 3 2 SCK 18 17 [Pg4] PIO_N7 PIO_M11 [Pg4] SMA73391-0060 1 DIN4_HS_N [Pg4] SMA73391-0060 1 DIN5_HS_N [Pg4] 3 [Pg4] PIO_M6 20 19 PIO_M10 [Pg4] 1 1 WP 4 5 4 5 C130 [Pg4] PIO_L8 22 21 PIO_N11 [Pg4] Place close to U10 30pF 1 7 24 23

[Pg4] SSn_256 4 5 4 5 DNI CS HOLD GND HEADER 12X2 4 M25PX16-VMN6TP DNI 3 2 3 2 J21 J22 3 2 3 2 SMA73391-0060 DIN6_HS_P [Pg4] SMA73391-0060 DIN7_HS_P [Pg4] 1 1 1 1 4 5 4 5 4 5 4 5

U7D 3 2 3 2 BANK3 J23 J24 3 2 3 2 N2 SMA73391-0060 DIN6_HS_N [Pg4] SMA73391-0060 DIN7_HS_N [Pg4] L1 PL13C/PL18C/PL23C P1 1 1 1 1

L3 PL11A/PL16A/PL19A PL13D/PL18D/PL23D 4 5 4 5 PL11B/PL16B/PL19B M3

CLKIN0_LP_P [Pg4] 4 5 4 5 K4 PL13A/PL19A/PL24A N1 [Pg4] CLKIN1_LP_P CLKIN0_LP_N [Pg4] L5 PL11C/PL16C/PL19C PL13B/PL19B/PL24B [Pg4] CLKIN1_LP_N PL11D/PL16D/PL19D M2 DIN0_LP_P [Pg4] K5 PL14A/PL20A/PL25A N3 [Pg4] DIN1_LP_P L4 PL12C/PL17C/PL21C PL14B/PL20B/PL25B DIN0_LP_N [Pg4] A [Pg4] DIN1_LP_N A PL12D/PL17D/PL21D R1 PL14C/PL20C/PL25C P2 PL14D/PL20D/PL25D 1.2V L2 M1 PL12A/PL17A/PL22A || PCLKT3_0 PL12B/PL17B/PL22B || PCLKC3_0 0

R65 Lattice Semiconductor Applications M4 VCCIO3/VCCIO3/VCCIO3 Email: [email protected]

C70 C71 2K/4K/7K || 2nd_Fn. Title 0.1uF 1uF DSI: SMA_INPUT

LCMXO3L-6900C-6BG256C Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 74 5 4 3 2 1 5 4 3 2 1

SMA Connectors MIPI TX Termination Place resistors as close to the bank 0 pins on XO3 as possible. Arrange them so they do not influence the *HS* trace path. Match trace length for all P and N signals. Match lengths between HS signals, match lengths between LP signals. 3 2 3 2 J25 J26 3 2 3 2 SMA73391-0060 1 CLKOUT0_P [Pg5]SMA73391-0060 1 CLKOUT1_P [Pg5] DNI R67 1 1 R66 DNI

4 5 4 5 R68 R69 CLKOUT0_LP_P [Pg5] CLKOUT1_LP_P [Pg5] U7A D 30 30 D

4 5 4 5 [Pg5] CLKOUT0_P CLKOUT0_HS_P[Pg5] CLKOUT1_P [Pg5] CLKOUT1_HS_P [Pg5] 330 330 BANK0 R70 R71 C4 F8 [Pg5] PIO_C4 PT9A*/PT9A*/PT9A* PT18A*/PT20A*/PT22A* PIO_F8 [Pg5] R73 DNI B5 D9 R72 DNI R74 R75 [Pg5] PIO_B5 PT9B*/PT9B*/PT9B* PT18B*/PT20B*/PT22B* PIO_D9 [Pg5] [Pg5] CLKOUT0_N CLKOUT0_HS_N[Pg5] CLKOUT1_N [Pg5] CLKOUT1_HS_N [Pg5] 330 330 B3 A9 CLKOUT0_LP_N [Pg5] CLKOUT1_LP_N [Pg5] SCL_1 [Pg2] 30 30 PT9C/PT9C/PT9C PT18C/PT20C/PT22C || SCL/PCLKT0_0 C9 3 2 3 2 R76 R77 A4 PT18D/PT20D/PT22D || SDA/PCLKC0_0 SDA_1 [Pg2] [Pg5] PIO_A4 PT10A*/PT10A*/PT10A*

J27 J28 R78 DNI R79 DNI C5 B9 3 2 3 2 [Pg5] PIO_C5 PIO_B9 [Pg5] PT10B*/PT10B*/PT10B* PT19A*/PT21A*/PT25A* A10 SMA73391-0060 1 CLKOUT0_N [Pg5]SMA73391-0060 1 CLKOUT1_N [Pg5] PT19B*/PT21B*/PT25B* PIO_A10 [Pg5] 1 1 [Pg5] PIO_A5 A5 4 5 4 5 PT11A*/PT11A*/PT11A* [Pg5] PIO_B6 B6 F9 PIO_F9 [Pg5] VCCIO PT11B*/PT11B*/PT11B* PT19C/PT22A*/PT26A* E11

4 5 4 5 PIO_E11 [Pg5] A3 PT19D/PT22B*/PT26B* [Pg5] PIO_A3 PT11C/PT12A*/PT12A* [Pg5] PIO_B4 B4 D10 PIO_D10 [Pg5] PT11D/PT12B*/PT12B* PT20A*/PT23A*/PT27A* E10 PT20B*/PT23B*/PT27B* PIO_E10 [Pg5] 100K

D6 R225 [Pg5] DOUT6_HS_P PT12A*/PT13A*/PT14A* [Pg5] DOUT6_HS_N E7 C10 PIO_C10 [Pg5] PT12B*/PT13B*/PT14B* PT20C/PT23C/PT27C || JTAGENB B10 3 2 3 2 PT20D/PT23D/PT27D || PROGRAMN J29 J30 C6 A11 3 2 3 2 [Pg7] XO3L_6900C_TDO DOUT7_HS_P [Pg5] C123 A6 PT12C/PT13C/PT14C || TDO PT21A*/PT24A*/PT28A* C11 DNL SMA73391-0060 1 DOUT0_P [Pg5] SMA73391-0060 1 DOUT1_P [Pg5] [Pg2] XO3L_6900C_TDI PT12D/PT13D/PT14D || TDI PT21B*/PT24B*/PT28B* DOUT7_HS_N [Pg5] 10uF R80 DNI

1 1 DNI R81

4 5 4 5 R82 R83 DOUT0_LP_P [Pg5] DOUT1_LP_P [Pg5] [Pg5] DOUT4_HS_P B7 F10 PIO_F10 [Pg5] 30 30 C7 PT13A*/PT14A*/PT15A* PT21C/PT24C/PT32A* D11

4 5 4 5 [Pg5] DOUT0_P DOUT0_HS_P[Pg5] [Pg5] DOUT1_P DOUT1_HS_P [Pg5] [Pg5] DOUT4_HS_N 330 330 PT13B*/PT14B*/PT15B* PT21D/PT24D/PT32B* R84 R85 E6 B11 [Pg5] DOUT2_HS_P PT13C/PT14C/PT16A* PT22A*/PT25A*/PT33A* DOUT5_HS_P [Pg5] R86 R87 DNI D7 A12 R88 DNI R89 [Pg5] DOUT2_HS_N PT13D/PT14D/PT16B* PT22B*/PT25B*/PT33B* DOUT5_HS_N [Pg5] [Pg5] DOUT0_N DOUT0_HS_N[Pg5] [Pg5] DOUT1_N DOUT1_HS_N [Pg5] 330 DOUT0_LP_N [Pg5] 330 DOUT1_LP_N [Pg5] [Pg5] DOUT0_HS_P F7 B13 DOUT3_HS_P [Pg5] 30 30 E8 PT16A*/PT15A*/PT17A* PT22C/PT26A*/PT34A* A14

3 2 3 2 [Pg5] DOUT0_HS_N DOUT3_HS_N [Pg5] R90 R91 PT16B*/PT15B*/PT17B* PT22D/PT26B*/PT34B* R92 DNI DNI J31 J32 R93 A7 C12 3 2 3 2 [Pg2,7] FTDI_TCK PT16C/PT15C/PT17C || TCK PT23A*/PT27A*/PT35A* DOUT1_HS_P [Pg5] SMA73391-0060 DOUT0_N [Pg5] SMA73391-0060 DOUT1_N [Pg5] [Pg2,7] FTDI_TMS B8 B12 DOUT1_HS_N [Pg5] 1 1 1 1 PT16D/PT15D/PT17D || TMS PT23B*/PT27B*/PT35B* 4 5 4 5 [Pg5] CLKOUT0_HS_P C8 B14 CLKOUT1_HS_P [Pg5] A8 PT17A*/PT18A*/PT18A* || PCLKT0_1 PT24A*/PT28A*/PT36A* A15

4 5 4 5 [Pg5] CLKOUT0_HS_N CLKOUT1_HS_N [Pg5] C PT17B*/PT18B*/PT18B* || PCLKC0_1 PT24B*/PT28B*/PT36B* C [Pg5] PIO_D8 D8 A13 E9 PT17C/PT19A*/PT21A* PT24C/PT28C/PT36C || INITN C13 VCCIO [Pg5] PIO_E9 PT17D/PT19B*/PT21B* PT24D/PT28D/PT36D || DONE

* = TRUE LVDS Output 3 2 3 2 0

J33 J34 R95 3 2 3 2 D5 G8 SMA73391-0060 1 DOUT2_P [Pg5] SMA73391-0060 1 DOUT3_P [Pg5] VCCIO0/VCCIO0/VCCIO0 VCCIO0/VCCIO0/VCCIO0 1 1 D12 G9 C77 C78 C79 4 5 4 5 C73 C74 VCCIO0/VCCIO0/VCCIO0 VCCIO0/VCCIO0/VCCIO0 0.1uF 0.1uF 1uF R97 R96 DNI DNI 4 5 4 5 R98 R99 2K/4K/7K || 2nd_Fn. DOUT2_LP_P [Pg5] DOUT3_LP_P [Pg5] 0.1uF 0.1uF [Pg5] DOUT2_P 30 DOUT2_HS_P[Pg5] [Pg5] DOUT3_P 30 DOUT3_HS_P [Pg5] 330 330 R100 R101 LCMXO3L-6900C-6BG256C DNI DNI R102 R104 R103 R105

3 2 3 2 [Pg5] DOUT2_N DOUT2_HS_N[Pg5] [Pg5] DOUT3_N DOUT3_HS_N [Pg5] 330 DOUT2_LP_N [Pg5] 330 DOUT3_LP_N [Pg5] J35 J36 30 30 3 2 3 2 R106 R107 SMA73391-0060 DOUT2_N [Pg5] SMA73391-0060 DOUT3_N [Pg5] 1 1 1 1 DNI DNI R109 4 5 4 5 R108 4 5 4 5 U7F

BANK5 [Pg5] DOUT1_LP_P B1 G5 DOUT7_LP_P [Pg5] C2 PL1C/PL2C/PL2C PL4C/PL7C/PL7C G4 3 2 3 2 [Pg5] DOUT1_LP_N PL1D/PL2D/PL2D PL4D/PL7D/PL7D DOUT7_LP_N [Pg5] J38 J39 D3 F3 3 2 3 2 [Pg5] DOUT6_LP_P PL1A/PL3A/PL3A || L_GPLLT_FB PL4A/PL7A/PL8A DOUT5_LP_P [Pg5] SMA73391-0060 DOUT4_P [Pg5] SMA73391-0060 DOUT5_P [Pg5] [Pg5] DOUT6_LP_N D1 F1 DOUT5_LP_N [Pg5] 1 1 1 1 PL1B/PL3B/PL3B || L_GPLLC_FB PL4B/PL7B/PL8B 4 5 4 5 DNI DNI [Pg5] DOUT4_LP_P E2 G2 DOUT3_LP_P [Pg5] R111 R110 R112 R113 E3 PL2A/PL4A/PL4A || L_GPLLT_IN PL5A/PL8A/PL9A G3 4 5 4 5 DOUT4_LP_P [Pg5] DOUT5_LP_P [Pg5] [Pg5] DOUT4_LP_N PL2B/PL4B/PL4B || L_GPLLC_IN PL5B/PL8B/PL9B DOUT3_LP_N [Pg5] [Pg5] DOUT4_P 30 DOUT4_HS_P[Pg5] [Pg5] DOUT5_P 30 DOUT5_HS_P [Pg5] 330 330 [Pg5] DOUT2_LP_P C1 F5 CLKOUT1_LP_P [Pg5] B R114 R115 D2 PL2C/PL4C/PL4C PL5C/PL8C/PL9C H6 B [Pg5] DOUT2_LP_N PL2D/PL4D/PL4D PL5D/PL8D/PL9D CLKOUT1_LP_N [Pg5] DNI DNI R116 R118 R117 R119 [Pg5] DOUT4_N DOUT4_HS_N[Pg5] [Pg5] DOUT5_N DOUT5_HS_N [Pg5] [Pg5] DOUT0_LP_P E1 330 330 F2 PL3A/PL6A/PL6A || PCLKT5_0

3 2 3 2 DOUT4_LP_N [Pg5] DOUT5_LP_N [Pg5] [Pg5] DOUT0_LP_N 30 30 PL3B/PL6B/PL6B || PCLKC5_0 1.2V J40 J41 R120 R121 F4 3 2 3 2 [Pg5] CLKOUT0_LP_P PL3C/PL6C/PL6C DNI DNI G6 R122 SMA73391-0060 DOUT4_N [Pg5] SMA73391-0060 DOUT5_N [Pg5] R123 [Pg5] CLKOUT0_LP_N 1 1 1 1 PL3D/PL6D/PL6D 0 4 5 4 5 R138

4 5 4 5 E4 VCCIO5/VCCIO5/VCCIO5 C82 C83 2K/4K/7K || 2nd_Fn. 0.1uF 1uF

3 2 3 2 LCMXO3L-6900C-6BG256C J43 J42 3 2 3 2 SMA73391-0060 DOUT6_P [Pg5] SMA73391-0060 DOUT7_P [Pg5] 1 1 1 1 4 5 4 5 DNI R124 DNI R126 R125 R127

4 5 4 5 DOUT6_LP_P [Pg5] DOUT7_LP_P [Pg5] [Pg5] DOUT6_P 30 DOUT6_HS_P[Pg5] [Pg5] DOUT7_P 30 DOUT7_HS_P [Pg5] 330 330 R128 R129 DNI DNI R130 R132 R131 R133 [Pg5] DOUT6_N DOUT6_HS_N[Pg5] [Pg5] DOUT7_N DOUT7_HS_N [Pg5] IO Header 330 330

3 2 3 2 DOUT6_LP_N [Pg5] DOUT7_LP_N [Pg5] 30 30 J44 J45 R134 R135 3 2 3 2 R137 DNI DNI VCCIO VCCIO SMA73391-0060 DOUT6_N [Pg5] SMA73391-0060 DOUT7_N [Pg5] R136 1 1 1 1 J37 4 5 4 5 2 1 4 5 4 5 [Pg5] PIO_C4 4 3 PIO_F8 [Pg5] [Pg5] PIO_B5 6 5 PIO_D9 [Pg5] [Pg5] PIO_A4 8 7 PIO_B9 [Pg5] A [Pg5] PIO_C5 10 9 PIO_A10 [Pg5] A [Pg5] PIO_A5 12 11 PIO_F9 [Pg5] [Pg5] PIO_B6 14 13 PIO_E11 [Pg5] [Pg5] PIO_A3 16 15 PIO_D10 [Pg5] [Pg5] PIO_B4 18 17 PIO_E10 [Pg5] [Pg5] PIO_D8 20 19 PIO_C10 [Pg5] [Pg5] PIO_E9 22 21 PIO_F10 [Pg5] 24 23 Lattice Semiconductor Applications Email: [email protected] HEADER 12X2 DNI Title DSI: SMA_OUTPUT

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 75 5 4 3 2 1 5 4 3 2 1

U7B U7E BANK1 BANK4 LEDs [Pg6] PIO_G1 G1 J2 PIO_J2 [Pg6] C15 D14 H2 PL6A/PL9A/PL10A PL9A/PL13A/PL15A K1 [Pg6] PIO_C15 PR1C/PR2C/PR2C PR1A/PR2A/PR2A || R_GPLLT_FB** [Pg6] PIO_H2 PL6B/PL9B/PL10B PL9B/PL13B/PL15B PIO_K1 [Pg6] [Pg6] PIO_B16 B16 E15 3.3V PR1D/PR2D/PR2D PR1B/PR2B/PR2B || R_GPLLC_FB** H4 H5 D [Pg6] PIO_H4 PL6C/PL9C/PL10C PL9C/PL13C/PL15C PIO_H5 [Pg6] D C16 D16 [Pg6] PIO_J6 J6 J4 PIO_J4 [Pg6] D15 PR2C/PR4C/PR4C PR2A/PR3A/PR3A || R_GPLLT_IN** E14 PL6D/PL9D/PL10D PL9D/PL13D/PL15D PR2D/PR4D/PR4D PR2B/PR3B/PR3B || R_GPLLC_IN** H3 J5 F13 E16 H1 PL7A/PL10A/PL11A PL10C/PL14C/PL16C K6 [Pg6] PIO_F13 PR3C/PR5C/PR6C PR3A/PR5A/PR5A PL7B/PL10B/PL11B PL10D/PL14D/PL16D [Pg6] PIO_G12 G12 F15 PR3D/PR5D/PR6D PR3B/PR5B/PR5B K3 R140 R141 R142 R143 F12 F14 PL10A/PL14A/PL17A K2 G13 PR4C/PR6C/PR7C PR4A/PR6A/PR7A F16 PL10B/PL14B/PL17B 1K 1K 1K 1K PR4D/PR6D/PR7D DQ0 PR4B/PR6B/PR7B J1 VCCIO G11 G15 J3 PL7C/PL10C/PL12A || PCLKT4_0 H12 PR5C/PR8C/PR10C PR5A/PR8A/PR9A G14 PL7D/PL10D/PL12B || PCLKC4_0 PR5D/PR8D/PR10D PR5B/PR8B/PR9B H13 G16 0 1 1 1 1 R139 J12 PR6C/PR9C/PR11C PR6A/PR9A/PR11A DQS0 H15 LED_RED D5 D6 D7 D8 PR6D/PR9D/PR11D PR6B/PR9B/PR11B DQS0N H7 Red Red Red Red LED_GREEN VCCIO4/VCCIO4/VCCIO4 [Pg6] PIO_J16 J16 H14 J7 J14 PR7C/PR10C/PR15A PR7A/PR10A/PR12A || PCLKT1_0 H16 LED_BLUE VCCIO4/VCCIO4/VCCIO4 [Pg6] PIO_J14 PR7D/PR10D/PR15B PR7B/PR10B/PR12B || PCLKC1_0 C85 C86 C87

0.1uF 0.1uF 1uF 2 2 2 2 H11 2K/4K/7K || 2nd_Fn. J13 PR9C/PR13C/PR16C J15 PR9D/PR13D/PR16D PR9A/PR13A/PR16A DQS1 K16 LED1 J11 PR9B/PR13B/PR16B DQS1N LCMXO3L-6900C-6BG256C [Pg6] PIO_J11 PR10C/PR14C/PR17C [Pg6] PIO_L12 L12 K14 LED1 LED2 PR10D/PR14D/PR17D PR10A/PR14A/PR17A K15 LED2 K11 PR10B/PR14B/PR17B LED3 L13 PR12C/PR16C/PR21C L16 LED3 PR12D/PR16D/PR21D PR11A/PR15A/PR18A L14 LED4 LED4 N15 PR11B/PR15B/PR18B P16 PR13C/PR18C/PR23C K13 PR13D/PR18D/PR23D PR11C/PR15C/PR19C K12 P15 DQ1 PR11D/PR15D/PR19D R16 PR14C/PR20C/PR25C L15 PR14D/PR20D/PR25D PR12A/PR16A/PR21A M16 PR12B/PR16B/PR21B M14 PR13A/PR18A/PR23A M15 PR13B/PR18B/PR23B C N16 C PR14A/PR19A/PR24A N14 PR14B/PR19B/PR24B BLUE LED VCCIO VF=2.1V, IF=20mA RS=(5.0V-3.2V)/20mA=145Ohm ** = 2nd_Fn. applicable for 4K and 7K devices only. RGB LED [email protected]=24mA 0 5V RS=(5.0V-2.1V)/24mA=120.8Ohm R149 U8 E13 J10 H10 VCCIO1/VCCIO1/VCCIO1 VCCIO1/VCCIO1/VCCIO1 M13 D9 VCCIO1/VCCIO1/VCCIO1 VCCIO1/VCCIO1/VCCIO1 LED_BLUE C89 C90 C93 C94 C95 R151 1 6 2 1 GREEN LED 62 CDBU0520 0.1uF 0.1uF 2K/4K/7K || 2nd_Fn. 0.1uF 0.1uF 1uF D10 VF=3.2V, IF=20mA LED_GREEN R152 2 5 2 1 RS=(5.0V-3.1V)/10mA=90Ohm 62 CDBU0520 D11 [email protected]=24mA LCMXO3L-6900C-6BG256C LED_RED R150 3 4 2 1 RS=(5.0V-3.1V)/24mA=75Ohm 110 CDBU0520

SFT722N-S RED LED MFG = Seoul VF=.3.2V, IF=20mA MFG P/N = SFT722N-S RS=(5.0V-3.2V)/10mA=90Ohm [email protected]=24mA RS=(5.0V-3.2V)/24mA=75Ohm

3.3V

0 U7G R153 PMOD Connector PMOD Connector B2 A1 GND/GND/GND VCC/VCC/VCC B15 A16 C96 C97 C98 C99 VCCIO VCCIO VCCIO VCCIO C3 GND/GND/GND VCC/VCC/VCC G7 0.1uF 0.1uF 0.1uF 1uF B C14 GND/GND/GND VCC/VCC/VCC G10 B D4 GND/GND/GND VCC/VCC/VCC K7 D13 GND/GND/GND VCC/VCC/VCC K10 J46 J47 E5 GND/GND/GND VCC/VCC/VCC T1 E12 GND/GND/GND VCC/VCC/VCC T16 GND/GND/GND VCC/VCC/VCC [Pg6] PIO_C15 1 7 PIO_J16 [Pg6] [Pg6] PIO_G1 1 7 PIO_J2 [Pg6] F6 [Pg6] PIO_B16 PIO_J14 [Pg6] [Pg6] PIO_H2 PIO_K1 [Pg6] F11 GND/GND/GND 2 8 2 8 GND/GND/GND [Pg6] PIO_F13 3 9 PIO_J11 [Pg6] [Pg6] PIO_H4 3 9 PIO_H5 [Pg6] H8 [Pg6] PIO_G12 PIO_L12 [Pg6] [Pg6] PIO_J6 PIO_J4 [Pg6] H9 GND/GND/GND A2 4 10 4 10 J8 GND/GND/GND NC/NC/NC 5 11 5 11 J9 GND/GND/GND 6 12 6 12 L6 GND/GND/GND GND/GND/GND L11 PMOD 2x6 PMOD 2x6 M5 GND/GND/GND M12 GND/GND/GND DNI DNI N4 GND/GND/GND N13 GND/GND/GND P3 GND/GND/GND P14 GND/GND/GND R2 GND/GND/GND R15 GND/GND/GND GND/GND/GND

2K/4K/7K

LCMXO3L-6900C-6BG256C

A A

Lattice Semiconductor Applications Email: [email protected]

Title BREAKOUT CONNECTION

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 76 5 4 3 2 1 5 4 3 2 1

This resistor is for external pull up for cases where I2C is used. If I2C is not used for programming MIPI Tx Termination DSI Input Connector Place *CD* resistors and I2C pull up as close to bank 2 this signal is not needed. Place MIPI TX resistor network as close to bank 0 as possible. Trace match *HS* P & N pins as possible. Trace match MIPI* pins between P channels as well as individual pairs. Minimize routing and trace match *LP* signals to J48 and N channels as well as individual pairs. Minimize VCCIO banks 5 and 0. routing and trace match *CD* signals to bank 5 pins.

[Pg7] MIPI_Data_0_in_N 2 1 MIPI_Data_0_in_P [Pg7] 4 3 U9B R165 51 BANK2 [Pg7] MIPI_Data_1_in_N 6 5 MIPI_Data_1_in_P [Pg7] 4.7K [Pg7] MIPI_Data_3_out_LP R156 8 7 [Pg7] MIPI_CD_CLK R155DNI 51 R154 [Pg7] MIPI_Clock_in_N 10 9 MIPI_Clock_in_P [Pg7] [Pg7] MIPI_Data_0_in_P E7 F4 MIPI_Data_3_in_P [Pg7] [Pg7] MIPI_Data_3_out_HS_P MIPI_Data_3_out_P [Pg7] 12 11 F7 PB3A PB12A F3 330 R157 [Pg7] MIPI_Data_0_in_N PB3B PB12B MIPI_Data_3_in_N [Pg7] [Pg7] MIPI_Data_2_in_N 14 13 MIPI_Data_2_in_P [Pg7] [Pg7] MIPI_CD_D0 0 16 15 R158 G7 G4 PB5A PB16A || PCLKT MIPI_Data_1_in_P [Pg7] [Pg7] MIPI_Data_3_in_N 18 17 MIPI_Data_3_in_P [Pg7] [Pg7] MIPI_Data_1_out_LP G3 MIPI_Data_1_in_N [Pg7] [Pg7] MIPI_Data_3_out_HS_N MIPI_Data_3_out_N [Pg7] 20 19 PB16B || PCLKC 330 R159 51 22 21 F6 G2 R162 D DSI_IO_24 DSI_IO_23 [Pg7] MIPI_Data_2_in_P PB8A || MCLK PB25A || SN [Pg7] MIPI_Data_3_out_LN D 24 23 [Pg7] MIPI_Data_2_in_N F5 G1 MIPI_Data_1_out_LN [Pg7] 51 R160 DSI_IO_26 26 25 DSI_IO_25 PB8B || SO PB25B || SI DSI_IO_28 DSI_IO_27 28 27 [Pg7] MIPI_Clock_in_P E4 30 29 DSI_IO_29 VCCIO E3 PB11A || PCLKT [Pg7] MIPI_Clock_in_N PB11B || PCLKC MIPI_VCC_12V_IN 32 31 MIPI_VCC_12V_IN [Pg7] MIPI_CD_CLK 0 34 33 R166 MIPI_VCC_5V_IN 36 35 MIPI_VCC_5V_IN 38 37 MIPI_VCC_3.3V_IN 40 39 MIPI_VCC_3.3V_IN G6 42 41 VCCIO2 44 43 C100 C101 46 45 48 47 1uF 0.1uF LCMXO3L-2100E-6UWG49CTR 50 49 51 [Pg7] MIPI_Data_2_out_LP R169 51 R168 [Pg7] MIPI_Data_2_out_HS_P MIPI_Data_2_out_P [Pg7] M50-3602542 330 R170

MIPI DSI Input [Pg7] MIPI_Data_2_out_HS_N MIPI_Data_2_out_N [Pg7] U9A 330 R173 51 [Pg7] MIPI_Data_2_out_LN R172 BANK0 [Pg7] MIPI_Data_3_out_HS_P D5 A3 MIPI_Data_2_out_HS_P [Pg7] 51 R171 D4 PT10A PT20A B2 [Pg7] MIPI_Data_3_out_HS_N PT10B PT20B MIPI_Data_2_out_HS_N [Pg7] A6 F2 XO3L_2100E_TDO PT12C || TDO PT20C || JTAGEN XO3L_2100E_TDI C5 F1 TP7 R202 PT12D || TDI PT20D || PROGRAMN 1K FTDI_TCK B4 E2 MIPI_Data_1_out_HS_P [Pg7] DNL B5 PT16C || TCK PT23A C2 FTDI_TMS PT16D || TMS PT23B MIPI_Data_1_out_HS_N [Pg7] [Pg7] MIPI_Clock_out_HS_P C4 C1 MIPI_Data_0_out_HS_P [Pg7] D3 PT17A || PCLKT PT24A D2 [Pg7] MIPI_Clock_out_HS_N PT17B || PCLKC PT24B MIPI_Data_0_out_HS_N [Pg7] B3 B1 [Pg2] SCL_2 MIPI_Data_2_out_LP [Pg7] C3 PT18C PT24C || INITN A1 51 [Pg2] SDA_2 PT18D || SDA PT24D || DONE MIPI_Data_2_out_LN [Pg7] C [Pg7] MIPI_Data_1_out_LP R175 C 51 R174 DSI Output Connector [Pg7] MIPI_Data_1_out_HS_P MIPI_Data_1_out_P [Pg7] VCCIO 330 R177 A2 J49 A5 VCCIO0 VCCIO0 [Pg7] MIPI_Data_1_out_HS_N MIPI_Data_1_out_N [Pg7] [Pg7] MIPI_Data_0_out_N 2 1 MIPI_Data_0_out_P [Pg7] C110 C111 C112 LCMXO3L-2100E-6UWG49CTR 330 R178 51 4 3 R180 1uF 0.1uF 0.1uF [Pg7] MIPI_Data_1_out_LN [Pg7] MIPI_Data_1_out_N 6 5 MIPI_Data_1_out_P [Pg7] 51 R179 8 7 [Pg7] MIPI_Clock_out_N 10 9 MIPI_Clock_out_P [Pg7] 12 11 [Pg7] MIPI_Data_2_out_N 14 13 MIPI_Data_2_out_P [Pg7] 16 15 Optional JTAG Configuration [Pg7] MIPI_Data_3_out_N 18 17 MIPI_Data_3_out_P [Pg7] 20 19 22 21 DSI_IO_24 24 23 DSI_IO_23 DSI_IO_26 26 25 DSI_IO_25 DSI_IO_28 28 27 DSI_IO_27 DSI_IO_29 30 29 [Pg7] MIPI_Data_0_out_LP MIPI_VCC_12V_OUT 32 31 MIPI_VCC_12V_OUT [Pg7] MIPI_Data_3_out_LP R209 DNI FTDI_TCK [Pg2,5] 30 R184 34 33 [Pg7] MIPI_Data_0_out_HS_P MIPI_Data_0_out_P [Pg7] MIPI_VCC_5V_OUT 36 35 MIPI_VCC_5V_OUT R223 0 SCL_2 [Pg2,5] 330 R185 38 37 MIPI_VCC_3.3V_OUT 40 39 MIPI_VCC_3.3V_OUT 42 41 [Pg7] MIPI_Data_0_out_HS_N MIPI_Data_0_out_N [Pg7] 44 43 [Pg7] MIPI_Data_3_out_LN R210 DNI FTDI_TMS [Pg2,5] 330 R186 46 45 [Pg7] MIPI_Data_0_out_LN 48 47 R224 0 SDA_2 [Pg2,5] 30 R187 50 49

M50-3122545

MIPI DSI Output B B

[Pg7] MIPI_Clock_out_LP 30 R189 U9C [Pg7] MIPI_Clock_out_HS_P MIPI_Clock_out_P [Pg7] 330 R190 BANK5 MIPI_VCC_12V_IN MIPI_VCC_12V_OUT A7 E6 [Pg7] MIPI_Data_0_out_LP PL2A || GPLLT_IN PL5A MIPI_CD_CLK [Pg7] [Pg7] MIPI_Data_0_out_LN B6 E5 MIPI_CD_D0 [Pg7] [Pg7] MIPI_Clock_out_HS_N MIPI_Clock_out_N [Pg7] PL2B || GPLLC_IN PL5B 330 R191 R233 DNI [Pg7] MIPI_Clock_out_LP C7 [Pg7] MIPI_Clock_out_LN 12V C6 PL3A 1.2V 30 R192 [Pg7] MIPI_Clock_out_LN PL3B

R234 0 B7 MIPI_VCC_5V_IN MIPI_VCC_5V_OUT VCCIO5 C116 C115 0.1uF 0.1uF Note: Most of the resistor size is 0603, R235 DNI except in Page 7, they are 0201. 5V LCMXO3L-2100E-6UWG49CTR

R236 0

MIPI_VCC_3.3V_IN MIPI_VCC_3.3V_OUT

R237 DNI 3.3V

1.2V R238 0

U9D

A4 D1 A D6 GND VCC D7 A GND VCC E1 C120 C119 G5 GND GND 0.1uF 0.1uF

LCMXO3L-2100E-6UWG49CTR Lattice Semiconductor Applications Email: [email protected]

Title X03 BOB + DSI : LCMX3L-2100E-6WLCSP49

Size Project Schematic Rev B C MachXO3L DSI Breakout Board Board Rev B Date: May, 2014 Sheet of 77 5 4 3 2 1