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I DATABASE INTEGRATION ALPHA SERVERS & WORKSTATIONS Digital ALPHA 21164 CPU Technical Journal Editorial The Digital TechnicalJournal is a refereed Cyrix is a trademark of Cyrix Corporation. Jane C. Blake, Managing Editor journal published quarterly by Digital dBASE is a trademark and Paradox is Helen L. Patterson, Editor Equipment Corporation, 30 Porter Road a registered trademark of Borland Kathleen M. Stetson, Editor LJ02/D10, Littleton, Massachusetts 01460. International, Inc. Subscriptionsto the Journal are $40.00 Circulation (non-U.S. $60) for four issues and $75.00 EDA/SQL is a trademark of Information Catherine M. Phillips, Administrator (non-U.S. $115) for eight issues and must Builders, Inc. Dorothea B. Cassady, Secretary be prepaid in U.S. funds. University and Encina is a registered trademark of Transarc college professors and Ph.D. students in Corporation. Production the electrical engineering and computer Excel and Microsoft are registered pde- Terri Autieri, Production Editor science fields receive complimentary sub- marks and Windows and Windows NT are Anne S. Katzeff, Typographer scriptions upon request. Orders, inquiries, trademarks of Microsoft Corporation. Joanne Murphy, Typographer and address changes should be sent to the Peter R Woodbury, Illustrator Digital TechnicalJournal at the published- Hewlett-Packard and HP-UX are registered by address. Inquiries can also be sent elec- trademarks of Hewlett-Packard Company. Advisory Board tronically to [email protected]. Single copies INGRES is a registered trademark of Ingres Samuel H. Fuller, Chairman and back issues are available for $16.00 each Corporation. Richard W. Beane by calling DECdirect at 1-800-DIGITAL Donald Z. Harbert (1-800-344-4825). Recent back issues of the INFORMIX is a registered trademark of William R Hawe Journal are also available on the Internet at Informix Software, Inc. Richard J. Hollingworth http://www.digital.com/info/D~/home. Inte1486, Intel, and Pentium are trademarks Richard F. Lary hunl. Complete Digital Internet listings can of Intel Corporation. be obtained by sending an electronic mail Alan G. Nemeth Kerberos is a trademark of Massachusetts message to [email protected]. Jean A. Proulx Institute of Technology. Robert M. Supnik Digital employees may order subscriptions MIPS R4000 is a trademark of MIPS Gayn B. Winters through Readers Choice by entering VTX Computer Systems, Inc. PROFILE at the system prompt. Motif, OSF, and OSF/1 are registered trade- Comments on the content of any paper marks of the Open Software Foundation, are welcomed and may be sent to the Inc. managing editor at the published-by or network address. Novell is a registered trademark of Novell, Inc. Copyright O 1995 Digital Equipment Corporation. Copying without fee is per- ORACLE is a registered trademark of Oracle mitted provided that such copies are made Corporation. for use in educational institutions by faculty POSIX is a registered trademark of the members and are not distributed for com- Institute of Electrical and Electronics mercial advantage. Abstracting with credit Engineers, Inc. of Digital Equipment Corporation's author- ship is permitted. All rights reserved. SCO is a registered trademark of The Santa Cruz Operation, Inc. The information in the Journal is subject to change without notice and should not SequeLink is a registered trademark of be construed as a commitment by Digital TechGnosis, Inc. Equipment Corporation or by the compa- Solaris and Sun are registered trade- nies herein represented. Digital Equipment marks and SunOS is a trademark of Sun Corporation assumes no responsibility for Microsystems, Inc. any errors that may appear in the Journal. SPARC is a registered trademark of SPARC ISSN 0898-90113 International, Inc. Documentation Number EY-T135E-TJ SPEC, SPEC@, SPECint, SPECfp92, Book production was done by Quantic SPECint92, SPECmark, SPECrate-@92, Communications, Inc. and SPECrate-int92 are trademarks of the Standard Performance Evaluation Council. The following are trademarks of Digital Equipment Corporation: ACMS, SPICE is a trademark of the University of ACMS Desktop, ACMSxp, Alphasewer, California at Berkeley. Alphastation, DEC, DEC OSF/l, DECchip, SPX/IPX is a trademark of Novell, Inc. DECnet, DECdtm, DECnet, Digital, the SYBASE is a registered trademark of Sybase, DIGITAL logo, ObjectBroker, OpenVMS, Inc. PATHWORKS, ULTRIX, VAX, and VMS. Tuxedo is a registered trademark of Unix ADABAS is a registered trademark of Systems Laboratories, Inc. Software AG of North America, Inc. UNIX is a registered trademark in the Cover Design AIX, IBM, OS/2, and RISC System/6000 United States and other counmes, licensed Key to the remarkable performance of the are registered trademarks and AS/400, CICS, exclusively through X/Open Company Ltd. Alphaserver 8400/8200 systems is Digital's and DB2 are trademarks of International new 300-MHz, &-bit Alpha 21 164 micro- Business Machines Corporation. X/Open is a trademark of X/Open Company Ltd. processor. Both subjects are featured in this AppleTalk and Macintosh are registered tenth anniversary issue of the Journal and trademarks of Apple Computer, Inc. are represented on the cover in the forms AT&T is a registered trademark of American of a photograph of the microprocessor and Telephone and Telegraph Company. an illustration of the Alphaserver system topology. BT is a registered trademark of British The cover was designed by Mario Telecommunications plc. Furtado of Furtado Communication Challenge is a trademark of Silicon Design. Graphics, Inc. Contents Foreword Richard L. Sires DATABASE INTEGRATION DB Integrator: Open Middleware for Data Access Ilichard Plcdcrcder, Vishu lirishnamitrthy, 1Michacl G.~gnon, and Mayank Vadodaria ACMSxp Open Distributed Transaction Processing Robert K. B;lati, J. Ian Carrtc, Wtlliam B. I)r~~ry, 'inti Oren L. Wicslcr An Open, Distributable, Three-tier, Client-Server Norman G,l)cplcdge, William A. Turner, c~nti Architecture with Transaction Semantics Alesandm Woog ALPHA SERVERS & WORKSTATIONS The AlphaServer 8000 Series: High-end Server lhvid M. Fcn\vick, Denis J. t'ole); Willian~I<. G~st, Platform Development Stcplien R. V;i~ilnDoren,and 1)anicl Wisscll Digital's High-performance CMOS ASIC ]can H. Basm~ji,IGy R. Fisher, Frank W. Gatulis, Herbert R. Kolk, and Jamcs F. Rosenct-a~is The Second-generation Processor Module for Nitin D. Godi\\,aln and Barry A. maska as AlphaServer 2100 Systems The Design and Verification of the Alphastation John H. Zurawski, John E. Murray, and Pat11J. Lrmrnon 600 5-series Workstation ALPHA 21 164 CPU Circuit Implementation of a 300-MHz 64-bit William J. Bo\vllill, Shane L. ]',ell, Rradley J. Bcnschncidcr, 100 Second-generation CMOS Alpha CPU Andrew J. Black, Sharon M. Britrotl, Rubcn W. (:astclino, L>alc R. Donch~n,John H. Edmondson, Harry I<. F.l~r,Ill, Paul E. Grono\\,ski, hi1I<. Jain, Ptltricin L. IO-ocscn, Marc E:.. Lanicrc, 13rucc J. L.oughlin, Shskhar Mehra, l<obcrt 0. Mucllcr, I<onald P. Preston, Sribalan Santhanam, Ti~norli!.A. Shedti, Michael J. S~nitll,.lnd Stcphcn C:. Thie~.,iut' Internal Organization of the Alpha 21 164, John H.Edmondson, Paul I,liubinfeld, Pctcr J. Ikmnon, 119 a 300-MHz 64-bit Quad-issue CMOS RlSC Rradley J. Benschncider, Dchra Bernsrcin, Ruhcn W. Microprocessor C~lstelino,Elizabeth M. Coopcr, Diiniel E. L)c\*cr, Dale H. I)onchin, Timotliy C. Fjsclicr, Anil K. Jnin, Slickh.ir Mchr.1, Jc~nneE. lMcycr, Ronald P. Preston, Vidya IC~jagopalan, Chandrasckhara Sornanathan, Scott A. Taylor, and Gilbcrt M. Wolrich Functional Verification of a Multiple-issue, I\/licll.acII(a~ltro\\lit~ and Lisa M. Noack Pipelined, Superscalar Alpha Processor - the Alpha 21 164 CPU Chip l)igi~.~lTechnical Jottrn.~l \id. 7 No. 1 1995 In Memoriam This tenth 'in~livcrs,~ryissue of tlic I)i,:,i/nl 7i~ch11ic~11,Jri1~1-11~11is dedicated to the memory of l'ctcr E'. Conklin, (:orporatc <:onsulti~igEngineer, who passed ,1\\,ay in April 1995. Pctcr\iro~.ltcdat Di~it'ilh)r 26 ye.1rs. Hc \rr.is one of the pio- nccrs of the DE(:s!,stcm-10 sofi\\,.~rcgro~~p, contrilx~ting its first b~tchand 1.i~- t~r~ilmcmol-!, subs\,stcms. Hc \\,,15 a key contl-ibutor ill the clcsign of the VAS ;~rcliitccturc,ind ~tslanguage .ind run-time cn\.i~-onments.Hc \\rorlted in the Pl)l'-11 and 'Terminals and Pl.i~ltcrsgroups, helping to dc\/clop tlicir tec1inic:il and b~~sinessstl-atcgics in rapidly cli,inging cn\iro~imcnts.Anci lie \\,as a PI-inic mo\.cr of the Alpli,~program, o\,c~-seejngf rst tl~csofk\\~arc dc\.clopment and tlicli all ofthc c~~gi~iccrinp,as \\>ell ,IS cre,itilig its ~~nicl~lcc~~lt~~r.il and man,iscl.i,il app~-oachto cro>>-org,lni/,dtio~i,~ldc\rclopmcnt. lkyond his oi~tstnndingtcclinical and bi~sincsscontributions, Pctcr espouscd dnd represented ,111 tli,it \\.as podill Digital's cult~~rc-respect ~OI-and focils oli pu'plc; doing tlic rigl~tthing for customers and collcag~lcs;dri\~i~ig for concrete results .ind \\~ork,lblcproccsscs. Hc clianipioncci tlic role of \\,omen and minor- tic3 ,is Inanagcrs and contrib~~tors.Hc helped set LIPtlic i~itcrnalNotes systcm to ful-tlicr ope11 co~ii~ii~lnic~~tionsamong e~nployccs,and bcn\~ccncriiployccs and m,inagclnent. And lie ad\~oc,~tcd,lnd modclcd tlic uses of training and de\lclop- mcnt to impro\.c pc1.5onal and ors.~~iizatio~idpcrforma~icc at '111 Ic\,cls. l'ctcr's \\rork is \\.o\.cn tlirougli the f'ibric of lligital's Iiistol-\, liltc a bright, ~~nbrc,iltrlblethl-cad. Hc \\,ill bc sorely liiisscd. Editor's Introduction The Di'qilal 7i.chr~icnI~/o~~r~~zwlmarks addition to discussions of three Alpha server architecture niade up of three its tenth anni\lcrsary \vith thc publica- hardware designs and the new micro- ticrs: desktop, middleware (founded tion of this issue. Since 1985, tlie processor, this issue presents papers on the ACMSsp monitor and Digital's ./ol,~n.ralhas chronicled Digital's engi- on database sohvare technologies.
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  • Digital Semiconductor Alpha 21164 Microprocessor Product Brief

    Digital Semiconductor Alpha 21164 Microprocessor Product Brief

    Digital Semiconductor Alpha 21164 Microprocessor Product Brief March 1995 Description The Alpha 21164 microprocessor is a high-performance implementation of Digi- tal’s Alpha architecture designed for application servers and high-performance clients. It has a superscalar design capable of issuing four instructions every clock cycle. The integration of an instruction cache, data cache, and second-level cache offers unrivaled microprocessor performance. The 21164 uses a high-performance interface to access main memory, data buses, and an optional board-level cache. Features • Fully pipelined 64-bit advanced RISC • Onchip, 96KB, 3-way, set-associative (reduced instruction set computing) write-back L2 unified instruction and architecture supports multiple operat- data cache ing systems, including: • Onchip write buffer with six fully - Microsoft Windows NT associative 32-byte entries - Digital UNIX • High-performance interface - OpenVMS - 128-bit memory data path • Best-in-class performance - Selectable error correction code - 266 through 300 MHz operation (ECC) or parity protection on data - 290 through 330 SPECint (est.) - 40-bit addressing - 440 through 500 SPECfp (est.) - Programmable interface timing - Superscalar (4-way instruction issue) - Two outstanding load instructions - Peak instruction execution rate of - Control for optional offchip L3 over 1200 million instructions per cache second - Synchronous/asynchronous RAM - 0.50 µm CMOS technology support • Pipelined (9-stage) floating-point unit - Programmable cache block size - IEEE