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Digital Technical Journal, Volume 4, Number 3: NVAX-Microprocessor VAX Systems

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Digital Technical Journal, Volume 4, Number 3: NVAX-Microprocessor VAX Systems Editorial Jane C. Blake, Editor Kathleen M. Stetson, Associate Editor Helen L. Patterson, Associate Editor Circulation Catherine M. Phillips, Administrator Sherry L. Gonzalez Production Terri Autieri, Production Editor Anne S. Katzeff, ppographer Peter R. Woodbury, Illustrator Advisory Board Samuel H. Fuller, Chairman Richard W Beane Richard J. Hollingsworth Alan G. Nemeth Victor A. Vyssotsky Gayn B. Winters The Digital TechnicalJournal is published quarterly by Digital Equipment Corporation, 146 Main Street MLO 1-3/B68,Maynard, Massachusetts 01754-2571. Subscriptions to the Journal are $40.00 for four issues and must be prepaid in U.S. funds. University and college professors and Ph.D. students in the electrical engineering and computer science fields receive complimentary subscriptions upon request. Orders, inquiries, and address changes should be sent to the Digital TechnicalJournal at the published-by address. Inquiries can also be sent electronically to [email protected]. Single copies and back issues are available for $16.00 each from Digital Press of Digital Equipment Corporation, 1 Burlington Woods Drive, Burlington, MA 01830-4597 Digital employees may send subscription orders on the ENET to RDVAX::JOURNAL or by interoffice mail to mailstop ML01-3/B68. Orders should include badge number, site location code, and address. All employees must advise of changes of address. Comments on the content of any paper are welcomed and may be sent to the editor at the published-by or network address. Copyright O 1992 Digital Equipment Corporation. Copying without fee is permitted provided that such copies are made for use in educational institutions by faculty members and are not distributed for commercial advantage. Abstracting with credit of Digital Equipment Corporation's authorship is permitted. All rights reserved. The information in the Journal is subject to change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility for any errors that may appear in the Journal. ISSN 0898-901X Documentation Number EY-J884E-DP The following are tradeinarks of Digital Equipment Corporation: Alpha AXP, DEC, DECchip 21064, DECstation, DECwindows, Digital, the Digital logo, KA50, KA52, KA675, KA680, KA690, MicroV!, MS44, MS670, MS690, Q-bus, Q22-bus, Thinwire, TURBOchannel, lXI'RM, VAX, VAX-11/780, VAX 4000, VAX 6000, VAX 7000, VAX 10000, VAXcluster, VAX MACRO, VAXstation, VMS, and VXT 2000. MACH is a trademark and PAL is a registered trademark of Cover Design Advanced Micro Devices, Inc. The WRXmicroprocessor is Digital'sfastest VRX implementation SPEC, SPECfp, SPECint, and SPECmark are registered trademarks of and the common theme ofpapers in this issue. Our cover graphic the Standard Performance Evaluation Cooperative. joins the WHXproject code name with an image of speed - the SPICE is a trademark of the University of California at Berkeley. chip's most salient characteristic and theperjomzance advantage TPC Benchmark and tpsA-local are trademarks of the Transaction it brings to a range of new VAxsystm. Processing Performance Council. The cover design is by Deb Anderson of Quantic Communications,Znc. Book production was done by Quantic Communications,Inc. Contents 9 Foreiuord Robert id. Supnik NVAX-microprocessorVAX Systems I I The NVAX and NVAX+ High-perfomname VAX Microprocessors C;. Michael Uhler, Debra Bernstein, Larry L. Biro, John E Brown 111, Jolui H. Eclrnondson,Jeffrey D. Pickholtz, and Rebecca L. Stamnl 24 The NVAX CPU Chip: Design Challenges, Methods, and CAD Tools Dale R. Donchin, Timothy C. Fischer, Thomas E Fox, Victor Peng. Ronald l? Preston, and William R. Wheeler 38 Logical Verificationof the NVAX CPU Chip Design Walker Anderson 47 The VRX 6000 Model 600 Processor Lawrence Chisvin, Gregg A. Boucliard, and Thomas M. Wenners GO Design ofthe VAX 4000 Mode1400, 500, and 600 Systm~s Jonathan C. Crowell, Kwong-Talc A. Chui, Thomas E. Kopec, Samyojita A. Naclkarni, ancl Dean A. Sovie 73 The Design of the VAX 4000 Model 100 and MicroVAX 3100 Model 90 Desktop Systems Jonathan C. Crowell and David W Maruska 82 The VAXstation4000 Model 90 Michael A. Callander, SK,Lauren M. Carlson, Anclrew R. Ladd, and Mitchell 0. Norcross 92 VAX 6000 Error Handling: A Pragmntic Approach Bri;in I'orter I Editor's Introduction paper on the new mid-r;~ngcVtjX 6000 niultipro- cessing s)lstem, Larry Chisvin, Gregg Bouchartl. and Tom Wenners explain the module design clecisions that s~~pportedthe goals of 6000-series compatibil- ity anrl time to market. Of particular interest are the sclieclule and performance benefits derived from developing a routing and control interface chip. The engineers for new low-end desksicle systems also chose to develop custom chips-a menlory controller chip, memory module, and an I/() con- troller Jon Crowell, Kwong Chui, Tom Kopec, Sam Nadkarni, ant1 Dean Sovie discuss the chip filnc- Jane C. Blake tions tliat were key to exceeding the perh)rrn;~nce Editor goal of three times that of the previous V!4000. For tlie low-encl VXX 4000 Moclel 100 system anel The WM microprocessor is a high-performance, the MicroVla 3100 desktop servers, designers saveel single-chip implementation of the VAX architecture. significant time by "borrowing" existing compo- It is today's fastest Vru; microprocessor and the Cl'L1 nents from proven systems. Jon Crowell ant1 I>ave at the hart of the mid-range, low-end, and work- Maruska relate decisions that allowed them to dou- station systems described in this issue of the Digital ble performance and complete the work within the Technic~zlJourncll. extraorclinarily short time of nine months. The WtLY chip is not only fast, with cycle times as The newest Vastation workstation, b;~sedon low as 11 ns, but also holds a unique position in the WAX, is the Model 90. lMike Callander, L;u~ren Digital family of microprocessors: NVAX is both an Carlson, Andy Ladd, and Mitch Norcross present upgrade path for existing VAX systems and a migra- their design methodology. Most significant for tion path to Alpha &YP systems. In their paper on clevelopment was the tlecision to implement new the WAS anel WAX+ chips, Mike Uliler, Debra logic in programmable technology, which allowed Bernstein, Larry Biro. John Brown, John Edmond- bug fixes in minutes rather than weeks. son, Jeff Picklioltz, ancl Rebecca Stamm present an Not ;tbout system design but rather error han- overview of the complex microprocessor tlesigns dling in 6000 systems, Brian Porter's paper and relate how RlSC techniques are used in this CIS<: describes an approach tliat reduces the aniount of machine to achieve dramatic increases in perfor- unique coding traclitionally required for error han- mance over previous implementations. dling. He details the development of sophisticatecl Increases in performrlnce are also attributable to error 11;1ntlling routines tliat ;~ccornmodate the the CMOS-4 0.75-micrometer process technology in complexity of the symmetric multiprocessing VAS which the WAX is implemented. In their paper 6000 models. about the verification of the physical design, Dale The editors thank Mike llhler of the Semi- Donchin, Tim Fischer, Frank Fox, Victor Peng, Ron contluctor Engineering C;roi~p,who ensuretl tli;rt I-'reston, and Hill Wheeler describe tlie methods and the standarcls of excellence ;rpplietl to NVN; <level- the CAD tools created to manage the complexity of opment were applied to the development of this a chip with 1.3 n~illiontransistors. issue. Also, this issue is notable editorially because The rigorous use of the Chi) tools and tliorougli it is the first in wliicli papers have been form;illy simulation-based testing resultetl in highly h~nc- refereed. 1 thank Gene Hoffnagle: editor of the tional first-pass chips. In his paper about tlie logical IBN Sjatems .lournal, for encouraging the use of verification, Walker Antlerson discusses the suc- the referee process in any journal worthy of the cessful strategies used to ensure no "show stopper" name. 1>TI issues will continue to be refereed so bugs existed in the design. Highlighting major that wc may offer engineering ant1 academic read- strategies, he reviews the behavioral moclels and ers informative and relevant teclinical cliscussions. pse11dor;rndoni exercisers at the core of the verifi- cation effort. Each system design team chose a different approacli to take advantage of WAX performance and to meet system-specific requirements. In a Biographies I Walker Anderson Principal engineer Walker Anderson is a member of the Models, Tools, ancl Verification Group in the Semiconductor Engineering Group. Currently a co-leader of the logical verification team for a fim~rechip design, he led the NVAX logical verification effort. Before joining Digital in 1988, Walker was a diagnostic and testability engineer in a CPU development group at Data General Corporation for eight years. He holds a B.S.E.E. (1980) from Cornell University and an M.B.A. (1985) from Boston Universitj! Debra Bernstein Debra Bernstein is a consultant engineer in the Semi- conductor Engineering Group. She worked 011 the CI'U design and architect~~re for the NVkY ~nicroprocessorand the VAx 8700/8800 systems and is currently co-architecture leader for a future Alpha AXP processor. Deb received a B.S. in computer science (1982, cum laude) from the University of Massachusetts in hnherst. She holds one patent, has two patent applications pending, and has coauthored several technical papers. Larry L. Biro Larry Biro joined the Electronic Storage Development (ESD) Group in 1983, after receiving an M.S.E.E. from Rensselaer Polytechnic Institute. While in ESD, he contributed to the advanced development of solid-state disk I products. Larry. ,ioined the Semiconductor Engineering- Grou[> as a custom cir- cuit designer on the NVAX E-box. Later, as a member of the NVAX+ chip imple- mentation team, Larry designed the clock and reset logic, coortlinated back-end verification efforts, and co-led the chip debugging.
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